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: perf: Make POWER7 events available in sysfs

PATCH In review Sukadev Bhattiprolu 4 participants 20 messages Jan 23, 2013 – Mar 18, 2013

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#0 lore raw

v4 cover : perf: Make POWER7 events available in sysfs

[PATCH 0/6][v4]: perf: Make POWER7 events available in sysfs

Make the generic and some POWER7-specific perf events available in sysfs. These changes mainly extend similar functionality implemented in x86 to work on POWER architecture as well.

Thanks to input from Stephane Eranian, Robert Richter, Peter Ziljstra and Jiri Olsa.

Changelog[v4]:
[Jiri Olsa]: Document that multiple event= like terms can be specified in the 'events' file.
[Jiri Olsa]: Remove the documentation for the 'config format' file as it is already documented in 'Documentation/ABI/testing/' [Jiri Olsa]: Move the ABI documentaion from 'stable/' to 'testing/'.

Changelog[v3]:
[Jiri Olsa]: No need to define EVENT_ID, PMU_EVENT_PTR() if used only once
[Greg KH]: Document the new sysfs interfaces in Documenation/ABI

Changelog[v2]:
[Jiri Olsa] Use PMU_FORMAT_ATTR() rather than duplicating code.

Sukadev Bhattiprolu (6):
perf/Power7: Use macros to identify perf events
perf: Make EVENT_ATTR global
perf/POWER7: Make generic event translations available in sysfs perf/POWER7: Make some POWER7 events available in sysfs
perf: Create a sysfs entry for Power event format
perf: Document the ABI of perf sysfs entries

 .../testing/sysfs-bus-event_source-devices-events  |   62 +++++++++++++++
 arch/powerpc/include/asm/perf_event_server.h       |   32 ++++++++
 arch/powerpc/perf/core-book3s.c                    |   24 ++++++
 arch/powerpc/perf/power7-pmu.c                     |   81 ++++++++++++++++++--
 arch/x86/kernel/cpu/perf_event.c                   |   13 +---
 include/linux/perf_event.h                         |   11 +++
 6 files changed, 205 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-bus-event_source-devices-events
#1 lore raw

PATCH v4 1/6 : perf/Power7: Use macros to identify perf events

[PATCH 1/6][v4]: perf/Power7: Use macros to identify perf events

Define and use macros to identify perf events codes This would make it easier and more readable when these event codes need to be used in more than one place.

---
 arch/powerpc/perf/power7-pmu.c |   28 ++++++++++++++++++++--------
 1 files changed, 20 insertions(+), 8 deletions(-)
arch/powerpc/perf/power7-pmu.c +20 -8
index 441af08..44e70d2 100644
@@ -51,6 +51,18 @@
 #define MMCR1_PMCSEL_MSK	0xff
 
 /*
+ * Power7 event codes.
+ */
+#define	PME_PM_CYC			0x1e
+#define	PME_PM_GCT_NOSLOT_CYC		0x100f8
+#define	PME_PM_CMPLU_STALL		0x4000a
+#define	PME_PM_INST_CMPL		0x2
+#define	PME_PM_LD_REF_L1		0xc880
+#define	PME_PM_LD_MISS_L1		0x400f0
+#define	PME_PM_BRU_FIN			0x10068
+#define	PME_PM_BRU_MPRED		0x400f6
+
+/*
  * Layout of constraint bits:
  * 6666555555555544444444443333333333222222222211111111110000000000
  * 3210987654321098765432109876543210987654321098765432109876543210
@@ -296,14 +308,14 @@ static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[])
 }
 
 static int power7_generic_events[] = {
-	[PERF_COUNT_HW_CPU_CYCLES] = 0x1e,
-	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x100f8, /* GCT_NOSLOT_CYC */
-	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x4000a,  /* CMPLU_STALL */
-	[PERF_COUNT_HW_INSTRUCTIONS] = 2,
-	[PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880,	/* LD_REF_L1_LSU*/
-	[PERF_COUNT_HW_CACHE_MISSES] = 0x400f0,		/* LD_MISS_L1	*/
-	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068,	/* BRU_FIN	*/
-	[PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6,	/* BR_MPRED	*/
+	[PERF_COUNT_HW_CPU_CYCLES] =			PME_PM_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =	PME_PM_GCT_NOSLOT_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =	PME_PM_CMPLU_STALL,
+	[PERF_COUNT_HW_INSTRUCTIONS] =			PME_PM_INST_CMPL,
+	[PERF_COUNT_HW_CACHE_REFERENCES] =		PME_PM_LD_REF_L1,
+	[PERF_COUNT_HW_CACHE_MISSES] =			PME_PM_LD_MISS_L1,
+	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =		PME_PM_BRU_FIN,
+	[PERF_COUNT_HW_BRANCH_MISSES] =			PME_PM_BRU_MPRED,
 };
 
 #define C(x)	PERF_COUNT_HW_CACHE_##x
Signature · 1 line
1.7.1
#3 lore raw

PATCH v4 2/6 : perf: Make EVENT_ATTR global

In reply to Sukadev Bhattiprolu

[PATCH 2/6][v4]: perf: Make EVENT_ATTR global

Rename EVENT_ATTR() to PMU_EVENT_ATTR() and make it global so it is available to all architectures.

Further to allow architectures flexibility, have PMU_EVENT_ATTR() pass in the variable name as a parameter.

Changelog[v2]
- [Jiri Osla] No need to define PMU_EVENT_PTR()

---
 arch/x86/kernel/cpu/perf_event.c |   13 +++----------
 include/linux/perf_event.h       |   11 +++++++++++
 2 files changed, 14 insertions(+), 10 deletions(-)
arch/x86/kernel/cpu/perf_event.c +3 -10
index 4428fd1..59a1238 100644
@@ -1316,11 +1316,6 @@ static struct attribute_group x86_pmu_format_group = {
 	.attrs = NULL,
 };
 
-struct perf_pmu_events_attr {
-	struct device_attribute attr;
-	u64 id;
-};
-
 /*
  * Remove all undefined events (x86_pmu.event_map(id) == 0)
  * out of events_attr attributes.
@@ -1354,11 +1349,9 @@ static ssize_t events_sysfs_show(struct device *dev, struct device_attribute *at
 #define EVENT_VAR(_id)  event_attr_##_id
 #define EVENT_PTR(_id) &event_attr_##_id.attr.attr
 
-#define EVENT_ATTR(_name, _id)					\
-static struct perf_pmu_events_attr EVENT_VAR(_id) = {		\
-	.attr = __ATTR(_name, 0444, events_sysfs_show, NULL),	\
-	.id   =  PERF_COUNT_HW_##_id,				\
-};
+#define EVENT_ATTR(_name, _id)						\
+	PMU_EVENT_ATTR(_name, EVENT_VAR(_id), PERF_COUNT_HW_##_id,	\
+			events_sysfs_show)
 
 EVENT_ATTR(cpu-cycles,			CPU_CYCLES		);
 EVENT_ATTR(instructions,		INSTRUCTIONS		);
include/linux/perf_event.h +11 -0
index 6bfb2fa..42adf01 100644
@@ -817,6 +817,17 @@ do {									\
 } while (0)
 
 
+struct perf_pmu_events_attr {
+	struct device_attribute attr;
+	u64 id;
+};
+
+#define PMU_EVENT_ATTR(_name, _var, _id, _show)				\
+static struct perf_pmu_events_attr _var = {				\
+	.attr = __ATTR(_name, 0444, _show, NULL),			\
+	.id   =  _id,							\
+};
+
 #define PMU_FORMAT_ATTR(_name, _format)					\
 static ssize_t								\
 _name##_show(struct device *dev,					\
Signature · 1 line
1.7.1
#5 lore raw

PATCH v4 3/6 : perf/POWER7: Make generic event translations available in sysfs

In reply to Sukadev Bhattiprolu

[PATCH 3/6][v4]: perf/POWER7: Make generic event translations available in sysfs

Make the generic perf events in POWER7 available via sysfs.

	$ ls /sys/bus/event_source/devices/cpu/events
	branch-instructions
	branch-misses
	cache-misses
	cache-references
	cpu-cycles
	instructions
	stalled-cycles-backend
	stalled-cycles-frontend
	$ cat /sys/bus/event_source/devices/cpu/events/cache-misses
	event=0x400f0

This patch is based on commits that implement this functionality on x86. Eg:

	commit a47473939db20e3961b200eb00acf5fcf084d755
	Author: Jiri Olsa <[email protected]>
	Date:   Wed Oct 10 14:53:11 2012 +0200

	    perf/x86: Make hardware event translations available in sysfs

Changelog:[v2]
[Jiri Osla] Drop EVENT_ID() macro since it is only used once.

---
 arch/powerpc/include/asm/perf_event_server.h      |   24 ++++++++++++++
 arch/powerpc/perf/core-book3s.c                   |   12 +++++++
 arch/powerpc/perf/power7-pmu.c                    |   34 +++++++++++++++++++++
 3 files changed, 70 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/stable/sysfs-devices-cpu-events
Documentation/ABI/stable/sysfs-devices-cpu-events new file +0 -0
new file mode 100644
index 0000000..e69de29
arch/powerpc/include/asm/perf_event_server.h +24 -0
index 9710be3..3f21d89 100644
@@ -11,6 +11,7 @@
 
 #include <linux/types.h>
 #include <asm/hw_irq.h>
+#include <linux/device.h>
 
 #define MAX_HWEVENTS		8
 #define MAX_EVENT_ALTERNATIVES	8
@@ -35,6 +36,7 @@ struct power_pmu {
 	void		(*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
 	int		(*limited_pmc_event)(u64 event_id);
 	u32		flags;
+	const struct attribute_group	**attr_groups;
 	int		n_generic;
 	int		*generic_events;
 	int		(*cache_events)[PERF_COUNT_HW_CACHE_MAX]
@@ -109,3 +111,25 @@ extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
  * If an event_id is not subject to the constraint expressed by a particular
  * field, then it will have 0 in both the mask and value for that field.
  */
+
+extern ssize_t power_events_sysfs_show(struct device *dev,
+				struct device_attribute *attr, char *page);
+
+/*
+ * EVENT_VAR() is same as PMU_EVENT_VAR with a suffix.
+ *
+ * Having a suffix allows us to have aliases in sysfs - eg: the generic
+ * event 'cpu-cycles' can have two entries in sysfs: 'cpu-cycles' and
+ * 'PM_CYC' where the latter is the name by which the event is known in
+ * POWER CPU specification.
+ */
+#define	EVENT_VAR(_id, _suffix)		event_attr_##_id##_suffix
+#define	EVENT_PTR(_id, _suffix)		&EVENT_VAR(_id, _suffix)
+
+#define	EVENT_ATTR(_name, _id, _suffix)					\
+	PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), PME_PM_##_id,	\
+			power_events_sysfs_show)
+
+#define	GENERIC_EVENT_ATTR(_name, _id)	EVENT_ATTR(_name, _id, _g)
+#define	GENERIC_EVENT_PTR(_id)		EVENT_PTR(_id, _g)
+
arch/powerpc/perf/core-book3s.c +12 -0
index aa2465e..fa476d5 100644
@@ -1305,6 +1305,16 @@ static int power_pmu_event_idx(struct perf_event *event)
 	return event->hw.idx;
 }
 
+ssize_t power_events_sysfs_show(struct device *dev,
+				struct device_attribute *attr, char *page)
+{
+	struct perf_pmu_events_attr *pmu_attr;
+
+	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
+
+	return sprintf(page, "event=0x%02llx\n", pmu_attr->id);
+}
+
 struct pmu power_pmu = {
 	.pmu_enable	= power_pmu_enable,
 	.pmu_disable	= power_pmu_disable,
@@ -1537,6 +1547,8 @@ int __cpuinit register_power_pmu(struct power_pmu *pmu)
 	pr_info("%s performance monitor hardware support registered\n",
 		pmu->name);
 
+	power_pmu.attr_groups = ppmu->attr_groups;
+
 #ifdef MSR_HV
 	/*
 	 * Use FCHV to ignore kernel events if MSR.HV is set.
arch/powerpc/perf/power7-pmu.c +34 -0
index 44e70d2..ae5d757 100644
@@ -363,6 +363,39 @@ static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
 	},
 };
 
+
+GENERIC_EVENT_ATTR(cpu-cycles,			CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-frontend,	GCT_NOSLOT_CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-backend,	CMPLU_STALL);
+GENERIC_EVENT_ATTR(instructions,		INST_CMPL);
+GENERIC_EVENT_ATTR(cache-references,		LD_REF_L1);
+GENERIC_EVENT_ATTR(cache-misses,		LD_MISS_L1);
+GENERIC_EVENT_ATTR(branch-instructions,		BRU_FIN);
+GENERIC_EVENT_ATTR(branch-misses,		BRU_MPRED);
+
+static struct attribute *power7_events_attr[] = {
+	GENERIC_EVENT_PTR(CYC),
+	GENERIC_EVENT_PTR(GCT_NOSLOT_CYC),
+	GENERIC_EVENT_PTR(CMPLU_STALL),
+	GENERIC_EVENT_PTR(INST_CMPL),
+	GENERIC_EVENT_PTR(LD_REF_L1),
+	GENERIC_EVENT_PTR(LD_MISS_L1),
+	GENERIC_EVENT_PTR(BRU_FIN),
+	GENERIC_EVENT_PTR(BRU_MPRED),
+	NULL
+};
+
+
+static struct attribute_group power7_pmu_events_group = {
+	.name = "events",
+	.attrs = power7_events_attr,
+};
+
+static const struct attribute_group *power7_pmu_attr_groups[] = {
+	&power7_pmu_events_group,
+	NULL,
+};
+
 static struct power_pmu power7_pmu = {
 	.name			= "POWER7",
 	.n_counter		= 6,
@@ -374,6 +407,7 @@ static struct power_pmu power7_pmu = {
 	.get_alternatives	= power7_get_alternatives,
 	.disable_pmc		= power7_disable_pmc,
 	.flags			= PPMU_ALT_SIPR,
+	.attr_groups		= power7_pmu_attr_groups,
 	.n_generic		= ARRAY_SIZE(power7_generic_events),
 	.generic_events		= power7_generic_events,
 	.cache_events		= &power7_cache_events,
Signature · 1 line
1.7.1
#7 lore raw

PATCH v4 4/6 : perf/POWER7: Make some POWER7 events available in sysfs

In reply to Sukadev Bhattiprolu

[PATCH 4/6][v4]: perf/POWER7: Make some POWER7 events available in sysfs

Make some POWER7-specific perf events available in sysfs.

	$ /bin/ls -1 /sys/bus/event_source/devices/cpu/events/
	branch-instructions
	branch-misses
	cache-misses
	cache-references
	cpu-cycles
	instructions
	PM_BRU_FIN
	PM_BRU_MPRED
	PM_CMPLU_STALL
	PM_CYC
	PM_GCT_NOSLOT_CYC
	PM_INST_CMPL
	PM_LD_MISS_L1
	PM_LD_REF_L1
	stalled-cycles-backend
	stalled-cycles-frontend

where the 'PM_*' events are POWER specific and the others are the generic events.

This will enable users to specify these events with their symbolic names rather than with their raw code.

	perf stat -e 'cpu/PM_CYC' ...
---
 arch/powerpc/include/asm/perf_event_server.h |    2 ++
 arch/powerpc/perf/power7-pmu.c               |   18 ++++++++++++++++++
 2 files changed, 20 insertions(+), 0 deletions(-)
arch/powerpc/include/asm/perf_event_server.h +2 -0
index 3f21d89..b29fcc6 100644
@@ -133,3 +133,5 @@ extern ssize_t power_events_sysfs_show(struct device *dev,
 #define	GENERIC_EVENT_ATTR(_name, _id)	EVENT_ATTR(_name, _id, _g)
 #define	GENERIC_EVENT_PTR(_id)		EVENT_PTR(_id, _g)
 
+#define	POWER_EVENT_ATTR(_name, _id)	EVENT_ATTR(PM_##_name, _id, _p)
+#define	POWER_EVENT_PTR(_id)		EVENT_PTR(_id, _p)
arch/powerpc/perf/power7-pmu.c +18 -0
index ae5d757..5627940 100644
@@ -373,6 +373,15 @@ GENERIC_EVENT_ATTR(cache-misses,		LD_MISS_L1);
 GENERIC_EVENT_ATTR(branch-instructions,		BRU_FIN);
 GENERIC_EVENT_ATTR(branch-misses,		BRU_MPRED);
 
+POWER_EVENT_ATTR(CYC,				CYC);
+POWER_EVENT_ATTR(GCT_NOSLOT_CYC,		GCT_NOSLOT_CYC);
+POWER_EVENT_ATTR(CMPLU_STALL,			CMPLU_STALL);
+POWER_EVENT_ATTR(INST_CMPL,			INST_CMPL);
+POWER_EVENT_ATTR(LD_REF_L1,			LD_REF_L1);
+POWER_EVENT_ATTR(LD_MISS_L1,			LD_MISS_L1);
+POWER_EVENT_ATTR(BRU_FIN,			BRU_FIN)
+POWER_EVENT_ATTR(BRU_MPRED,			BRU_MPRED);
+
 static struct attribute *power7_events_attr[] = {
 	GENERIC_EVENT_PTR(CYC),
 	GENERIC_EVENT_PTR(GCT_NOSLOT_CYC),
@@ -382,6 +391,15 @@ static struct attribute *power7_events_attr[] = {
 	GENERIC_EVENT_PTR(LD_MISS_L1),
 	GENERIC_EVENT_PTR(BRU_FIN),
 	GENERIC_EVENT_PTR(BRU_MPRED),
+
+	POWER_EVENT_PTR(CYC),
+	POWER_EVENT_PTR(GCT_NOSLOT_CYC),
+	POWER_EVENT_PTR(CMPLU_STALL),
+	POWER_EVENT_PTR(INST_CMPL),
+	POWER_EVENT_PTR(LD_REF_L1),
+	POWER_EVENT_PTR(LD_MISS_L1),
+	POWER_EVENT_PTR(BRU_FIN),
+	POWER_EVENT_PTR(BRU_MPRED),
 	NULL
 };
 
Signature · 1 line
1.7.1
#9 lore raw

PATCH v4 5/6 : perf: Create a sysfs entry for Power event format

In reply to Sukadev Bhattiprolu

[PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of a POWER cpu.

The format of the event is the same for all POWER cpus at least in (Power6, Power7), so bulk of this change is common in the code common to POWER cpus.

This code is based on corresponding code in x86.

Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR() rather than duplicating it.

---
 arch/powerpc/include/asm/perf_event_server.h |    6 ++++++
 arch/powerpc/perf/core-book3s.c              |   12 ++++++++++++
 arch/powerpc/perf/power7-pmu.c               |    1 +
 3 files changed, 19 insertions(+), 0 deletions(-)
arch/powerpc/include/asm/perf_event_server.h +6 -0
index b29fcc6..ee63205 100644
@@ -135,3 +135,9 @@ extern ssize_t power_events_sysfs_show(struct device *dev,
 
 #define	POWER_EVENT_ATTR(_name, _id)	EVENT_ATTR(PM_##_name, _id, _p)
 #define	POWER_EVENT_PTR(_id)		EVENT_PTR(_id, _p)
+
+/*
+ * Format of a perf event is the same on all POWER cpus. Declare a
+ * common sysfs attribute group that individual POWER cpus can share.
+ */
+extern struct attribute_group power_pmu_format_group;
arch/powerpc/perf/core-book3s.c +12 -0
index fa476d5..4ae044b 100644
@@ -1315,6 +1315,18 @@ ssize_t power_events_sysfs_show(struct device *dev,
 	return sprintf(page, "event=0x%02llx\n", pmu_attr->id);
 }
 
+PMU_FORMAT_ATTR(event, "config:0-20");
+
+static struct attribute *power_pmu_format_attr[] = {
+	&format_attr_event.attr,
+	NULL,
+};
+
+struct attribute_group power_pmu_format_group = {
+	.name = "format",
+	.attrs = power_pmu_format_attr,
+};
+
 struct pmu power_pmu = {
 	.pmu_enable	= power_pmu_enable,
 	.pmu_disable	= power_pmu_disable,
arch/powerpc/perf/power7-pmu.c +1 -0
index 5627940..5fb3c9b 100644
@@ -410,6 +410,7 @@ static struct attribute_group power7_pmu_events_group = {
 };
 
 static const struct attribute_group *power7_pmu_attr_groups[] = {
+	&power_pmu_format_group,
 	&power7_pmu_events_group,
 	NULL,
 };
Signature · 1 line
1.7.1
#18 lore raw

PATCH v4 6/6 : perf: Document the ABI of perf sysfs entries

In reply to Sukadev Bhattiprolu

[PATCH 6/6][v4]: perf: Document the ABI of perf sysfs entries

This patchset addes two new sets of files to sysfs for POWER architecture.

- perf event config format in /sys/devices/cpu/format/event
- generic and POWER-specific perf events in /sys/devices/cpu/events/

The format of the first file is already documented in:

sysfs-bus-event_source-devices-format

Document the format of the second set of files '/sys/devices/cpu/events/*' which would also become part of the ABI.

Changelog[v4]:
[Jiri Olsa]: Mention that multiple event= like terms can be specified in the 'events' file.
[Jiri Olsa]: Remove the documentation for the 'config format' file as it is already documented in 'Documentation/ABI/testing/'. [Jiri Olsa]: Move ABI documentation from 'stable/' to 'testing/'

Changelog[v3]:
[Greg KH] Include ABI documentation.

---
 .../testing/sysfs-bus-event_source-devices-events  |   62 ++++++++++++++++++++
 1 files changed, 62 insertions(+), 0 deletions(-)
 delete mode 100644 Documentation/ABI/stable/sysfs-devices-cpu-events
 create mode 100644 Documentation/ABI/testing/sysfs-bus-event_source-devices-events
Documentation/ABI/stable/sysfs-devices-cpu-events deleted +0 -0
deleted file mode 100644
index e69de29..0000000
Documentation/ABI/testing/sysfs-bus-event_source-devices-events new file +62 -0

62 lines not on this page · raw message

Signature · 1 line
1.7.1
#2 lore raw

[tip:perf/core] perf/Power7: Use macros to identify perf events

In reply to Sukadev Bhattiprolu
Commit-ID:  bbdc7aa442630a84feae45f4ca2dd7ed01abc868
Gitweb:     http://git.kernel.org/tip/bbdc7aa442630a84feae45f4ca2dd7ed01abc868
Author:     Sukadev Bhattiprolu <[email protected]>
AuthorDate: Tue, 22 Jan 2013 22:23:53 -0800
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 31 Jan 2013 13:07:50 -0300

perf/Power7: Use macros to identify perf events

Define and use macros to identify perf events codes This would make it easier and more readable when these event codes need to be used in more than one place.

---
 arch/powerpc/perf/power7-pmu.c | 28 ++++++++++++++++++++--------
 1 file changed, 20 insertions(+), 8 deletions(-)
arch/powerpc/perf/power7-pmu.c +20 -8
index 2ee01e3..eebb36d 100644
@@ -51,6 +51,18 @@
 #define MMCR1_PMCSEL_MSK	0xff
 
 /*
+ * Power7 event codes.
+ */
+#define	PME_PM_CYC			0x1e
+#define	PME_PM_GCT_NOSLOT_CYC		0x100f8
+#define	PME_PM_CMPLU_STALL		0x4000a
+#define	PME_PM_INST_CMPL		0x2
+#define	PME_PM_LD_REF_L1		0xc880
+#define	PME_PM_LD_MISS_L1		0x400f0
+#define	PME_PM_BRU_FIN			0x10068
+#define	PME_PM_BRU_MPRED		0x400f6
+
+/*
  * Layout of constraint bits:
  * 6666555555555544444444443333333333222222222211111111110000000000
  * 3210987654321098765432109876543210987654321098765432109876543210
@@ -307,14 +319,14 @@ static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[])
 }
 
 static int power7_generic_events[] = {
-	[PERF_COUNT_HW_CPU_CYCLES] = 0x1e,
-	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x100f8, /* GCT_NOSLOT_CYC */
-	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x4000a,  /* CMPLU_STALL */
-	[PERF_COUNT_HW_INSTRUCTIONS] = 2,
-	[PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880,	/* LD_REF_L1_LSU*/
-	[PERF_COUNT_HW_CACHE_MISSES] = 0x400f0,		/* LD_MISS_L1	*/
-	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068,	/* BRU_FIN	*/
-	[PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6,	/* BR_MPRED	*/
+	[PERF_COUNT_HW_CPU_CYCLES] =			PME_PM_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =	PME_PM_GCT_NOSLOT_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =	PME_PM_CMPLU_STALL,
+	[PERF_COUNT_HW_INSTRUCTIONS] =			PME_PM_INST_CMPL,
+	[PERF_COUNT_HW_CACHE_REFERENCES] =		PME_PM_LD_REF_L1,
+	[PERF_COUNT_HW_CACHE_MISSES] =			PME_PM_LD_MISS_L1,
+	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =		PME_PM_BRU_FIN,
+	[PERF_COUNT_HW_BRANCH_MISSES] =			PME_PM_BRU_MPRED,
 };
 
 #define C(x)	PERF_COUNT_HW_CACHE_##x
#4 lore raw

[tip:perf/core] perf: Make EVENT_ATTR global

In reply to Sukadev Bhattiprolu
Commit-ID:  2663960c159f23cbfb8e196c96e9fc9f3b5f1a8d
Gitweb:     http://git.kernel.org/tip/2663960c159f23cbfb8e196c96e9fc9f3b5f1a8d
Author:     Sukadev Bhattiprolu <[email protected]>
AuthorDate: Tue, 22 Jan 2013 22:24:23 -0800
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 31 Jan 2013 13:07:50 -0300

perf: Make EVENT_ATTR global

Rename EVENT_ATTR() to PMU_EVENT_ATTR() and make it global so it is available to all architectures.

Further to allow architectures flexibility, have PMU_EVENT_ATTR() pass in the variable name as a parameter.

Changelog[v2]
- [Jiri Olsa] No need to define PMU_EVENT_PTR()

---
 arch/x86/kernel/cpu/perf_event.c | 13 +++----------
 include/linux/perf_event.h       | 11 +++++++++++
 2 files changed, 14 insertions(+), 10 deletions(-)
arch/x86/kernel/cpu/perf_event.c +3 -10
index 6774c17..c0df5ed2 100644
@@ -1310,11 +1310,6 @@ static struct attribute_group x86_pmu_format_group = {
 	.attrs = NULL,
 };
 
-struct perf_pmu_events_attr {
-	struct device_attribute attr;
-	u64 id;
-};
-
 /*
  * Remove all undefined events (x86_pmu.event_map(id) == 0)
  * out of events_attr attributes.
@@ -1348,11 +1343,9 @@ static ssize_t events_sysfs_show(struct device *dev, struct device_attribute *at
 #define EVENT_VAR(_id)  event_attr_##_id
 #define EVENT_PTR(_id) &event_attr_##_id.attr.attr
 
-#define EVENT_ATTR(_name, _id)					\
-static struct perf_pmu_events_attr EVENT_VAR(_id) = {		\
-	.attr = __ATTR(_name, 0444, events_sysfs_show, NULL),	\
-	.id   =  PERF_COUNT_HW_##_id,				\
-};
+#define EVENT_ATTR(_name, _id)						\
+	PMU_EVENT_ATTR(_name, EVENT_VAR(_id), PERF_COUNT_HW_##_id,	\
+			events_sysfs_show)
 
 EVENT_ATTR(cpu-cycles,			CPU_CYCLES		);
 EVENT_ATTR(instructions,		INSTRUCTIONS		);
include/linux/perf_event.h +11 -0
index 6bfb2faa..42adf01 100644
@@ -817,6 +817,17 @@ do {									\
 } while (0)
 
 
+struct perf_pmu_events_attr {
+	struct device_attribute attr;
+	u64 id;
+};
+
+#define PMU_EVENT_ATTR(_name, _var, _id, _show)				\
+static struct perf_pmu_events_attr _var = {				\
+	.attr = __ATTR(_name, 0444, _show, NULL),			\
+	.id   =  _id,							\
+};
+
 #define PMU_FORMAT_ATTR(_name, _format)					\
 static ssize_t								\
 _name##_show(struct device *dev,					\
#6 lore raw

[tip:perf/core] perf/POWER7: Make generic event translations available in sysfs

In reply to Sukadev Bhattiprolu
Commit-ID:  1c53a270724df91276d28d66f8e5a302fc6a5d74
Gitweb:     http://git.kernel.org/tip/1c53a270724df91276d28d66f8e5a302fc6a5d74
Author:     Sukadev Bhattiprolu <[email protected]>
AuthorDate: Tue, 22 Jan 2013 22:24:54 -0800
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 31 Jan 2013 13:07:50 -0300

perf/POWER7: Make generic event translations available in sysfs

Make the generic perf events in POWER7 available via sysfs.

	$ ls /sys/bus/event_source/devices/cpu/events
	branch-instructions
	branch-misses
	cache-misses
	cache-references
	cpu-cycles
	instructions
	stalled-cycles-backend
	stalled-cycles-frontend
	$ cat /sys/bus/event_source/devices/cpu/events/cache-misses
	event=0x400f0

This patch is based on commits that implement this functionality on x86. Eg:

	commit a47473939db20e3961b200eb00acf5fcf084d755
	Author: Jiri Olsa <[email protected]>
	Date:   Wed Oct 10 14:53:11 2012 +0200

	    perf/x86: Make hardware event translations available in sysfs

Changelog:[v2]
[Jiri Osla] Drop EVENT_ID() macro since it is only used once.

---
 .../ABI/stable/sysfs-devices-cpu-events            |  0
 arch/powerpc/include/asm/perf_event_server.h       | 23 +++++++++++++++
 arch/powerpc/perf/core-book3s.c                    | 12 ++++++++
 arch/powerpc/perf/power7-pmu.c                     | 34 ++++++++++++++++++++++
 4 files changed, 69 insertions(+)
Documentation/ABI/stable/sysfs-devices-cpu-events renamed from tools/virtio/linux/hrtimer.h +0 -0
similarity index 100%
copy from tools/virtio/linux/hrtimer.h
copy to Documentation/ABI/stable/sysfs-devices-cpu-events
arch/powerpc/include/asm/perf_event_server.h +23 -0
index 9710be3..b9b6c55 100644
@@ -11,6 +11,7 @@
 
 #include <linux/types.h>
 #include <asm/hw_irq.h>
+#include <linux/device.h>
 
 #define MAX_HWEVENTS		8
 #define MAX_EVENT_ALTERNATIVES	8
@@ -35,6 +36,7 @@ struct power_pmu {
 	void		(*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
 	int		(*limited_pmc_event)(u64 event_id);
 	u32		flags;
+	const struct attribute_group	**attr_groups;
 	int		n_generic;
 	int		*generic_events;
 	int		(*cache_events)[PERF_COUNT_HW_CACHE_MAX]
@@ -109,3 +111,24 @@ extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
  * If an event_id is not subject to the constraint expressed by a particular
  * field, then it will have 0 in both the mask and value for that field.
  */
+
+extern ssize_t power_events_sysfs_show(struct device *dev,
+				struct device_attribute *attr, char *page);
+
+/*
+ * EVENT_VAR() is same as PMU_EVENT_VAR with a suffix.
+ *
+ * Having a suffix allows us to have aliases in sysfs - eg: the generic
+ * event 'cpu-cycles' can have two entries in sysfs: 'cpu-cycles' and
+ * 'PM_CYC' where the latter is the name by which the event is known in
+ * POWER CPU specification.
+ */
+#define	EVENT_VAR(_id, _suffix)		event_attr_##_id##_suffix
+#define	EVENT_PTR(_id, _suffix)		&EVENT_VAR(_id, _suffix)
+
+#define	EVENT_ATTR(_name, _id, _suffix)					\
+	PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), PME_PM_##_id,	\
+			power_events_sysfs_show)
+
+#define	GENERIC_EVENT_ATTR(_name, _id)	EVENT_ATTR(_name, _id, _g)
+#define	GENERIC_EVENT_PTR(_id)		EVENT_PTR(_id, _g)
arch/powerpc/perf/core-book3s.c +12 -0
index aa2465e..fa476d5 100644
@@ -1305,6 +1305,16 @@ static int power_pmu_event_idx(struct perf_event *event)
 	return event->hw.idx;
 }
 
+ssize_t power_events_sysfs_show(struct device *dev,
+				struct device_attribute *attr, char *page)
+{
+	struct perf_pmu_events_attr *pmu_attr;
+
+	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
+
+	return sprintf(page, "event=0x%02llx\n", pmu_attr->id);
+}
+
 struct pmu power_pmu = {
 	.pmu_enable	= power_pmu_enable,
 	.pmu_disable	= power_pmu_disable,
@@ -1537,6 +1547,8 @@ int __cpuinit register_power_pmu(struct power_pmu *pmu)
 	pr_info("%s performance monitor hardware support registered\n",
 		pmu->name);
 
+	power_pmu.attr_groups = ppmu->attr_groups;
+
 #ifdef MSR_HV
 	/*
 	 * Use FCHV to ignore kernel events if MSR.HV is set.
arch/powerpc/perf/power7-pmu.c +34 -0
index eebb36d..269bf24 100644
@@ -374,6 +374,39 @@ static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
 	},
 };
 
+
+GENERIC_EVENT_ATTR(cpu-cycles,			CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-frontend,	GCT_NOSLOT_CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-backend,	CMPLU_STALL);
+GENERIC_EVENT_ATTR(instructions,		INST_CMPL);
+GENERIC_EVENT_ATTR(cache-references,		LD_REF_L1);
+GENERIC_EVENT_ATTR(cache-misses,		LD_MISS_L1);
+GENERIC_EVENT_ATTR(branch-instructions,		BRU_FIN);
+GENERIC_EVENT_ATTR(branch-misses,		BRU_MPRED);
+
+static struct attribute *power7_events_attr[] = {
+	GENERIC_EVENT_PTR(CYC),
+	GENERIC_EVENT_PTR(GCT_NOSLOT_CYC),
+	GENERIC_EVENT_PTR(CMPLU_STALL),
+	GENERIC_EVENT_PTR(INST_CMPL),
+	GENERIC_EVENT_PTR(LD_REF_L1),
+	GENERIC_EVENT_PTR(LD_MISS_L1),
+	GENERIC_EVENT_PTR(BRU_FIN),
+	GENERIC_EVENT_PTR(BRU_MPRED),
+	NULL
+};
+
+
+static struct attribute_group power7_pmu_events_group = {
+	.name = "events",
+	.attrs = power7_events_attr,
+};
+
+static const struct attribute_group *power7_pmu_attr_groups[] = {
+	&power7_pmu_events_group,
+	NULL,
+};
+
 static struct power_pmu power7_pmu = {
 	.name			= "POWER7",
 	.n_counter		= 6,
@@ -385,6 +418,7 @@ static struct power_pmu power7_pmu = {
 	.get_alternatives	= power7_get_alternatives,
 	.disable_pmc		= power7_disable_pmc,
 	.flags			= PPMU_ALT_SIPR,
+	.attr_groups		= power7_pmu_attr_groups,
 	.n_generic		= ARRAY_SIZE(power7_generic_events),
 	.generic_events		= power7_generic_events,
 	.cache_events		= &power7_cache_events,
#8 lore raw

[tip:perf/core] perf/POWER7: Make some POWER7 events available in sysfs

In reply to Sukadev Bhattiprolu
Commit-ID:  886c3b2d677fe248cce8101fa66a1b3e05c3ba16
Gitweb:     http://git.kernel.org/tip/886c3b2d677fe248cce8101fa66a1b3e05c3ba16
Author:     Sukadev Bhattiprolu <[email protected]>
AuthorDate: Tue, 22 Jan 2013 22:25:29 -0800
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 31 Jan 2013 13:07:51 -0300

perf/POWER7: Make some POWER7 events available in sysfs

Make some POWER7-specific perf events available in sysfs.

	$ /bin/ls -1 /sys/bus/event_source/devices/cpu/events/
	branch-instructions
	branch-misses
	cache-misses
	cache-references
	cpu-cycles
	instructions
	PM_BRU_FIN
	PM_BRU_MPRED
	PM_CMPLU_STALL
	PM_CYC
	PM_GCT_NOSLOT_CYC
	PM_INST_CMPL
	PM_LD_MISS_L1
	PM_LD_REF_L1
	stalled-cycles-backend
	stalled-cycles-frontend

where the 'PM_*' events are POWER specific and the others are the generic events.

This will enable users to specify these events with their symbolic names rather than with their raw code.

	perf stat -e 'cpu/PM_CYC' ...
---
 arch/powerpc/include/asm/perf_event_server.h |  3 +++
 arch/powerpc/perf/power7-pmu.c               | 18 ++++++++++++++++++
 2 files changed, 21 insertions(+)
arch/powerpc/include/asm/perf_event_server.h +3 -0
index b9b6c55..b29fcc6 100644
@@ -132,3 +132,6 @@ extern ssize_t power_events_sysfs_show(struct device *dev,
 
 #define	GENERIC_EVENT_ATTR(_name, _id)	EVENT_ATTR(_name, _id, _g)
 #define	GENERIC_EVENT_PTR(_id)		EVENT_PTR(_id, _g)
+
+#define	POWER_EVENT_ATTR(_name, _id)	EVENT_ATTR(PM_##_name, _id, _p)
+#define	POWER_EVENT_PTR(_id)		EVENT_PTR(_id, _p)
arch/powerpc/perf/power7-pmu.c +18 -0
index 269bf24..b554879 100644
@@ -384,6 +384,15 @@ GENERIC_EVENT_ATTR(cache-misses,		LD_MISS_L1);
 GENERIC_EVENT_ATTR(branch-instructions,		BRU_FIN);
 GENERIC_EVENT_ATTR(branch-misses,		BRU_MPRED);
 
+POWER_EVENT_ATTR(CYC,				CYC);
+POWER_EVENT_ATTR(GCT_NOSLOT_CYC,		GCT_NOSLOT_CYC);
+POWER_EVENT_ATTR(CMPLU_STALL,			CMPLU_STALL);
+POWER_EVENT_ATTR(INST_CMPL,			INST_CMPL);
+POWER_EVENT_ATTR(LD_REF_L1,			LD_REF_L1);
+POWER_EVENT_ATTR(LD_MISS_L1,			LD_MISS_L1);
+POWER_EVENT_ATTR(BRU_FIN,			BRU_FIN)
+POWER_EVENT_ATTR(BRU_MPRED,			BRU_MPRED);
+
 static struct attribute *power7_events_attr[] = {
 	GENERIC_EVENT_PTR(CYC),
 	GENERIC_EVENT_PTR(GCT_NOSLOT_CYC),
@@ -393,6 +402,15 @@ static struct attribute *power7_events_attr[] = {
 	GENERIC_EVENT_PTR(LD_MISS_L1),
 	GENERIC_EVENT_PTR(BRU_FIN),
 	GENERIC_EVENT_PTR(BRU_MPRED),
+
+	POWER_EVENT_PTR(CYC),
+	POWER_EVENT_PTR(GCT_NOSLOT_CYC),
+	POWER_EVENT_PTR(CMPLU_STALL),
+	POWER_EVENT_PTR(INST_CMPL),
+	POWER_EVENT_PTR(LD_REF_L1),
+	POWER_EVENT_PTR(LD_MISS_L1),
+	POWER_EVENT_PTR(BRU_FIN),
+	POWER_EVENT_PTR(BRU_MPRED),
 	NULL
 };
 
#19 lore raw

[tip:perf/core] perf: Document the ABI of perf sysfs entries

In reply to Sukadev Bhattiprolu
Commit-ID:  2ac3634a7e1c8eedc961030c87c5c36ebd5bbf8e
Gitweb:     http://git.kernel.org/tip/2ac3634a7e1c8eedc961030c87c5c36ebd5bbf8e
Author:     Sukadev Bhattiprolu <[email protected]>
AuthorDate: Tue, 22 Jan 2013 22:26:45 -0800
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 31 Jan 2013 13:07:51 -0300

perf: Document the ABI of perf sysfs entries

This patchset addes two new sets of files to sysfs for POWER architecture.

- perf event config format in /sys/devices/cpu/format/event
- generic and POWER-specific perf events in /sys/devices/cpu/events/

The format of the first file is already documented in:

sysfs-bus-event_source-devices-format

Document the format of the second set of files '/sys/devices/cpu/events/*' which would also become part of the ABI.

Changelog[v4]:
[Jiri Olsa]: Mention that multiple event= like terms can be specified in the 'events' file.
[Jiri Olsa]: Remove the documentation for the 'config format' file as it is already documented in 'Documentation/ABI/testing/'. [Jiri Olsa]: Move ABI documentation from 'stable/' to 'testing/'

Changelog[v3]:
[Greg KH] Include ABI documentation.

---
 .../testing/sysfs-bus-event_source-devices-events  | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)
Documentation/ABI/stable/sysfs-devices-cpu-events deleted +0 -0
deleted file mode 100644
index e69de29..0000000
Documentation/ABI/testing/sysfs-bus-event_source-devices-events new file +62 -0

62 lines not on this page · raw message

#10 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

In reply to Sukadev Bhattiprolu
Quoted 5 lines · Sukadev Bhattiprolu

[PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of a POWER cpu.

Did this patch go upstream? I don't see it.

If not, please don't merge it.

Quoted 3 lines

The format of the event is the same for all POWER cpus at least in (Power6, Power7), so bulk of this change is common in the code common to POWER cpus.

No. The event format is different on most POWER cpus, in particular it is different on Power6 and Power7, and will be different again on Power8.

cheers

#11 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Michael Ellerman [[email protected]] wrote:

| On Tue, Jan 22, 2013 at 10:26:13PM -0800, Sukadev Bhattiprolu wrote:
| > 
| > [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format
| > 
| > Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event'
| > which describes the format of a POWER cpu.
| 
| Did this patch go upstream? I don't see it.

Hmm, patches 1..4,6 are in linux-tip and Arnaldo's trees but patch 5 is in neither.

| 
| If not, please don't merge it.
| 
| > The format of the event is the same for all POWER cpus at least in
| > (Power6, Power7), so bulk of this change is common in the code common
| > to POWER cpus.
| 
| No. The event format is different on most POWER cpus, in particular it
| is different on Power6 and Power7, and will be different again on
| Power8.

Sigh. The port of this patchset to Power6 has not started yet.

But this patchset does work on Power7 correct ?

If so, and we figure out what happened to patch 5, can we add a patch to to move the format code to power7-pmu.c ?

Sukadev

#12 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Quoted 10 lines · Sukadev Bhattiprolu

Michael Ellerman [[email protected]] wrote:

| On Tue, Jan 22, 2013 at 10:26:13PM -0800, Sukadev Bhattiprolu wrote:
| > 
| > [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format
| > 
| > Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event'
| > which describes the format of a POWER cpu.
| 
| Did this patch go upstream? I don't see it.
Quoted 2 lines

Hmm, patches 1..4,6 are in linux-tip and Arnaldo's trees but patch 5 is in neither.

I suspect Arnaldo was either waiting for an ACK from Ben, or was expecting Ben to take it?

Quoted 9 lines
| > The format of the event is the same for all POWER cpus at least in
| > (Power6, Power7), so bulk of this change is common in the code common
| > to POWER cpus.
| 
| No. The event format is different on most POWER cpus, in particular it
| is different on Power6 and Power7, and will be different again on
| Power8.

Sigh. The port of this patchset to Power6 has not started yet.

It should hardly require a port, it's about five lines. But it doesn't matter for now.

Quoted 1 line

But this patchset does work on Power7 correct ?

Yes, and without it the rest of the series is essentially useless. So I guess it's better than nothing and we should get it in, we can fix it up later to work across different chips.

Ben can you grab it, it's all arch/powerpc.

cheers

#17 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

In reply to Sukadev Bhattiprolu
Quoted 11 lines · Sukadev Bhattiprolu

[PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of a POWER cpu.

arch/powerpc/perf/core-book3s.c +0 -0
index fa476d5..4ae044b 100644

arch/powerpc/perf/core-book3s.c ssize_t power_events_sysfs_show(struct device *dev, · line 1318

Quoted 4 lines
arch/powerpc/perf/core-book3s.c +1 -0
@@ -1315,6 +1315,18 @@ ssize_t power_events_sysfs_show(struct device *dev,
 	return sprintf(page, "event=0x%02llx\n", pmu_attr->id);
 }
 
+PMU_FORMAT_ATTR(event, "config:0-20");

Just noticed, it's 20 bits, which is 0-19.

cheers

#13 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

In reply to Michael Ellerman

Michael Ellerman [[email protected]] wrote:
| I suspect Arnaldo was either waiting for an ACK from Ben, or was | expecting Ben to take it?

Arnaldo, here is an updated patch. If it is acked by Paul Mackerras, Michael Ellerman or Ben, will you add it to your tree so the whole patchset comes from one place ?

Sukadev

---

Quoted 1 line

From 50c7a46f14083c0ed10d66b7aed66ba76e798550 Mon Sep 17 00:00:00 2001

From: Sukadev Bhattiprolu <[email protected]>
Date: Tue, 5 Mar 2013 21:20:56 -0800
Subject: [PATCH] [PATCH 5/6][v4]: perf Create a sysfs format entry for Power7 events

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of the POWER7 PMU events.

This code is based on corresponding code in x86.

Changelog[v4]: [Michael Ellerman, Paul Mckerras] The event format is different
for other POWER cpus. So move the code to POWER7-specific, power7-pmu.c Also, the POWER7 format uses bits 0-19 not 0-20.

Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR rather than duplicating code.

---
 arch/powerpc/perf/power7-pmu.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)
arch/powerpc/perf/power7-pmu.c +13 -0
index b554879..3c475d6 100644
@@ -420,7 +420,20 @@ static struct attribute_group power7_pmu_events_group = {
 	.attrs = power7_events_attr,
 };
 
+PMU_FORMAT_ATTR(event, "config:0-19");
+
+static struct attribute *power7_pmu_format_attr[] = {
+	&format_attr_event.attr,
+	NULL,
+};
+
+struct attribute_group power7_pmu_format_group = {
+	.name = "format",
+	.attrs = power7_pmu_format_attr,
+};
+
 static const struct attribute_group *power7_pmu_attr_groups[] = {
+	&power7_pmu_format_group,
 	&power7_pmu_events_group,
 	NULL,
 };
Signature · 1 line
1.7.1
#14 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Quoted 21 lines · Sukadev Bhattiprolu

Michael Ellerman [[email protected]] wrote:
| I suspect Arnaldo was either waiting for an ACK from Ben, or was | expecting Ben to take it?

Arnaldo, here is an updated patch. If it is acked by Paul Mackerras, Michael Ellerman or Ben, will you add it to your tree so the whole patchset comes from one place ?

Sukadev

---

Quoted 1 line

From 50c7a46f14083c0ed10d66b7aed66ba76e798550 Mon Sep 17 00:00:00 2001

From: Sukadev Bhattiprolu <[email protected]>
Date: Tue, 5 Mar 2013 21:20:56 -0800
Subject: [PATCH] [PATCH 5/6][v4]: perf Create a sysfs format entry for Power7 events

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of the POWER7 PMU events.

This code is based on corresponding code in x86.

Quoted 7 lines

Changelog[v4]: [Michael Ellerman, Paul Mckerras] The event format is different
for other POWER cpus. So move the code to POWER7-specific, power7-pmu.c Also, the POWER7 format uses bits 0-19 not 0-20.

Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR rather than duplicating code.

#15 lore raw

Re: [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format

Quoted 26 lines · Paul Mackerras
Quoted 25 lines · Sukadev Bhattiprolu

Michael Ellerman [[email protected]] wrote:
| I suspect Arnaldo was either waiting for an ACK from Ben, or was | expecting Ben to take it?

Arnaldo, here is an updated patch. If it is acked by Paul Mackerras, Michael Ellerman or Ben, will you add it to your tree so the whole patchset comes from one place ?

Sukadev

---

Quoted 1 line

From 50c7a46f14083c0ed10d66b7aed66ba76e798550 Mon Sep 17 00:00:00 2001

From: Sukadev Bhattiprolu <[email protected]>
Date: Tue, 5 Mar 2013 21:20:56 -0800
Subject: [PATCH] [PATCH 5/6][v4]: perf Create a sysfs format entry for Power7 events

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of the POWER7 PMU events.

This code is based on corresponding code in x86.

Changelog[v4]: [Michael Ellerman, Paul Mckerras] The event format is different
for other POWER cpus. So move the code to POWER7-specific, power7-pmu.c Also, the POWER7 format uses bits 0-19 not 0-20.

Quoted 5 lines
Quoted 3 lines

Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR rather than duplicating code.

cheers

#16 lore raw

[tip:perf/urgent] perf/POWER7: Create a sysfs format entry for Power7 events

In reply to Sukadev Bhattiprolu
perf/POWER7: Create a sysfs format entry for Power7 events
Commit-ID:  3bf7b07ece6e00747602938f68c1db8001b9925f
Gitweb:     http://git.kernel.org/tip/3bf7b07ece6e00747602938f68c1db8001b9925f
Author:     Sukadev Bhattiprolu <[email protected]>
AuthorDate: Tue, 5 Mar 2013 21:48:26 -0800
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Wed, 13 Mar 2013 17:01:04 -0300

perf/POWER7: Create a sysfs format entry for Power7 events

Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event' which describes the format of the POWER7 PMU events.

This code is based on corresponding code in x86.

Changelog[v4]: [Michael Ellerman, Paul Mckerras] The event format is different
for other POWER cpus. So move the code to POWER7-specific, power7-pmu.c Also, the POWER7 format uses bits 0-19 not 0-20.

Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR rather than duplicating code.

---
 arch/powerpc/perf/power7-pmu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/powerpc/perf/power7-pmu.c +13 -0
index b554879..3c475d6 100644
@@ -420,7 +420,20 @@ static struct attribute_group power7_pmu_events_group = {
 	.attrs = power7_events_attr,
 };
 
+PMU_FORMAT_ATTR(event, "config:0-19");
+
+static struct attribute *power7_pmu_format_attr[] = {
+	&format_attr_event.attr,
+	NULL,
+};
+
+struct attribute_group power7_pmu_format_group = {
+	.name = "format",
+	.attrs = power7_pmu_format_attr,
+};
+
 static const struct attribute_group *power7_pmu_attr_groups[] = {
+	&power7_pmu_format_group,
 	&power7_pmu_events_group,
 	NULL,
 };