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MIPS: math-emu: cp1emu: Fix typo when returning to register file

PATCH In review Rob Kendrick 2 participants 2 messages Jul 23, 2014 – Jul 30, 2014 MIPS

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Rob Kendrick

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PATCH 1/1 MIPS: math-emu: cp1emu: Fix typo when returning to register file

The commit 08a07904e182895e1205f399465a3d622c0115b8 (v3.16-rc1) entitled "MIPS: math-emu: Remove most ifdefery":

switched from build time to runtime detection for the CPU ISA level.

However, along the way, a typo was introduced in the code path to return the value to the register file. Previously, the MIPSInst_FD macro was used but the above commit switched to MIPSInst_RT leading to regressions.

Link http://www.linux-mips.org/archives/linux-mips/2014-07/msg00484.html
Reported-by Rob Kendrick <[email protected]>
Reviewed-by Paul Burton <[email protected]>
Signed-off-by Markos Chandras <[email protected]>
Signed-off-by Rob Kendrick <[email protected]>
---
 arch/mips/math-emu/cp1emu.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/mips/math-emu/cp1emu.c +1 -1
index 736c17a..bf0fc6b 100644
@@ -1827,7 +1827,7 @@ dcopuop:
 	case -1:
 
 		if (cpu_has_mips_4_5_r)
-			cbit = fpucondbit[MIPSInst_RT(ir) >> 2];
+			cbit = fpucondbit[MIPSInst_FD(ir) >> 2];
 		else
 			cbit = FPU_CSR_COND;
 		if (rv.w)
Signature · 1 line
1.7.10.4
Tested-by Reviewed-by on v1 1/1
#1 lore raw
Quoted 24 lines · Rob Kendrick

The commit 08a07904e182895e1205f399465a3d622c0115b8 (v3.16-rc1) entitled "MIPS: math-emu: Remove most ifdefery":

switched from build time to runtime detection for the CPU ISA level.

However, along the way, a typo was introduced in the code path to return the value to the register file. Previously, the MIPSInst_FD macro was used but the above commit switched to MIPSInst_RT leading to regressions.

Link http://www.linux-mips.org/archives/linux-mips/2014-07/msg00484.html
Reported-by Rob Kendrick <[email protected]>
Reviewed-by Paul Burton <[email protected]>
Signed-off-by Markos Chandras <[email protected]>
Signed-off-by Rob Kendrick <[email protected]>
---
 arch/mips/math-emu/cp1emu.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/mips/math-emu/cp1emu.c +0 -0
index 736c17a..bf0fc6b 100644

arch/mips/math-emu/cp1emu.c dcopuop: · line 1833

Quoted 8 lines
arch/mips/math-emu/cp1emu.c +1 -1
@@ -1827,7 +1827,7 @@ dcopuop:
 	case -1:
 
 		if (cpu_has_mips_4_5_r)
-			cbit = fpucondbit[MIPSInst_RT(ir) >> 2];
+			cbit = fpucondbit[MIPSInst_FD(ir) >> 2];
 		else
 			cbit = FPU_CSR_COND;
 		if (rv.w)

Looking at commit 8a07904e, the typo looks obvious. Moreover I have tested that using QEMU, and I can confirm the issue. I can also confirm the patch fixes the issue.

Tested-by Aurelien Jarno <[email protected]>
Reviewed-by Aurelien Jarno <[email protected]>
Signature · 2 lines
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
[email protected]                 http://www.aurel32.net