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drm/radeon: remove some buggy dead code

PATCH Applied Dan Carpenter 2 participants 2 messages Oct 29, 2014

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DRM drivers Kernel janitors Radeon and amdgpu DRM drivers
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Dan Carpenter

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#0 lore raw

PATCH 1/1 drm/radeon: remove some buggy dead code

The calculation of "num_shader_engines" has a precedence bug because the right shift happens before the mask, but this variable is never used so we can just delete it.

Signed-off-by Dan Carpenter <[email protected]>
drivers/gpu/drm/radeon/evergreen.c +1 -3
index a31f1ca..f37d39d 100644
@@ -3005,7 +3005,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
 	u32 vgt_cache_invalidation;
 	u32 hdp_host_path_cntl, tmp;
 	u32 disabled_rb_mask;
-	int i, j, num_shader_engines, ps_thread_count;
+	int i, j, ps_thread_count;
 
 	switch (rdev->family) {
 	case CHIP_CYPRESS:

@@ -3303,8 +3303,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
 	rdev->config.evergreen.tile_config | 		((gb_addr_config & 0x30000000) >> 28) << 12;
 
-	num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1;
-
 	if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) {
 		u32 efuse_straps_4;
 		u32 efuse_straps_3;
Applied
#1 lore raw
Quoted 5 lines · Dan Carpenter

The calculation of "num_shader_engines" has a precedence bug because the right shift happens before the mask, but this variable is never used so we can just delete it.

Signed-off-by Dan Carpenter <[email protected]>

Applied in preference to Joe Perches's patch.

Thanks!

Alex

Quoted 26 lines
drivers/gpu/drm/radeon/evergreen.c +1 -3
index a31f1ca..f37d39d 100644
@@ -3005,7 +3005,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
        u32 vgt_cache_invalidation;
        u32 hdp_host_path_cntl, tmp;
        u32 disabled_rb_mask;
-       int i, j, num_shader_engines, ps_thread_count;
+       int i, j, ps_thread_count;
 
        switch (rdev->family) {
        case CHIP_CYPRESS:

@@ -3303,8 +3303,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
        rdev->config.evergreen.tile_config |>                 ((gb_addr_config & 0x30000000) >> 28) << 12;
 
-       num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1;
-
        if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) {
                u32 efuse_straps_4;
                u32 efuse_straps_3;

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