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clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabled

PATCH In review Dmitry Torokhov 5 participants 6 messages Nov 12, 2014 – Nov 13, 2014

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#0 lore raw

PATCH 1/1 clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabled

Currently there is no driver owning these clocks and they have to stay up for the system to function properly, so let's mark them as CLK_IGNORE_UNUSED.

Without this patch we have trouble with suspend/resume and we have trouble turning the eDP back on if it ever idles off.

---
 drivers/clk/rockchip/clk-rk3288.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/rockchip/clk-rk3288.c +2 -2
index 2327829..d79d52f 100644
@@ -724,14 +724,14 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 	GATE(HCLK_VIP, "hclk_vip", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 15, GFLAGS),
 	GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 3, GFLAGS),
 	GATE(HCLK_ISP, "hclk_isp", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 1, GFLAGS),
-	GATE(HCLK_VIO2_H2P, "hclk_vio2_h2p", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 10, GFLAGS),
+	GATE(HCLK_VIO2_H2P, "hclk_vio2_h2p", "hclk_vio", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(16), 10, GFLAGS),
 	GATE(PCLK_MIPI_DSI0, "pclk_mipi_dsi0", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 4, GFLAGS),
 	GATE(PCLK_MIPI_DSI1, "pclk_mipi_dsi1", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 5, GFLAGS),
 	GATE(PCLK_MIPI_CSI, "pclk_mipi_csi", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 6, GFLAGS),
 	GATE(PCLK_LVDS_PHY, "pclk_lvds_phy", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 7, GFLAGS),
 	GATE(PCLK_EDP_CTRL, "pclk_edp_ctrl", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 8, GFLAGS),
 	GATE(PCLK_HDMI_CTRL, "pclk_hdmi_ctrl", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 9, GFLAGS),
-	GATE(PCLK_VIO2_H2P, "pclk_vio2_h2p", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 11, GFLAGS),
+	GATE(PCLK_VIO2_H2P, "pclk_vio2_h2p", "hclk_vio", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(16), 11, GFLAGS),
 
 	/* aclk_vio0 gates */
 	GATE(ACLK_VOP0, "aclk_vop0", "aclk_vio0", 0, RK3288_CLKGATE_CON(15), 5, GFLAGS),
Signature · 5 lines
2.1.0.rc2.206.gedb03e5


-- 
Dmitry
Reviewed-by Tested-by on v1 1/1
#1 lore raw

Hi,

Quoted 4 lines · Dmitry Torokhov

Currently there is no driver owning these clocks and they have to stay up for the system to function properly, so let's mark them as CLK_IGNORE_UNUSED.

Quoted 8 lines

Without this patch we have trouble with suspend/resume and we have trouble turning the eDP back on if it ever idles off.

---
 drivers/clk/rockchip/clk-rk3288.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

I'm already on the signed-off-by (mostly because I tweaked the commit message and tested this), but in case anyone cares I have reviewed this and tested it. ;)

...obviously we want to get to the bottom of the right way to handle all of these clocks, but since we _just_ removed the blanket "leave all clocks enabled" adding a few clocks back into the fold seems sane until we get all our ducks in a row.

#2 lore raw

Quoting Doug Anderson (2014-11-12 13:49:18)

Quoted 20 lines

Hi,

Quoted 4 lines · Dmitry Torokhov

Currently there is no driver owning these clocks and they have to stay up for the system to function properly, so let's mark them as CLK_IGNORE_UNUSED.

Quoted 8 lines

Without this patch we have trouble with suspend/resume and we have trouble turning the eDP back on if it ever idles off.

---
 drivers/clk/rockchip/clk-rk3288.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

I'm already on the signed-off-by (mostly because I tweaked the commit message and tested this), but in case anyone cares I have reviewed this and tested it. ;)

Quoted 7 lines

...obviously we want to get to the bottom of the right way to handle all of these clocks, but since we _just_ removed the blanket "leave all clocks enabled" adding a few clocks back into the fold seems sane until we get all our ducks in a row.

Seems fine to me. Just to be clear, Heiko will be picking up the Rockchip clock patches and submitting a PR, correct? I believe last merge window was the first time we did that for Rockchip and it went well.

Regards,
Mike

Reviewed-by on v1 1/1
#4 lore raw
In reply to Dmitry Torokhov

Hi Dmitry,

Quoted 24 lines · Dmitry Torokhov

Currently there is no driver owning these clocks and they have to stay up for the system to function properly, so let's mark them as CLK_IGNORE_UNUSED.

Without this patch we have trouble with suspend/resume and we have trouble turning the eDP back on if it ever idles off.

---
  drivers/clk/rockchip/clk-rk3288.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/rockchip/clk-rk3288.c +1 -1
index 2327829..d79d52f 100644
@@ -724,14 +724,14 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
  	GATE(HCLK_VIP, "hclk_vip", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 15, GFLAGS),
  	GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 3, GFLAGS),
  	GATE(HCLK_ISP, "hclk_isp", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 1, GFLAGS),
-	GATE(HCLK_VIO2_H2P, "hclk_vio2_h2p", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 10, GFLAGS),
+	GATE(HCLK_VIO2_H2P, "hclk_vio2_h2p", "hclk_vio", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(16), 10, GFLAGS),
  	GATE(PCLK_MIPI_DSI0, "pclk_mipi_dsi0", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 4, GFLAGS),

drivers/clk/rockchip/clk-rk3288.c static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { · line 737

Quoted 10 lines
drivers/clk/rockchip/clk-rk3288.c +1 -1
  	GATE(PCLK_MIPI_DSI1, "pclk_mipi_dsi1", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 5, GFLAGS),
  	GATE(PCLK_MIPI_CSI, "pclk_mipi_csi", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 6, GFLAGS),
  	GATE(PCLK_LVDS_PHY, "pclk_lvds_phy", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 7, GFLAGS),
  	GATE(PCLK_EDP_CTRL, "pclk_edp_ctrl", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 8, GFLAGS),
  	GATE(PCLK_HDMI_CTRL, "pclk_hdmi_ctrl", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 9, GFLAGS),
-	GATE(PCLK_VIO2_H2P, "pclk_vio2_h2p", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 11, GFLAGS),
+	GATE(PCLK_VIO2_H2P, "pclk_vio2_h2p", "hclk_vio", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(16), 11, GFLAGS),
 
  	/* aclk_vio0 gates */
  	GATE(ACLK_VOP0, "aclk_vop0", "aclk_vio0", 0, RK3288_CLKGATE_CON(15), 5, GFLAGS),

The H/PCLK_VIO2_H2P is some kind of bus clock for a ahb2apb bridge inside the VIO,
it should be on when some of VIO logic is working, but it is not easy to assign these
two clocks to module driver. I think it is reasonable to mark with CLK_IGNORE_UNUSED
tag so far.

maintainer
#3 lore raw
In reply to Mike Turquette

Hi Mike,

Am Mittwoch, 12. November 2014, 16:40:46 schrieb Mike Turquette:

Quoted 4 lines

Seems fine to me. Just to be clear, Heiko will be picking up the Rockchip clock patches and submitting a PR, correct? I believe last merge window was the first time we did that for Rockchip and it went well.

yep, I'm picking up the clock patches.

Heiko

maintainer
#5 lore raw
In reply to Dmitry Torokhov

Am Mittwoch, 12. November 2014, 13:38:45 schrieb Dmitry Torokhov:

Quoted 9 lines

Currently there is no driver owning these clocks and they have to stay up for the system to function properly, so let's mark them as CLK_IGNORE_UNUSED.

Without this patch we have trouble with suspend/resume and we have trouble turning the eDP back on if it ever idles off.

I've added this patch to my v3.19-clk/next branch.

After talking with Doug we agreed on replacing his Signed-Off with the Reviewed and Tested tags, because his prior involvement was "mostly because I tweaked the commit message and tested this" - making the new tags fit better.