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NVMe: make setup work for devices that don't do INTx

PATCH New Jens Axboe 2 participants 4 messages Nov 14, 2014 – Nov 20, 2014

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Jens Axboe

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#0 lore raw

PATCH 1/1 NVMe: make setup work for devices that don't do INTx

The setup/probe part currently relies on INTx being there and working, that's not always the case. For devices that don't advertise INTx, enable a single MSIx vector early on and disable it again before we ask for our full range of queue vecs.

Signed-off-by Jens Axboe <axboe at fb.com>
---
 drivers/block/nvme-core.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
drivers/block/nvme-core.c +19 -0
index fc2fc53992cb..ee533aabf479 100644
@@ -2009,6 +2009,13 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
 	/* Deregister the admin queue's interrupt */
 	free_irq(dev->entry[0].vector, adminq);
 
+	/*
+	 * If we enable msix early due to not intx, disable it again before
+	 * setting up the full range we need.
+	 */
+	if (!pdev->irq)
+		pci_disable_msix(pdev);
+
 	for (i = 0; i < nr_io_queues; i++)
 		dev->entry[i].entry = i;
 	vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
@@ -2161,10 +2168,22 @@ static int nvme_dev_map(struct nvme_dev *dev)
 	dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
 	if (!dev->bar)
 		goto disable;
+
 	if (readl(&dev->bar->csts) == -1) {
 		result = -ENODEV;
 		goto unmap;
 	}
+
+	/*
+	 * Some devices don't advertse INTx interrupts, pre-enable a single
+	 * MSIX vec for setup. We'll adjust this later.
+	 */
+	if (!pdev->irq) {
+		result = pci_enable_msix(pdev, dev->entry, 1);
+		if (result < 0)
+			goto unmap;
+	}
+
 	cap = readq(&dev->bar->cap);
 	dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
 	dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
Signature · 4 lines
1.9.1

-- 
Jens Axboe
#1 lore raw

PATCH 1/1 NVMe: make setup work for devices that don't do INTx

Quoted 4 lines · Jens Axboe

The setup/probe part currently relies on INTx being there and working, that's not always the case. For devices that don't advertise INTx, enable a single MSIx vector early on and disable it again before we ask for our full range of queue vecs.

Acked-by Keith Busch <keith.busch at intel.com>

I have an early sample platform that has the same behavior. I thought it was just a buggy prototype, but the h/w makers tell me it's designed that way.

Quoted 1 line
Signed-off-by Jens Axboe <axboe at fb.com>
author
#2 lore raw

PATCH 1/1 NVMe: make setup work for devices that don't do INTx

Quoted 11 lines · Keith Busch
Quoted 4 lines · Jens Axboe

The setup/probe part currently relies on INTx being there and working, that's not always the case. For devices that don't advertise INTx, enable a single MSIx vector early on and disable it again before we ask for our full range of queue vecs.

Acked-by Keith Busch <keith.busch at intel.com>

I have an early sample platform that has the same behavior. I thought it was just a buggy prototype, but the h/w makers tell me it's designed that way.

I believe they are correct :-)

Thanks for the ack, I'll add this to the 3.19 mix. Did you take a look at the other two trivial patches?

Signature · 1 line
Jens Axboe
#3 lore raw

PATCH 1/1 NVMe: make setup work for devices that don't do INTx

Quoted 2 lines · Jens Axboe

Thanks for the ack, I'll add this to the 3.19 mix. Did you take a look at the other two trivial patches?

Yep, the others look pretty obvious, so no objections to either.