x86/platform changes for v4.5

GIT PULL Ingo Molnar 1 participant 1 message Jan 11, 2016

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Ingo Molnar

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2016-01-11 15:07 UTC #0 lore raw

Linus,

Please pull the latest x86-platform-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-platform-for-linus

# HEAD: d6b56b0bc68ba7927b286da86eda1d4d4dbe63f6 x86/platform/calgary: Constify cal_chipset_ops structures

Two changes:

- one to quirk-save/restore certain system MSRs across suspend/resume, to make certain Intel systems work better (Chen Yu)

- and also to constify a read only structure (Julia Lawall)

Thanks,

Ingo

------------------>
Chen Yu (1):
x86/pm: Introduce quirk framework to save/restore extra MSR registers around suspend/resume

Julia Lawall (1):
x86/platform/calgary: Constify cal_chipset_ops structures

 arch/x86/include/asm/calgary.h    |  2 +-
 arch/x86/include/asm/msr.h        | 10 +++++
 arch/x86/include/asm/suspend_32.h |  1 +
 arch/x86/include/asm/suspend_64.h |  1 +
 arch/x86/kernel/pci-calgary_64.c  |  4 +-
 arch/x86/power/cpu.c              | 92 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 107 insertions(+), 3 deletions(-)

arch/x86/include/asm/calgary.h +1 -1

index 0d467b338835..a8303ebe089f 100644
@@ -31,7 +31,7 @@
 #include <asm/types.h>
 
 struct iommu_table {
-	struct cal_chipset_ops *chip_ops; /* chipset specific funcs */
+	const struct cal_chipset_ops *chip_ops; /* chipset specific funcs */
 	unsigned long  it_base;      /* mapped address of tce table */
 	unsigned long  it_hint;      /* Hint for next alloc */
 	unsigned long *it_map;       /* A simple allocation bitmap for now */

arch/x86/include/asm/msr.h +10 -0

index 77d8b284e4a7..24feb3c1dc41 100644
@@ -32,6 +32,16 @@ struct msr_regs_info {
 	int err;
 };
 
+struct saved_msr {
+	bool valid;
+	struct msr_info info;
+};
+
+struct saved_msrs {
+	unsigned int num;
+	struct saved_msr *array;
+};
+
 static inline unsigned long long native_read_tscp(unsigned int *aux)
 {
 	unsigned long low, high;

arch/x86/include/asm/suspend_32.h +1 -0

index d1793f06854d..8e9dbe7b73a1 100644
@@ -15,6 +15,7 @@ struct saved_context {
 	unsigned long cr0, cr2, cr3, cr4;
 	u64 misc_enable;
 	bool misc_enable_saved;
+	struct saved_msrs saved_msrs;
 	struct desc_ptr gdt_desc;
 	struct desc_ptr idt;
 	u16 ldt;

arch/x86/include/asm/suspend_64.h +1 -0

index 7ebf0ebe4e68..6136a18152af 100644
@@ -24,6 +24,7 @@ struct saved_context {
 	unsigned long cr0, cr2, cr3, cr4, cr8;
 	u64 misc_enable;
 	bool misc_enable_saved;
+	struct saved_msrs saved_msrs;
 	unsigned long efer;
 	u16 gdt_pad; /* Unused */
 	struct desc_ptr gdt_desc;

arch/x86/kernel/pci-calgary_64.c +2 -2

index 0497f719977d..833b1d329c47 100644
@@ -180,13 +180,13 @@ static void calioc2_dump_error_regs(struct iommu_table *tbl);
 static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl);
 static void get_tce_space_from_tar(void);
 
-static struct cal_chipset_ops calgary_chip_ops = {
+static const struct cal_chipset_ops calgary_chip_ops = {
 	.handle_quirks = calgary_handle_quirks,
 	.tce_cache_blast = calgary_tce_cache_blast,
 	.dump_error_regs = calgary_dump_error_regs
 };
 
-static struct cal_chipset_ops calioc2_chip_ops = {
+static const struct cal_chipset_ops calioc2_chip_ops = {
 	.handle_quirks = calioc2_handle_quirks,
 	.tce_cache_blast = calioc2_tce_cache_blast,
 	.dump_error_regs = calioc2_dump_error_regs

arch/x86/power/cpu.c +92 -0

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