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x86/timers changes for v4.8

GIT PULL Ingo Molnar 1 participant 1 message Jul 25, 2016 x86

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Linus,

Please pull the latest x86-timers-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-timers-for-linus

# HEAD: c48ec42d6eae08f55685ab660f0743ed33b9f22a x86/tsc: Remove the unused check_tsc_disabled()

The main change in this tree is the reworking, fixing and extension of the TSC frequency enumeration code. (by Len Brown)

Thanks,

Ingo

------------------>
Len Brown (9):
Revert "x86/tsc: Add missing Cherrytrail frequency to the table" x86/tsc_msr: Identify Intel-specific code x86/tsc_msr: Remove debugging messages
x86/tsc_msr: Update comments, expand definitions x86/tsc_msr: Correct Silvermont reference clock values x86/tsc_msr: Add Airmont reference clock values x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration x86/tsc: Enumerate SKL cpu_khz and tsc_khz via CPUID x86/tsc: Enumerate BXT tsc_khz via CPUID

Wei Jiangang (1):
x86/tsc: Remove the unused check_tsc_disabled()

 arch/x86/include/asm/tsc.h      |   5 +-
 arch/x86/include/asm/x86_init.h |   4 +-
 arch/x86/kernel/tsc.c           | 100 +++++++++++++++++++++++++++++++++-------
 arch/x86/kernel/tsc_msr.c       |  68 +++++++++------------------
 arch/x86/kernel/x86_init.c      |   1 +
 5 files changed, 110 insertions(+), 68 deletions(-)
arch/x86/include/asm/tsc.h +2 -3
index 7428697c5b8d..33b6365c22fe 100644
@@ -35,7 +35,7 @@ extern void tsc_init(void);
 extern void mark_tsc_unstable(char *reason);
 extern int unsynchronized_tsc(void);
 extern int check_tsc_unstable(void);
-extern int check_tsc_disabled(void);
+extern unsigned long native_calibrate_cpu(void);
 extern unsigned long native_calibrate_tsc(void);
 extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
 
@@ -52,7 +52,6 @@ extern int notsc_setup(char *);
 extern void tsc_save_sched_clock_state(void);
 extern void tsc_restore_sched_clock_state(void);
 
-/* MSR based TSC calibration for Intel Atom SoC platforms */
-unsigned long try_msr_calibrate_tsc(void);
+unsigned long cpu_khz_from_msr(void);
 
 #endif /* _ASM_X86_TSC_H */
arch/x86/include/asm/x86_init.h +3 -1
index 4dcdf74dfed8..08a08a800e17 100644
@@ -181,7 +181,8 @@ struct x86_legacy_features {
 
 /**
  * struct x86_platform_ops - platform specific runtime functions
- * @calibrate_tsc:		calibrate TSC
+ * @calibrate_cpu:		calibrate CPU
+ * @calibrate_tsc:		calibrate TSC, if different from CPU
  * @get_wallclock:		get time from HW clock like RTC etc.
  * @set_wallclock:		set time back to HW clock
  * @is_untracked_pat_range	exclude from PAT logic
@@ -200,6 +201,7 @@ struct x86_legacy_features {
  * 				semantics.
  */
 struct x86_platform_ops {
+	unsigned long (*calibrate_cpu)(void);
 	unsigned long (*calibrate_tsc)(void);
 	void (*get_wallclock)(struct timespec *ts);
 	int (*set_wallclock)(const struct timespec *ts);
arch/x86/kernel/tsc.c +83 -17

158 lines not on this page · raw message

arch/x86/kernel/tsc_msr.c +21 -47

117 lines not on this page · raw message

arch/x86/kernel/x86_init.c +1 -0
index dad5fe9633a3..58b459296e13 100644
@@ -92,6 +92,7 @@ static void default_nmi_init(void) { };
 static int default_i8042_detect(void) { return 1; };
 
 struct x86_platform_ops x86_platform = {
+	.calibrate_cpu			= native_calibrate_cpu,
 	.calibrate_tsc			= native_calibrate_tsc,
 	.get_wallclock			= mach_get_cmos_time,
 	.set_wallclock			= mach_set_rtc_mmss,