Skip to contentSkip to conversation

x86/cpu: Rename Merrifield2 to Moorefield

PATCH New Andy Shevchenko 2 participants 2 messages Sep 6, 2016 – Sep 8, 2016

Subsystems (4)
x86 PCI Power management core Intel CPU family model numbers
lore
Share & tools
lore

Andy Shevchenko

author
#0 lore raw

PATCH v2 1/1 x86/cpu: Rename Merrifield2 to Moorefield

Merrifield2 is actually Moorefield.

Rename it accordingly and drop tail digit from Merrifield1.

Cc Dave Hansen <[email protected]>
Signed-off-by Andy Shevchenko <[email protected]>

---
- fix spelling typo in commit message

 arch/x86/include/asm/intel-family.h       | 4 ++--
 arch/x86/platform/atom/punit_atom_debug.c | 2 +-
 drivers/pci/pci-mid.c                     | 2 +-
 drivers/powercap/intel_rapl.c             | 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)
arch/x86/include/asm/intel-family.h +2 -2
index 6277194..9ae5ab8 100644
@@ -56,8 +56,8 @@
 #define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */
 #define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */
 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */
-#define INTEL_FAM6_ATOM_MERRIFIELD1	0x4A /* Tangier */
-#define INTEL_FAM6_ATOM_MERRIFIELD2	0x5A /* Annidale */
+#define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
+#define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Annidale */
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
arch/x86/platform/atom/punit_atom_debug.c +1 -1
index 8ff7b93..d49d3be 100644
@@ -155,7 +155,7 @@ static void punit_dbgfs_unregister(void)
 
 static const struct x86_cpu_id intel_punit_cpu_ids[] = {
 	ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
-	ICPU(INTEL_FAM6_ATOM_MERRIFIELD1, punit_device_tng),
+	ICPU(INTEL_FAM6_ATOM_MERRIFIELD,  punit_device_tng),
 	ICPU(INTEL_FAM6_ATOM_AIRMONT,	  punit_device_cht),
 	{}
 };
drivers/pci/pci-mid.c +1 -1
index c878aa7..b7ea64f 100644
@@ -61,7 +61,7 @@ static struct pci_platform_pm_ops mid_pci_platform_pm = {
 #define ICPU(model)	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 
 static const struct x86_cpu_id lpss_cpu_ids[] = {
-	ICPU(INTEL_FAM6_ATOM_MERRIFIELD1),
+	ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
 	{}
 };
drivers/powercap/intel_rapl.c +2 -2
index fbab29d..243b233 100644
@@ -1154,8 +1154,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
 
 	RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1,	rapl_defaults_byt),
 	RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT,	rapl_defaults_cht),
-	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1,	rapl_defaults_tng),
-	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2,	rapl_defaults_ann),
+	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD,	rapl_defaults_tng),
+	RAPL_CPU(INTEL_FAM6_ATOM_MOOREFIELD,	rapl_defaults_ann),
 	RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT,	rapl_defaults_core),
 	RAPL_CPU(INTEL_FAM6_ATOM_DENVERTON,	rapl_defaults_core),
Signature · 1 line
2.9.3
merge bot
#1 lore raw
x86/cpu: Rename Merrifield2 to Moorefield
Commit-ID:  f5fbf848303c8704d0e1a1e7cabd08fd0a49552f
Gitweb:     http://git.kernel.org/tip/f5fbf848303c8704d0e1a1e7cabd08fd0a49552f
Author:     Andy Shevchenko <[email protected]>
AuthorDate: Tue, 6 Sep 2016 21:42:54 +0300
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 8 Sep 2016 08:13:08 +0200

x86/cpu: Rename Merrifield2 to Moorefield

Merrifield2 is actually Moorefield.

Rename it accordingly and drop tail digit from Merrifield1.

Signed-off-by Andy Shevchenko <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Thomas Gleixner <[email protected]>
Link http://lkml.kernel.org/r/[email protected] open here
Signed-off-by Ingo Molnar <[email protected]>
---
 arch/x86/include/asm/intel-family.h       | 4 ++--
 arch/x86/platform/atom/punit_atom_debug.c | 2 +-
 drivers/pci/pci-mid.c                     | 2 +-
 drivers/powercap/intel_rapl.c             | 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)
arch/x86/include/asm/intel-family.h +2 -2
index 6277194..9ae5ab8 100644
@@ -56,8 +56,8 @@
 #define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */
 #define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */
 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */
-#define INTEL_FAM6_ATOM_MERRIFIELD1	0x4A /* Tangier */
-#define INTEL_FAM6_ATOM_MERRIFIELD2	0x5A /* Annidale */
+#define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
+#define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Annidale */
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
arch/x86/platform/atom/punit_atom_debug.c +1 -1
index 8ff7b93..d49d3be 100644
@@ -155,7 +155,7 @@ static void punit_dbgfs_unregister(void)
 
 static const struct x86_cpu_id intel_punit_cpu_ids[] = {
 	ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
-	ICPU(INTEL_FAM6_ATOM_MERRIFIELD1, punit_device_tng),
+	ICPU(INTEL_FAM6_ATOM_MERRIFIELD,  punit_device_tng),
 	ICPU(INTEL_FAM6_ATOM_AIRMONT,	  punit_device_cht),
 	{}
 };
drivers/pci/pci-mid.c +1 -1
index c878aa7..b7ea64f 100644
@@ -61,7 +61,7 @@ static struct pci_platform_pm_ops mid_pci_platform_pm = {
 #define ICPU(model)	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 
 static const struct x86_cpu_id lpss_cpu_ids[] = {
-	ICPU(INTEL_FAM6_ATOM_MERRIFIELD1),
+	ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
 	{}
 };
drivers/powercap/intel_rapl.c +2 -2
index fbab29d..243b233 100644
@@ -1154,8 +1154,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
 
 	RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1,	rapl_defaults_byt),
 	RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT,	rapl_defaults_cht),
-	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1,	rapl_defaults_tng),
-	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2,	rapl_defaults_ann),
+	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD,	rapl_defaults_tng),
+	RAPL_CPU(INTEL_FAM6_ATOM_MOOREFIELD,	rapl_defaults_ann),
 	RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT,	rapl_defaults_core),
 	RAPL_CPU(INTEL_FAM6_ATOM_DENVERTON,	rapl_defaults_core),