lsl / lsr possible confusion in v7_flush_dcache_all

While reading the v7_flush_dcache_all (arch/arm/mm/cache-v7.S), I stumbled upon this line:

# r10 is the current cache level
127: add    r2, r10, r10, lsr #1	    @ work out 3x current cache level

If we want r2 to be 3 * r10, we should compute r10 + (r10 << 1), which is lsl, not lsr.

I check for a recent kernel, the issue seems to still be here:

repo:       git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
revision:   d71f058617564750261b673ea9b3352382b9cde4

Quoted 6 lines · Vincent Siles

While reading the v7_flush_dcache_all (arch/arm/mm/cache-v7.S), I stumbled upon this line:

# r10 is the current cache level
127: add    r2, r10, r10, lsr #1	    @ work out 3x current cache level

Quoted 6 lines

If we want r2 to be 3 * r10, we should compute r10 + (r10 << 1), which is lsl, not lsr.

I check for a recent kernel, the issue seems to still be here:

repo:       git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
revision:   d71f058617564750261b673ea9b3352382b9cde4

This code is take pretty much verbatim from the ARM ARM and, despite being fairly obfuscated, does what it says on the tin. r10 is incremented by 2 each time round the loop, so this is basically doing 2i + (2i / 2).

Will