x86/platform changes for v4.9

Linus,

Please pull the latest x86-platform-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-platform-for-linus

# HEAD: 65f7422288cd19c4a9202c4ac7a9cca673b9b2ea x86/platform/mellanox: Fix return value check in mlxplat_init()

The main changes in this cycle were:

- SGI UV updates (Andrew Banman)

- Intel MID updates (Andy Shevchenko)

- Initial Mellanox systems platform (Vadim Pasternak)

out-of-topic modifications in x86-platform-for-linus:
-------------------------------------------------------
MAINTAINERS # 58cbbee2391c: x86/platform/mellanox: Intro
drivers/pci/pci-mid.c # 8e522e1d321b: x86/platform/intel-mid: Add

                                   # f5fbf848303c: x86/cpu: Rename Merrifield2 

drivers/powercap/intel_rapl.c # f5fbf848303c: x86/cpu: Rename Merrifield2

Thanks,

Ingo

------------------>
Andrew Banman (10):
x86/platform/uv/BAU: Clean up vertical alignment x86/platform/uv/BAU: Clean up and update printks x86/platform/uv/BAU: Clean up pq_init()
x86/platform/uv/BAU: Convert uv_physnodeaddr() use to uv_gpa_to_offset() x86/platform/uv/BAU: Add generic function pointers x86/platform/uv/BAU: Use generic function pointers x86/platform/uv/BAU: Populate ->uvhub_version with UV4 version information x86/platform/uv/BAU: Disable software timeout on UV4 hardware x86/platform/uv/BAU: Fix payload queue setup on UV4 hardware x86/platform/uv/BAU: Add UV4-specific functions

Andy Shevchenko (7):
x86/platform/intel-mid: Run PWRMU command immediately x86/platform/intel-mid: Enable WiFi on Intel Edison x86/platform/intel-mid: Enable SD card detection on Merrifield x86/platform/intel-mid: Implement power off sequence x86/cpu: Rename Merrifield2 to Moorefield x86/platform/intel-mid: Add Intel Penwell to ID table x86/platform/intel-mid: Keep SRAM powered on at boot

Vadim Pasternak (1):
x86/platform/mellanox: Introduce support for Mellanox systems platform

Wei Yongjun (1):
x86/platform/mellanox: Fix return value check in mlxplat_init()

 MAINTAINERS                                        |   6 +
 arch/x86/Kconfig                                   |  12 +
 arch/x86/include/asm/intel-family.h                |   4 +-
 arch/x86/include/asm/intel-mid.h                   |   2 +
 arch/x86/include/asm/intel_scu_ipc.h               |   2 +
 arch/x86/include/asm/uv/uv_bau.h                   |  45 +++-
 arch/x86/platform/Makefile                         |   1 +
 arch/x86/platform/atom/punit_atom_debug.c          |   2 +-
 arch/x86/platform/intel-mid/device_libs/Makefile   |   4 +
 .../intel-mid/device_libs/platform_bcm43xx.c       |  95 ++++++++
 .../intel-mid/device_libs/platform_mrfld_sd.c      |  47 ++++
 arch/x86/platform/intel-mid/intel-mid.c            |   5 +
 arch/x86/platform/intel-mid/pwr.c                  |  76 +++++-
 arch/x86/platform/mellanox/Makefile                |   1 +
 arch/x86/platform/mellanox/mlx-platform.c          | 266 +++++++++++++++++++++
 arch/x86/platform/uv/tlb_uv.c                      | 178 ++++++++------
 drivers/pci/pci-mid.c                              |   7 +-
 drivers/powercap/intel_rapl.c                      |   4 +-
 18 files changed, 669 insertions(+), 88 deletions(-)
 create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_bcm43xx.c
 create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_mrfld_sd.c
 create mode 100644 arch/x86/platform/mellanox/Makefile
 create mode 100644 arch/x86/platform/mellanox/mlx-platform.c

index a0ce40f4c66c..2adc6ef635ce 100644
@@ -7668,6 +7668,12 @@ W:	http://www.mellanox.com
 Q:	http://patchwork.ozlabs.org/project/netdev/list/
 F:	drivers/net/ethernet/mellanox/mlxsw/
 
+MELLANOX PLATFORM DRIVER
+M:      Vadim Pasternak <[email protected]>
+L:      [email protected]
+S:      Supported
+F:      arch/x86/platform/mellanox/mlx-platform.c
+
 SOFT-ROCE DRIVER (rxe)
 M:	Moni Shoua <[email protected]>
 L:	[email protected]

index 2a1f0ce7c59a..a72b01b225f2 100644
@@ -549,6 +549,18 @@ config X86_INTEL_QUARK
 	  Say Y here if you have a Quark based system such as the Arduino
 	  compatible Intel Galileo.
 
+config MLX_PLATFORM
+	tristate "Mellanox Technologies platform support"
+	depends on X86_64
+	depends on X86_EXTENDED_PLATFORM
+	---help---
+	  This option enables system support for the Mellanox Technologies
+	  platform.
+
+	  Say Y here if you are building a kernel for Mellanox system.
+
+	  Otherwise, say N.
+
 config X86_INTEL_LPSS
 	bool "Intel Low Power Subsystem Support"
 	depends on X86 && ACPI

index 627719475457..9ae5ab80a497 100644
@@ -56,8 +56,8 @@
 #define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */
 #define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */
 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */
-#define INTEL_FAM6_ATOM_MERRIFIELD1	0x4A /* Tangier */
-#define INTEL_FAM6_ATOM_MERRIFIELD2	0x5A /* Annidale */
+#define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
+#define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Annidale */
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
 

index 9d6b097aa73d..5b6753d1f7f4 100644
@@ -18,6 +18,8 @@
 extern int intel_mid_pci_init(void);
 extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state);
 
+extern void intel_mid_pwr_power_off(void);
+
 #define INTEL_MID_PWR_LSS_OFFSET	4
 #define INTEL_MID_PWR_LSS_TYPE		(1 << 7)
 

index 925b605eb5c6..4fb1d0abef95 100644
@@ -3,6 +3,8 @@
 
 #include <linux/notifier.h>
 
+#define IPCMSG_COLD_OFF		0x80	/* Only for Tangier */
+
 #define IPCMSG_WARM_RESET	0xF0
 #define IPCMSG_COLD_RESET	0xF1
 #define IPCMSG_SOFT_RESET	0xF2

index 184842ef332e..3c3c19ea94df 100644
@@ -8,6 +8,7 @@ obj-y	+= iris/
 obj-y	+= intel/
 obj-y	+= intel-mid/
 obj-y	+= intel-quark/
+obj-y	+= mellanox/
 obj-y	+= olpc/
 obj-y	+= scx200/
 obj-y	+= sfi/

index 8ff7b9355416..d49d3be81953 100644
@@ -155,7 +155,7 @@ static void punit_dbgfs_unregister(void)
 
 static const struct x86_cpu_id intel_punit_cpu_ids[] = {
 	ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
-	ICPU(INTEL_FAM6_ATOM_MERRIFIELD1, punit_device_tng),
+	ICPU(INTEL_FAM6_ATOM_MERRIFIELD,  punit_device_tng),
 	ICPU(INTEL_FAM6_ATOM_AIRMONT,	  punit_device_cht),
 	{}
 };

index fc135bf70511..429d08be7848 100644
@@ -1,5 +1,9 @@
 # Family-Level Interface Shim (FLIS)
 obj-$(subst m,y,$(CONFIG_PINCTRL_MERRIFIELD)) += platform_mrfld_pinctrl.o
+# SDHCI Devices
+obj-$(subst m,y,$(CONFIG_MMC_SDHCI_PCI)) += platform_mrfld_sd.o
+# WiFi
+obj-$(subst m,y,$(CONFIG_BRCMFMAC_SDIO)) += platform_bcm43xx.o
 # IPC Devices
 obj-y += platform_ipc.o
 obj-$(subst m,y,$(CONFIG_MFD_INTEL_MSIC)) += platform_msic.o

index ce119d2ba0d0..7850128f0026 100644
@@ -70,6 +70,11 @@ EXPORT_SYMBOL_GPL(__intel_mid_cpu_chip);
 
 static void intel_mid_power_off(void)
 {
+	/* Shut down South Complex via PWRMU */
+	intel_mid_pwr_power_off();
+
+	/* Only for Tangier, the rest will ignore this command */
+	intel_scu_ipc_simple_command(IPCMSG_COLD_OFF, 1);
 };
 
 static void intel_mid_reboot(void)

new file mode 100644
index 000000000000..f43c93188a1d
@@ -0,0 +1 @@
+obj-$(CONFIG_MLX_PLATFORM)	+= mlx-platform.o

index c878aa71173b..55f453de562e 100644
@@ -60,8 +60,13 @@ static struct pci_platform_pm_ops mid_pci_platform_pm = {
 
 #define ICPU(model)	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 
+/*
+ * This table should be in sync with the one in
+ * arch/x86/platform/intel-mid/pwr.c.
+ */
 static const struct x86_cpu_id lpss_cpu_ids[] = {
-	ICPU(INTEL_FAM6_ATOM_MERRIFIELD1),
+	ICPU(INTEL_FAM6_ATOM_PENWELL),
+	ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
 	{}
 };
 

index fbab29dfa793..243b233ff31b 100644
@@ -1154,8 +1154,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
 
 	RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1,	rapl_defaults_byt),
 	RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT,	rapl_defaults_cht),
-	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1,	rapl_defaults_tng),
-	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2,	rapl_defaults_ann),
+	RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD,	rapl_defaults_tng),
+	RAPL_CPU(INTEL_FAM6_ATOM_MOOREFIELD,	rapl_defaults_ann),
 	RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT,	rapl_defaults_core),
 	RAPL_CPU(INTEL_FAM6_ATOM_DENVERTON,	rapl_defaults_core),