Staging: vt6655: Replace dwIoBase by iobase
PATCH 1/1 Staging: vt6655: Replace dwIoBase by iobase
In this patch dwIoBase is renamed as iobase. This is done to fix the checkpatch issue of CamelCase.
Signed-off-by Varsha Rao <[email protected]>
--- drivers/staging/vt6655/baseband.c | 52 +++--- drivers/staging/vt6655/baseband.h | 8 +- drivers/staging/vt6655/card.c | 30 ++-- drivers/staging/vt6655/mac.h | 322 +++++++++++++++++++------------------- drivers/staging/vt6655/rf.c | 64 ++++---- drivers/staging/vt6655/srom.c | 32 ++-- drivers/staging/vt6655/srom.h | 6 +- 7 files changed, 257 insertions(+), 257 deletions(-)
drivers/staging/vt6655/baseband.c +26 -26
@@ -1916,7 +1916,7 @@ void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * byBBAddr - address of register in Baseband * Out: * pbyData - data read
@@ -1927,24 +1927,24 @@ void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,bool BBbReadEmbedded (struct vnt_private *priv,unsigned char byBBAddr,unsigned char *pbyData) { -void __iomem *dwIoBase = priv->PortOffset; +void __iomem *iobase = priv->PortOffset;unsigned short ww;unsigned char byValue;/* BB reg offset */ -VNSvOutPortB (dwIoBase +MAC_REG_BBREGADR , byBBAddr); +VNSvOutPortB (iobase +MAC_REG_BBREGADR , byBBAddr);/* turn on REGR */ -MACvRegBitsOn (dwIoBase,MAC_REG_BBREGCTL ,BBREGCTL_REGR ); +MACvRegBitsOn (iobase,MAC_REG_BBREGCTL ,BBREGCTL_REGR );/* W_MAX_TIMEOUT is the timeout period */ for (ww =0 ; ww <W_MAX_TIMEOUT ; ww++) { -VNSvInPortB (dwIoBase +MAC_REG_BBREGCTL , &byValue); +VNSvInPortB (iobase +MAC_REG_BBREGCTL , &byValue);if (byValue &BBREGCTL_DONE )break ; }/* get BB data */ -VNSvInPortB (dwIoBase +MAC_REG_BBREGDATA , pbyData); +VNSvInPortB (iobase +MAC_REG_BBREGDATA , pbyData);if (ww ==W_MAX_TIMEOUT ) {pr_debug (" DBG_PORT80(0x30)\n" );
@@ -1958,7 +1958,7 @@ bool BBbReadEmbedded(struct vnt_private *priv,* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * byBBAddr - address of register in Baseband * byData - data to write * Out:
@@ -1970,20 +1970,20 @@ bool BBbReadEmbedded(struct vnt_private *priv,bool BBbWriteEmbedded (struct vnt_private *priv,unsigned char byBBAddr,unsigned char byData) { -void __iomem *dwIoBase = priv->PortOffset; +void __iomem *iobase = priv->PortOffset;unsigned short ww;unsigned char byValue;/* BB reg offset */ -VNSvOutPortB (dwIoBase +MAC_REG_BBREGADR , byBBAddr); +VNSvOutPortB (iobase +MAC_REG_BBREGADR , byBBAddr);/* set BB data */ -VNSvOutPortB (dwIoBase +MAC_REG_BBREGDATA , byData); +VNSvOutPortB (iobase +MAC_REG_BBREGDATA , byData);/* turn on BBREGCTL_REGW */ -MACvRegBitsOn (dwIoBase,MAC_REG_BBREGCTL ,BBREGCTL_REGW ); +MACvRegBitsOn (iobase,MAC_REG_BBREGCTL ,BBREGCTL_REGW );/* W_MAX_TIMEOUT is the timeout period */ for (ww =0 ; ww <W_MAX_TIMEOUT ; ww++) { -VNSvInPortB (dwIoBase +MAC_REG_BBREGCTL , &byValue); +VNSvInPortB (iobase +MAC_REG_BBREGCTL , &byValue);if (byValue &BBREGCTL_DONE )break ; }
@@ -2000,7 +2000,7 @@ bool BBbWriteEmbedded(struct vnt_private *priv,* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * byRevId - Revision ID * byRFType - RF type * Out:
@@ -2014,7 +2014,7 @@ bool BBbVT3253Init(struct vnt_private *priv) {bool bResult = true;int ii; -void __iomem *dwIoBase = priv->PortOffset; +void __iomem *iobase = priv->PortOffset;unsigned char byRFType = priv->byRFType;unsigned char byLocalID = priv->byLocalID;
@@ -2036,8 +2036,8 @@ bool BBbVT3253Init(struct vnt_private *priv) byVT3253B0_AGC4_RFMD2959[ii][0 ], byVT3253B0_AGC4_RFMD2959[ii][1]); -VNSvOutPortD (dwIoBase +MAC_REG_ITRTMSET ,0x23 ); -MACvRegBitsOn (dwIoBase,MAC_REG_PAPEDELAY ,BIT (0 )); +VNSvOutPortD (iobase +MAC_REG_ITRTMSET ,0x23 ); +MACvRegBitsOn (iobase,MAC_REG_PAPEDELAY ,BIT (0 )); } priv->abyBBVGA[0 ] =0x18 ; priv->abyBBVGA[1 ] =0x0A ;
@@ -2076,8 +2076,8 @@ bool BBbVT3253Init(struct vnt_private *priv) byVT3253B0_AGC[ii][0 ], byVT3253B0_AGC[ii][1]); -VNSvOutPortB (dwIoBase +MAC_REG_ITRTMSET ,0x23 ); -MACvRegBitsOn (dwIoBase,MAC_REG_PAPEDELAY ,BIT (0 )); +VNSvOutPortB (iobase +MAC_REG_ITRTMSET ,0x23 ); +MACvRegBitsOn (iobase,MAC_REG_PAPEDELAY ,BIT (0 )); priv->abyBBVGA[0 ] =0x14 ; priv->abyBBVGA[1 ] =0x0A ;
@@ -2098,7 +2098,7 @@ bool BBbVT3253Init(struct vnt_private *priv)* 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ -/*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ +/*bResult &= BBbWriteEmbedded(iobase,0x09,0x41);*/ /* Init ANT B select, * RX Config CR10 = 0x28->0x2A,
@@ -2106,7 +2106,7 @@ bool BBbVT3253Init(struct vnt_private *priv)* make the ANT_A, ANT_B inverted) */ -/*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ +/*bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/ /* Select VC1/VC2, CR215 = 0x02->0x06 */ bResult &=BBbWriteEmbedded (priv,0xd7 ,0x06 );
@@ -2154,7 +2154,7 @@ bool BBbVT3253Init(struct vnt_private *priv) priv->ldBmThreshold[2 ] =0 ; priv->ldBmThreshold[3 ] =0 ;/* Fix VT3226 DFC system timing issue */ -MACvSetRFLE_LatchBase (dwIoBase); +MACvSetRFLE_LatchBase (iobase);/* {{ RobertYu: 20050104 */ }else if (byRFType ==RF_AIROHA7230 ) {for (ii =0 ; ii <CB_VT3253B0_INIT_FOR_AIROHA2230 ; ii++)
@@ -2167,11 +2167,11 @@ bool BBbVT3253Init(struct vnt_private *priv)/* Init ANT B select,TX Config CR09 = 0x61->0x45, * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ -/*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ +/*bResult &= BBbWriteEmbedded(iobase,0x09,0x41);*/ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ -/*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ +/*bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/ /* Select VC1/VC2, CR215 = 0x02->0x06 */ bResult &=BBbWriteEmbedded (priv,0xd7 ,0x06 );/* }} */
@@ -2259,7 +2259,7 @@ void BBvSetVGAGainOffset(struct vnt_private *priv, unsigned char byData)* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * Out: * none *
@@ -2280,7 +2280,7 @@ BBvSoftwareReset(struct vnt_private *priv)* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * Out: * none *
@@ -2302,7 +2302,7 @@ BBvPowerSaveModeON(struct vnt_private *priv)* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * Out: * none *
drivers/staging/vt6655/baseband.h +4 -4
@@ -58,11 +58,11 @@#define TOP_RATE_2M 0x00200000#define TOP_RATE_1M 0x00100000 -#define bbvclearfoe (dwIoBase) \ - BBbWriteEmbedded(dwIoBase, 0xB1, 0) +#define bbvclearfoe (iobase) \ + BBbWriteEmbedded(iobase, 0xB1, 0) -#define BBvSetFOE (dwIoBase) \ - BBbWriteEmbedded(dwIoBase, 0xB1, 0x0C) +#define BBvSetFOE (iobase) \ + BBbWriteEmbedded(iobase, 0xB1, 0x0C)unsigned int BBuGetFrameTime(
drivers/staging/vt6655/card.c +15 -15
@@ -36,7 +36,7 @@* * Revision History: * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. -* 08-26-2003 Kyle Hsu: Modify the defination type of dwIoBase. +* 08-26-2003 Kyle Hsu: Modify the defination type of iobase. * 09-01-2003 Bryan YC Fan: Add vUpdateIFS(). * */
@@ -938,20 +938,20 @@ u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2)*/ bool CARDbGetCurrentTSF (struct vnt_private *priv,u64 *pqwCurrTSF) { -void __iomem *dwIoBase = priv->PortOffset; +void __iomem *iobase = priv->PortOffset;unsigned short ww;unsigned char byData; -MACvRegBitsOn (dwIoBase,MAC_REG_TFTCTL ,TFTCTL_TSFCNTRRD ); +MACvRegBitsOn (iobase,MAC_REG_TFTCTL ,TFTCTL_TSFCNTRRD );for (ww =0 ; ww <W_MAX_TIMEOUT ; ww++) { -VNSvInPortB (dwIoBase +MAC_REG_TFTCTL , &byData); +VNSvInPortB (iobase +MAC_REG_TFTCTL , &byData);if (!(byData &TFTCTL_TSFCNTRRD ))break ; }if (ww ==W_MAX_TIMEOUT )return false; -VNSvInPortD (dwIoBase +MAC_REG_TSFCNTR , (u32 *)pqwCurrTSF); -VNSvInPortD (dwIoBase +MAC_REG_TSFCNTR +4 , (u32 *)pqwCurrTSF +1 ); +VNSvInPortD (iobase +MAC_REG_TSFCNTR , (u32 *)pqwCurrTSF); +VNSvInPortD (iobase +MAC_REG_TSFCNTR +4 , (u32 *)pqwCurrTSF +1 );return true; }
@@ -989,7 +989,7 @@ u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval)* * Parameters: * In: -* dwIoBase - IO Base +* iobase - IO Base * wBeaconInterval - Beacon Interval * Out: * none
@@ -999,16 +999,16 @@ u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval)void CARDvSetFirstNextTBTT (struct vnt_private *priv,unsigned short wBeaconInterval) { -void __iomem *dwIoBase = priv->PortOffset; +void __iomem *iobase = priv->PortOffset;u64 qwNextTBTT =0 ;CARDbGetCurrentTSF (priv, &qwNextTBTT);/* Get Local TSF counter */ qwNextTBTT =CARDqGetNextTBTT (qwNextTBTT, wBeaconInterval);/* Set NextTBTT */ -VNSvOutPortD (dwIoBase +MAC_REG_NEXTTBTT , (u32 )qwNextTBTT); -VNSvOutPortD (dwIoBase +MAC_REG_NEXTTBTT +4 , (u32)(qwNextTBTT >>32 )); -MACvRegBitsOn (dwIoBase,MAC_REG_TFTCTL ,TFTCTL_TBTTSYNCEN ); +VNSvOutPortD (iobase +MAC_REG_NEXTTBTT , (u32 )qwNextTBTT); +VNSvOutPortD (iobase +MAC_REG_NEXTTBTT +4 , (u32)(qwNextTBTT >>32 )); +MACvRegBitsOn (iobase,MAC_REG_TFTCTL ,TFTCTL_TBTTSYNCEN ); }/*
@@ -1028,12 +1028,12 @@ void CARDvSetFirstNextTBTT(struct vnt_private *priv,void CARDvUpdateNextTBTT (struct vnt_private *priv,u64 qwTSF,unsigned short wBeaconInterval) { -void __iomem *dwIoBase = priv->PortOffset; +void __iomem *iobase = priv->PortOffset; qwTSF =CARDqGetNextTBTT (qwTSF, wBeaconInterval);/* Set NextTBTT */ -VNSvOutPortD (dwIoBase +MAC_REG_NEXTTBTT , (u32 )qwTSF); -VNSvOutPortD (dwIoBase +MAC_REG_NEXTTBTT +4 , (u32)(qwTSF >>32 )); -MACvRegBitsOn (dwIoBase,MAC_REG_TFTCTL ,TFTCTL_TBTTSYNCEN ); +VNSvOutPortD (iobase +MAC_REG_NEXTTBTT , (u32 )qwTSF); +VNSvOutPortD (iobase +MAC_REG_NEXTTBTT +4 , (u32)(qwTSF >>32 )); +MACvRegBitsOn (iobase,MAC_REG_TFTCTL ,TFTCTL_TBTTSYNCEN );pr_debug ("Card:Update Next TBTT[%8llx]\n" , qwTSF); }
drivers/staging/vt6655/mac.h +161 -161
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drivers/staging/vt6655/rf.c +32 -32
220 lines not on this page · raw message
drivers/staging/vt6655/srom.c +16 -16
@@ -64,7 +64,7 @@* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * byContntOffset - address of EEPROM * Out: * none
@@ -72,7 +72,7 @@* Return Value: data read * */ -unsigned char SROMbyReadEmbedded (void __iomem *dwIoBase, +unsigned char SROMbyReadEmbedded (void __iomem *iobase,unsigned char byContntOffset) {unsigned short wDelay, wNoACK;
@@ -81,18 +81,18 @@ unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase,unsigned char byOrg; byData =0xFF ; -VNSvInPortB (dwIoBase +MAC_REG_I2MCFG , &byOrg); +VNSvInPortB (iobase +MAC_REG_I2MCFG , &byOrg);/* turn off hardware retry for getting NACK */ -VNSvOutPortB (dwIoBase +MAC_REG_I2MCFG , (byOrg & (~I2MCFG_NORETRY ))); +VNSvOutPortB (iobase +MAC_REG_I2MCFG , (byOrg & (~I2MCFG_NORETRY )));for (wNoACK =0 ; wNoACK <W_MAX_I2CRETRY ; wNoACK++) { -VNSvOutPortB (dwIoBase +MAC_REG_I2MTGID ,EEP_I2C_DEV_ID ); -VNSvOutPortB (dwIoBase +MAC_REG_I2MTGAD , byContntOffset); +VNSvOutPortB (iobase +MAC_REG_I2MTGID ,EEP_I2C_DEV_ID ); +VNSvOutPortB (iobase +MAC_REG_I2MTGAD , byContntOffset);/* issue read command */ -VNSvOutPortB (dwIoBase +MAC_REG_I2MCSR ,I2MCSR_EEMR ); +VNSvOutPortB (iobase +MAC_REG_I2MCSR ,I2MCSR_EEMR );/* wait DONE be set */ for (wDelay =0 ; wDelay <W_MAX_TIMEOUT ; wDelay++) { -VNSvInPortB (dwIoBase +MAC_REG_I2MCSR , &byWait); +VNSvInPortB (iobase +MAC_REG_I2MCSR , &byWait);if (byWait & (I2MCSR_DONE |I2MCSR_NACK ))break ;PCAvDelayByIO (CB_DELAY_LOOP_WAIT );
@@ -102,8 +102,8 @@ unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase,break ; } } -VNSvInPortB (dwIoBase +MAC_REG_I2MDIPT , &byData); -VNSvOutPortB (dwIoBase +MAC_REG_I2MCFG , byOrg); +VNSvInPortB (iobase +MAC_REG_I2MDIPT , &byData); +VNSvOutPortB (iobase +MAC_REG_I2MCFG , byOrg);return byData; }
@@ -112,20 +112,20 @@ unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase,* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * Out: * pbyEepromRegs - EEPROM content Buffer * * Return Value: none * */ -void SROMvReadAllContents (void __iomem *dwIoBase,unsigned char *pbyEepromRegs) +void SROMvReadAllContents (void __iomem *iobase,unsigned char *pbyEepromRegs) {int ii;/* ii = Rom Address */ for (ii =0 ; ii <EEP_MAX_CONTEXT_SIZE ; ii++) { - *pbyEepromRegs =SROMbyReadEmbedded (dwIoBase, + *pbyEepromRegs =SROMbyReadEmbedded (iobase, (unsigned char )ii); pbyEepromRegs++; }
@@ -136,21 +136,21 @@ void SROMvReadAllContents(void __iomem *dwIoBase, unsigned char *pbyEepromRegs)* * Parameters: * In: -* dwIoBase - I/O base address +* iobase - I/O base address * Out: * pbyEtherAddress - Ethernet Address buffer * * Return Value: none * */ -void SROMvReadEtherAddress (void __iomem *dwIoBase, +void SROMvReadEtherAddress (void __iomem *iobase,unsigned char *pbyEtherAddress) {unsigned char ii;/* ii = Rom Address */ for (ii =0 ; ii <ETH_ALEN ; ii++) { - *pbyEtherAddress =SROMbyReadEmbedded (dwIoBase, ii); + *pbyEtherAddress =SROMbyReadEmbedded (iobase, ii); pbyEtherAddress++; } }
drivers/staging/vt6655/srom.h +3 -3
@@ -90,12 +90,12 @@/*--------------------- Export Functions --------------------------*/ -unsigned char SROMbyReadEmbedded (void __iomem *dwIoBase, +unsigned char SROMbyReadEmbedded (void __iomem *iobase,unsigned char byContntOffset); -void SROMvReadAllContents (void __iomem *dwIoBase,unsigned char *pbyEepromRegs); +void SROMvReadAllContents (void __iomem *iobase,unsigned char *pbyEepromRegs); -void SROMvReadEtherAddress (void __iomem *dwIoBase, +void SROMvReadEtherAddress (void __iomem *iobase,unsigned char *pbyEtherAddress);#endif /* __EEPROM_H__*/
Signature · 1 line
2.7.4