x86/cpu: Fix typo in the comment for Anniedale
Subsystems (2)
PATCH 1/1 x86/cpu: Fix typo in the comment for Anniedale
The proper spelling of Anniedale SoC with 'e' in the middle. Fix typo in the comment line in intel-family.h header.
Signed-off-by Andy Shevchenko <[email protected]>
--- arch/x86/include/asm/intel-family.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/include/asm/intel-family.h +1 -1
@@ -57,7 +57,7 @@#define INTEL_FAM6_ATOM_SILVERMONT2 0x4D/* Avaton/Rangely */ #define INTEL_FAM6_ATOM_AIRMONT 0x4C/* CherryTrail / Braswell */ #define INTEL_FAM6_ATOM_MERRIFIELD 0x4A/* Tangier */ -#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A/* Annidale */ +#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A/* Anniedale */ #define INTEL_FAM6_ATOM_GOLDMONT 0x5C#define INTEL_FAM6_ATOM_DENVERTON 0x5F/* Goldmont Microserver */
Signature · 1 line
2.11.0
tip-bot for Andy Shevchenko
merge botx86/cpu: Fix typo in the comment for Anniedale
Commit-ID: 754c73cf4d2463022b2c9ae208026bf22564ed06 Gitweb: http://git.kernel.org/tip/754c73cf4d2463022b2c9ae208026bf22564ed06 Author: Andy Shevchenko <[email protected]> AuthorDate: Mon, 2 Jan 2017 11:22:29 +0200 Committer: Ingo Molnar <[email protected]> CommitDate: Thu, 5 Jan 2017 09:03:29 +0100
x86/cpu: Fix typo in the comment for Anniedale
The proper spelling of Anniedale SoC with 'e' in the middle. Fix typo in the comment line in intel-family.h header.
Signed-off-by Andy Shevchenko <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Thomas Gleixner <[email protected]>
Signed-off-by Ingo Molnar <[email protected]>
--- arch/x86/include/asm/intel-family.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/include/asm/intel-family.h +1 -1
@@ -57,7 +57,7 @@#define INTEL_FAM6_ATOM_SILVERMONT2 0x4D/* Avaton/Rangely */ #define INTEL_FAM6_ATOM_AIRMONT 0x4C/* CherryTrail / Braswell */ #define INTEL_FAM6_ATOM_MERRIFIELD 0x4A/* Tangier */ -#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A/* Annidale */ +#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A/* Anniedale */ #define INTEL_FAM6_ATOM_GOLDMONT 0x5C#define INTEL_FAM6_ATOM_DENVERTON 0x5F/* Goldmont Microserver */