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x86: SCU and PMU drivers for Intel MID

PATCH New Andy Shevchenko 3 participants 7 messages Apr 1, 2017 – Apr 10, 2017 x86

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#0 lore raw

v3 cover x86: SCU and PMU drivers for Intel MID

There are two crucial drivers to make Intel MID platforms functional in U-Boot:
SCU which stands for System Controller Unit
PMU which stands for Power Management Unit

Since v2:
- resend with cover letter including changes from previous versions

Since v1:

Common:
- convert to use REGMAP instead of constant addressed IO
- rewrite as UCLASS_SYSCON modules
- move to arch/x86/lib since it's related to x86 only and there are already another UCLASS_SYSCON modules there

SCU:
- convert function documentation to have header and body and be consistent
- shrink header and remove unneeded attributes
- drop busy loop counter from 3m to 100k as per driver in Linux kernel

PMU:
- convert to be more generic and move Tangier related part to its own folder (the latter out of scope of this series)

Andy Shevchenko (1):
x86: Introduce minimal PMU driver for Intel MID platforms

Felipe Balbi (1):
x86: Add SCU IPC driver for Intel MID platforms

 arch/x86/Kconfig           |   2 +
 arch/x86/include/asm/cpu.h |   2 +
 arch/x86/include/asm/pmu.h |  11 +++
 arch/x86/include/asm/scu.h |  28 ++++++++
 arch/x86/lib/Makefile      |   2 +
 arch/x86/lib/pmu.c         | 117 +++++++++++++++++++++++++++++++
 arch/x86/lib/scu.c         | 168 +++++++++++++++++++++++++++++++++++++++++++++
 7 files changed, 330 insertions(+)
 create mode 100644 arch/x86/include/asm/pmu.h
 create mode 100644 arch/x86/include/asm/scu.h
 create mode 100644 arch/x86/lib/pmu.c
 create mode 100644 arch/x86/lib/scu.c
Signature · 1 line
2.11.0
#1 lore raw

PATCH v3 1/2 x86: Add SCU IPC driver for Intel MID platforms

From: Felipe Balbi <[email protected]>

Intel MID platforms have few microcontrollers inside SoC, one of them is so called System Controller Unit (SCU).

Here is the driver to communicate with microcontroller.

---
 arch/x86/Kconfig           |   2 +
 arch/x86/include/asm/cpu.h |   1 +
 arch/x86/include/asm/scu.h |  28 ++++++++
 arch/x86/lib/Makefile      |   1 +
 arch/x86/lib/scu.c         | 168 +++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 200 insertions(+)
 create mode 100644 arch/x86/include/asm/scu.h
 create mode 100644 arch/x86/lib/scu.c
arch/x86/Kconfig +2 -0
index dfdd7564ea..9a1ecd7907 100644
@@ -83,6 +83,8 @@ endchoice
 # subarchitectures-specific options below
 config INTEL_MID
 	bool "Intel MID platform support"
+	select REGMAP
+	select SYSCON
 	help
 	  Select to build a U-Boot capable of supporting Intel MID
 	  (Mobile Internet Device) platform systems which do not have
arch/x86/include/asm/cpu.h +1 -0
index c651f2f594..0ee13b1eb1 100644
@@ -54,6 +54,7 @@ enum {
 	X86_NONE,
 	X86_SYSCON_ME,		/* Intel Management Engine */
 	X86_SYSCON_PINCONF,	/* Intel x86 pin configuration */
+	X86_SYSCON_SCU,		/* System Controller Unit */
 };
 
 struct cpuid_result {
arch/x86/include/asm/scu.h new file +28 -0
new file mode 100644
index 0000000000..876363cb5c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef _X86_ASM_SCU_IPC_H_
+#define _X86_ASM_SCU_IPC_H_
+
+/* IPC defines the following message types */
+#define IPCMSG_WARM_RESET		0xF0
+#define IPCMSG_COLD_RESET		0xF1
+#define IPCMSG_SOFT_RESET		0xF2
+#define IPCMSG_COLD_BOOT		0xF3
+#define IPCMSG_GET_FW_REVISION		0xF4
+#define IPCMSG_WATCHDOG_TIMER		0xF8	/* Set Kernel Watchdog Threshold */
+
+struct ipc_ifwi_version {
+	u16	minor;
+	u8	major;
+	u8	hardware_id;
+	u32	reserved[3];
+};
+
+/* Issue commands to the SCU with or without data */
+int scu_ipc_simple_command(u32 cmd, u32 sub);
+int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen);
+
+#endif	/* _X86_ASM_SCU_IPC_H_ */
arch/x86/lib/Makefile +1 -0
index 1c2c085179..320e45e4a0 100644
@@ -32,6 +32,7 @@ obj-y	+= pirq_routing.o
 obj-y	+= relocate.o
 obj-y += physmem.o
 obj-$(CONFIG_X86_RAMTEST) += ramtest.o
+obj-$(CONFIG_INTEL_MID) += scu.o
 obj-y	+= sections.o
 obj-y += sfi.o
 obj-y	+= string.o
arch/x86/lib/scu.c new file +168 -0

168 lines not on this page · raw message

Signature · 1 line
2.11.0
#2 lore raw

PATCH v3 1/2 x86: Add SCU IPC driver for Intel MID platforms

Hi Andy,

Quoted 10 lines · Andy Shevchenko

From: Felipe Balbi <[email protected]>

Intel MID platforms have few microcontrollers inside SoC, one of them is so called System Controller Unit (SCU).

Here is the driver to communicate with microcontroller.

If you can it is better to put the change log in each patch. Patman can help.

BTW if you end up resending, please use lower-case hex.

Quoted 9 lines
---
 arch/x86/Kconfig           |   2 +
 arch/x86/include/asm/cpu.h |   1 +
 arch/x86/include/asm/scu.h |  28 ++++++++
 arch/x86/lib/Makefile      |   1 +
 arch/x86/lib/scu.c         | 168 +++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 200 insertions(+)
 create mode 100644 arch/x86/include/asm/scu.h
 create mode 100644 arch/x86/lib/scu.c

Regards,
Simon

#3 lore raw

PATCH v3 1/2 x86: Add SCU IPC driver for Intel MID platforms

Quoted 15 lines · Simon Glass

Hi Andy,

Quoted 10 lines · Andy Shevchenko

From: Felipe Balbi <[email protected]>

Intel MID platforms have few microcontrollers inside SoC, one of them is so called System Controller Unit (SCU).

Here is the driver to communicate with microcontroller.

Quoted 6 lines

If you can it is better to put the change log in each patch. Patman can help.

BTW if you end up resending, please use lower-case hex.

Fixed the lower-case hex, and one checkpatch warning:

WARNING: line over 80 characters
#82: FILE: arch/x86/include/asm/scu.h:15:
+#define IPCMSG_WATCHDOG_TIMER 0xF8 /* Set Kernel Watchdog
Threshold */

and, applied to u-boot-x86, thanks!

#4 lore raw

PATCH v3 2/2 x86: Introduce minimal PMU driver for Intel MID platforms

In reply to Andy Shevchenko

This simple PMU driver allows to tyrn power on and off for selected devices. In particularly Intel Tangier needs to power on SDHCI controllers in order to access to them during board initialization.

In the future it might be expanded to cover other Intel MID platforms, that's why it's located under arch/x86/lib and called pmu.c.

---
 arch/x86/include/asm/cpu.h |   1 +
 arch/x86/include/asm/pmu.h |  11 +++++
 arch/x86/lib/Makefile      |   1 +
 arch/x86/lib/pmu.c         | 117 +++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 130 insertions(+)
 create mode 100644 arch/x86/include/asm/pmu.h
 create mode 100644 arch/x86/lib/pmu.c
arch/x86/include/asm/cpu.h +1 -0
index 0ee13b1eb1..c00687a20a 100644
@@ -54,6 +54,7 @@ enum {
 	X86_NONE,
 	X86_SYSCON_ME,		/* Intel Management Engine */
 	X86_SYSCON_PINCONF,	/* Intel x86 pin configuration */
+	X86_SYSCON_PMU,		/* Power Management Unit */
 	X86_SYSCON_SCU,		/* System Controller Unit */
 };
 
arch/x86/include/asm/pmu.h new file +11 -0
new file mode 100644
index 0000000000..96b968ff8f
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef _X86_ASM_PMU_IPC_H_
+#define _X86_ASM_PMU_IPC_H_
+
+int pmu_turn_power(unsigned int lss, bool on);
+
+#endif	/* _X86_ASM_PMU_IPC_H_ */
arch/x86/lib/Makefile +1 -0
index 320e45e4a0..d1ad37af64 100644
@@ -31,6 +31,7 @@ obj-y	+= pinctrl_ich6.o
 obj-y	+= pirq_routing.o
 obj-y	+= relocate.o
 obj-y += physmem.o
+obj-$(CONFIG_INTEL_MID) += pmu.o
 obj-$(CONFIG_X86_RAMTEST) += ramtest.o
 obj-$(CONFIG_INTEL_MID) += scu.o
 obj-y	+= sections.o
arch/x86/lib/pmu.c new file +117 -0

117 lines not on this page · raw message

Signature · 1 line
2.11.0
#5 lore raw

PATCH v3 2/2 x86: Introduce minimal PMU driver for Intel MID platforms

Hi Andy,

Quoted 9 lines · Andy Shevchenko

This simple PMU driver allows to tyrn power on and off for selected devices. In particularly Intel Tangier needs to power on SDHCI controllers in order to access to them during board initialization.

In the future it might be expanded to cover other Intel MID platforms, that's why it's located under arch/x86/lib and called pmu.c.

Quoted 8 lines
---
 arch/x86/include/asm/cpu.h |   1 +
 arch/x86/include/asm/pmu.h |  11 +++++
 arch/x86/lib/Makefile      |   1 +
 arch/x86/lib/pmu.c         | 117 +++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 130 insertions(+)
 create mode 100644 arch/x86/include/asm/pmu.h
 create mode 100644 arch/x86/lib/pmu.c

Have you considered making this a PMIC driver? Then you could avoid exporting the function. Also I see that we need to do that sometimes with Intel platforms.

#6 lore raw

PATCH v3 2/2 x86: Introduce minimal PMU driver for Intel MID platforms

Quoted 22 lines · Simon Glass

Hi Andy,

Quoted 9 lines · Andy Shevchenko

This simple PMU driver allows to tyrn power on and off for selected devices. In particularly Intel Tangier needs to power on SDHCI controllers in order to access to them during board initialization.

In the future it might be expanded to cover other Intel MID platforms, that's why it's located under arch/x86/lib and called pmu.c.

Quoted 8 lines
---
 arch/x86/include/asm/cpu.h |   1 +
 arch/x86/include/asm/pmu.h |  11 +++++
 arch/x86/lib/Makefile      |   1 +
 arch/x86/lib/pmu.c         | 117 +++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 130 insertions(+)
 create mode 100644 arch/x86/include/asm/pmu.h
 create mode 100644 arch/x86/lib/pmu.c
Quoted 5 lines

Have you considered making this a PMIC driver? Then you could avoid exporting the function. Also I see that we need to do that sometimes with Intel platforms.

applied to u-boot-x86, thanks!