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usb: dwc2: invalidate the dcache before starting the DMA

PATCH New Eddie Cai 2 participants 2 messages Apr 6, 2017 USB

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Eddie Cai

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#0 lore raw

PATCH v3 1/1 usb: dwc2: invalidate the dcache before starting the DMA

We should invalidate the dcache before starting the DMA. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on.

Signed-off-by Eddie Cai <[email protected]>
Reviewed-by Stefan Brüns <[email protected]>
---
 drivers/usb/host/dwc2.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)
drivers/usb/host/dwc2.c +13 -6
index 5ac602e..f295843 100644
@@ -811,12 +811,19 @@ static int transfer_chunk(struct dwc2_hc_regs *hc_regs, void *aligned_buffer,
 	       (*pid << DWC2_HCTSIZ_PID_OFFSET),
 	       &hc_regs->hctsiz);
 
-	if (!in && xfer_len) {
-		memcpy(aligned_buffer, buffer, xfer_len);
-
-		flush_dcache_range((unsigned long)aligned_buffer,
-				   (unsigned long)aligned_buffer +
-				   roundup(xfer_len, ARCH_DMA_MINALIGN));
+	if (xfer_len) {
+		if (in) {
+			invalidate_dcache_range(
+					(uintptr_t)aligned_buffer,
+					(uintptr_t)aligned_buffer +
+					roundup(xfer_len, ARCH_DMA_MINALIGN));
+		} else {
+			memcpy(aligned_buffer, buffer, xfer_len);
+			flush_dcache_range(
+					(uintptr_t)aligned_buffer,
+					(uintptr_t)aligned_buffer +
+					roundup(xfer_len, ARCH_DMA_MINALIGN));
+		}
 	}
 
 	writel(phys_to_bus((unsigned long)aligned_buffer), &hc_regs->hcdma);
Signature · 1 line
2.10.2
Applied
#1 lore raw

PATCH v3 1/1 usb: dwc2: invalidate the dcache before starting the DMA

Quoted 8 lines · Eddie Cai

We should invalidate the dcache before starting the DMA. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on.

Signed-off-by Eddie Cai <[email protected]>
Reviewed-by Stefan Brüns <[email protected]>

Applied, thanks.

Signature · 2 lines
Best regards,
Marek Vasut