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staging: atomisp: Remove dead code for MID (#1)

PATCH New Andy Shevchenko 1 participant 7 messages Sep 1, 2017

Subsystems (5)
Media (V4L/DVB) Arm i.MX and Layerscape Staging Intel MID (Mobile Internet Device) platform +1 more subsystems
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Andy Shevchenko

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#0 lore raw

PATCH 1/7 staging: atomisp: Remove dead code for MID (#1)

Remove dead code. If someone needs it the P-Unit semaphore is handled by I2C DesignWare driver (drivers/i2c/busses/i2c-designware-baytrail.c).

Signed-off-by Andy Shevchenko <[email protected]>
---
 .../atomisp/include/asm/intel_mid_pcihelpers.h     |   2 -
 .../platform/intel-mid/intel_mid_pcihelpers.c      | 101 ---------------------
 2 files changed, 103 deletions(-)
drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h +0 -2
index c5e22bba455a..b7c079f3630a 100644
@@ -33,5 +33,3 @@ void intel_mid_msgbus_write32(u8 port, u32 addr, u32 data);
 u32 intel_mid_msgbus_read32_raw_ext(u32 cmd, u32 cmd_ext);
 void intel_mid_msgbus_write32_raw_ext(u32 cmd, u32 cmd_ext, u32 data);
 u32 intel_mid_soc_stepping(void);
-int intel_mid_dw_i2c_acquire_ownership(void);
-int intel_mid_dw_i2c_release_ownership(void);
drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c +0 -101

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Signature · 1 line
2.14.1
author
#1 lore raw

PATCH 2/7 staging: atomisp: Don't override D3 delay settings here

The d3_delay parameter is set by arch/x86/pci/intel_mid_pci.c and drivers/pci/quirks.c.

No need to override that settings in unrelated driver.

Signed-off-by Andy Shevchenko <[email protected]>
---
 .../atomisp/include/asm/intel_mid_pcihelpers.h     |  8 ------
 .../platform/intel-mid/intel_mid_pcihelpers.c      | 33 ----------------------
 2 files changed, 41 deletions(-)
drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h +0 -8
index b7c079f3630a..0d7f5c618b56 100644
@@ -18,14 +18,6 @@
 #define PCI_ROOT_MSGBUS_WRITE           0x11
 #define PCI_ROOT_MSGBUS_DWORD_ENABLE    0xf0
 
-/* In BYT platform for all internal PCI devices d3 delay
- * of 3 ms is sufficient. Default value of 10 ms is overkill.
- */
-#define INTERNAL_PCI_PM_D3_WAIT		3
-
-#define ISP_SUB_CLASS			0x80
-#define SUB_CLASS_MASK			0xFF00
-
 u32 intel_mid_msgbus_read32_raw(u32 cmd);
 u32 intel_mid_msgbus_read32(u8 port, u32 addr);
 void intel_mid_msgbus_write32_raw(u32 cmd, u32 data);
drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c +0 -33
index 0d01a269989d..341bfd3ab313 100644
@@ -161,36 +161,3 @@ u32 intel_mid_soc_stepping(void)
 	return pci_root->revision;
 }
 EXPORT_SYMBOL(intel_mid_soc_stepping);
-
-static bool is_south_complex_device(struct pci_dev *dev)
-{
-	unsigned int base_class = dev->class >> 16;
-	unsigned int sub_class  = (dev->class & SUB_CLASS_MASK) >> 8;
-
-	/* other than camera, pci bridges and display,
-	 * everything else are south complex devices.
-	 */
-	if (((base_class == PCI_BASE_CLASS_MULTIMEDIA) &&
-	     (sub_class == ISP_SUB_CLASS)) ||
-	    (base_class == PCI_BASE_CLASS_BRIDGE) ||
-	    ((base_class == PCI_BASE_CLASS_DISPLAY) && !sub_class))
-		return false;
-	else
-		return true;
-}
-
-/* In BYT platform, d3_delay for internal south complex devices,
- * they are not subject to 10 ms d3 to d0 delay required by pci spec.
- */
-static void pci_d3_delay_fixup(struct pci_dev *dev)
-{
-	if (platform_is(INTEL_ATOM_BYT) ||
-		platform_is(INTEL_ATOM_CHT)) {
-		/* All internal devices are in bus 0. */
-		if (dev->bus->number == 0 && is_south_complex_device(dev)) {
-			dev->d3_delay = INTERNAL_PCI_PM_D3_WAIT;
-			dev->d3cold_delay = INTERNAL_PCI_PM_D3_WAIT;
-		}
-	}
-}
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_d3_delay_fixup);
Signature · 1 line
2.14.1
author
#2 lore raw

PATCH 3/7 staging: atomisp: Remove dead code for MID (#2)

In reply to Andy Shevchenko

intel_mid_soc_stepping() is not used anywhere.

Signed-off-by Andy Shevchenko <[email protected]>
---
 drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h   | 1 -
 .../media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c        | 7 -------
 2 files changed, 8 deletions(-)
drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h +0 -1
index 0d7f5c618b56..5d8451ee391e 100644
@@ -24,4 +24,3 @@ void intel_mid_msgbus_write32_raw(u32 cmd, u32 data);
 void intel_mid_msgbus_write32(u8 port, u32 addr, u32 data);
 u32 intel_mid_msgbus_read32_raw_ext(u32 cmd, u32 cmd_ext);
 void intel_mid_msgbus_write32_raw_ext(u32 cmd, u32 cmd_ext, u32 data);
-u32 intel_mid_soc_stepping(void);
drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c +0 -7
index 341bfd3ab313..c34f461653db 100644
@@ -154,10 +154,3 @@ void intel_mid_msgbus_write32(u8 port, u32 addr, u32 data)
 	spin_unlock_irqrestore(&msgbus_lock, irq_flags);
 }
 EXPORT_SYMBOL(intel_mid_msgbus_write32);
-
-/* called only from where is later then fs_initcall */
-u32 intel_mid_soc_stepping(void)
-{
-	return pci_root->revision;
-}
-EXPORT_SYMBOL(intel_mid_soc_stepping);
Signature · 1 line
2.14.1
author
#3 lore raw

PATCH 4/7 staging: atomisp: Remove dead code for MID (#3)

In reply to Andy Shevchenko

intel_mid_msgbus_*_raw*() are not used anywhere.

Signed-off-by Andy Shevchenko <[email protected]>
---
 .../atomisp/include/asm/intel_mid_pcihelpers.h     |  4 --
 .../platform/intel-mid/intel_mid_pcihelpers.c      | 58 ----------------------
 2 files changed, 62 deletions(-)
drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h +0 -4
index 5d8451ee391e..bf39f42c1c96 100644
@@ -18,9 +18,5 @@
 #define PCI_ROOT_MSGBUS_WRITE           0x11
 #define PCI_ROOT_MSGBUS_DWORD_ENABLE    0xf0
 
-u32 intel_mid_msgbus_read32_raw(u32 cmd);
 u32 intel_mid_msgbus_read32(u8 port, u32 addr);
-void intel_mid_msgbus_write32_raw(u32 cmd, u32 data);
 void intel_mid_msgbus_write32(u8 port, u32 addr, u32 data);
-u32 intel_mid_msgbus_read32_raw_ext(u32 cmd, u32 cmd_ext);
-void intel_mid_msgbus_write32_raw_ext(u32 cmd, u32 cmd_ext, u32 data);
drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c +0 -58

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2.14.1
author
#4 lore raw

PATCH 5/7 staging: atomisp: Move to upstream IOSF MBI API

In reply to Andy Shevchenko

There is a common for x86 IOSF MBI API. Move atomisp code to use it.

Signed-off-by Andy Shevchenko <[email protected]>
---
 drivers/staging/media/atomisp/pci/Kconfig          |  1 +
 .../media/atomisp/pci/atomisp2/atomisp_cmd.c       | 20 +++++++-----
 .../media/atomisp/pci/atomisp2/atomisp_v4l2.c      | 38 ++++++++++------------
 3 files changed, 29 insertions(+), 30 deletions(-)
drivers/staging/media/atomisp/pci/Kconfig +1 -0
index a72421431c7a..fb66fc9d6952 100644
@@ -5,6 +5,7 @@
 config VIDEO_ATOMISP
        tristate "Intel Atom Image Signal Processor Driver"
        depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+       select IOSF_MBI
        select VIDEOBUF_VMALLOC
         ---help---
           Say Y here if your platform supports Intel Atom SoC
drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +11 -9
index f48bf451c1f5..73e15dd9d4d6 100644
@@ -27,7 +27,9 @@
 #include <linux/kfifo.h>
 #include <linux/pm_runtime.h>
 #include <linux/timer.h>
+
 #include <asm/intel-mid.h>
+#include <asm/iosf_mbi.h>
 
 #include <media/v4l2-event.h>
 #include <media/videobuf-vmalloc.h>

@@ -143,36 +145,36 @@ static int write_target_freq_to_hw(struct atomisp_device *isp,
 	unsigned int ratio, timeout, guar_ratio;
 	u32 isp_sspm1 = 0;
 	int i;
+
 	if (!isp->hpll_freq) {
 		dev_err(isp->dev, "failed to get hpll_freq. no change to freq\n");
 		return -EINVAL;
 	}
 
-	isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1);
+	iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1);
 	if (isp_sspm1 & ISP_FREQ_VALID_MASK) {
 		dev_dbg(isp->dev, "clearing ISPSSPM1 valid bit.\n");
-		intel_mid_msgbus_write32(PUNIT_PORT, ISPSSPM1,
+		iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1,
 				    isp_sspm1 & ~(1 << ISP_FREQ_VALID_OFFSET));
 	}
 
 	ratio = (2 * isp->hpll_freq + new_freq / 2) / new_freq - 1;
 	guar_ratio = (2 * isp->hpll_freq + 200 / 2) / 200 - 1;
 
-	isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1);
+	iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1);
 	isp_sspm1 &= ~(0x1F << ISP_REQ_FREQ_OFFSET);
 
 	for (i = 0; i < ISP_DFS_TRY_TIMES; i++) {
-		intel_mid_msgbus_write32(PUNIT_PORT, ISPSSPM1,
+		iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1,
 				   isp_sspm1
 				   | ratio << ISP_REQ_FREQ_OFFSET
 				   | 1 << ISP_FREQ_VALID_OFFSET
 				   | guar_ratio << ISP_REQ_GUAR_FREQ_OFFSET);
 
-		isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1);
-
+		iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1);
 		timeout = 20;
 		while ((isp_sspm1 & ISP_FREQ_VALID_MASK) && timeout) {
-			isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1);
+			iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1);
 			dev_dbg(isp->dev, "waiting for ISPSSPM1 valid bit to be 0.\n");
 			udelay(100);
 			timeout--;

@@ -187,10 +189,10 @@ static int write_target_freq_to_hw(struct atomisp_device *isp,
 		return -EINVAL;
 	}
 
-	isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1);
+	iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1);
 	timeout = 10;
 	while (((isp_sspm1 >> ISP_FREQ_STAT_OFFSET) != ratio) && timeout) {
-		isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1);
+		iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1);
 		dev_dbg(isp->dev, "waiting for ISPSSPM1 status bit to be 0x%x.\n",
 			new_freq);
 		udelay(100);
drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +17 -21
index 663aa916e3ca..0896f5ea7e4e 100644
@@ -28,6 +28,9 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 
+#include <asm/intel-mid.h>
+#include <asm/iosf_mbi.h>
+
 #include "../../include/linux/atomisp_gmin_platform.h"
 
 #include "atomisp_cmd.h"

@@ -46,7 +49,6 @@
 #include "hrt/hive_isp_css_mm_hrt.h"
 
 #include "device_access.h"
-#include <asm/intel-mid.h>
 
 /* G-Min addition: pull this in from intel_mid_pm.h */
 #define CSTATE_EXIT_LATENCY_C1  1

@@ -386,28 +388,23 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
  */
 static void punit_ddr_dvfs_enable(bool enable)
 {
-	int reg = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSDVFS);
 	int door_bell = 1 << 8;
 	int max_wait = 30;
+	int reg;
 
+	iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, &reg);
 	if (enable) {
 		reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
 	} else {
 		reg |= (MRFLD_BIT1 | door_bell);
 		reg &= ~(MRFLD_BIT0);
 	}
+	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
 
-	intel_mid_msgbus_write32(PUNIT_PORT, MRFLD_ISPSSDVFS, reg);
-
-	/*Check Req_ACK to see freq status, wait until door_bell is cleared*/
-	if (reg & door_bell) {
-		while (max_wait--) {
-			if (0 == (intel_mid_msgbus_read32(PUNIT_PORT,
-				MRFLD_ISPSSDVFS) & door_bell))
-					break;
-
-			usleep_range(100, 500);
-		}
+	/* Check Req_ACK to see freq status, wait until door_bell is cleared */
+	while ((reg & door_bell) && max_wait--) {
+		iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, &reg);
+		usleep_range(100, 500);
 	}
 
 	if (max_wait == -1)

@@ -421,10 +418,10 @@ int atomisp_mrfld_power_down(struct atomisp_device *isp)
 	u32 reg_value;
 
 	/* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
-	reg_value = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSPM0);
+	iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
 	reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
 	reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
-	intel_mid_msgbus_write32(PUNIT_PORT, MRFLD_ISPSSPM0, reg_value);
+	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
 
 	/*WA:Enable DVFS*/
 	if (IS_CHT)

@@ -437,8 +434,7 @@ int atomisp_mrfld_power_down(struct atomisp_device *isp)
 	 */
 	timeout = jiffies + msecs_to_jiffies(50);
 	while (1) {
-		reg_value = intel_mid_msgbus_read32(PUNIT_PORT,
-							MRFLD_ISPSSPM0);
+		iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
 		dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n",
 				reg_value);
 		/* wait until ISPSSPM0 bit[25:24] shows 0x3 */

@@ -477,14 +473,14 @@ int atomisp_mrfld_power_up(struct atomisp_device *isp)
 		msleep(10);
 
 	/* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */
-	reg_value = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSPM0);
+	iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
 	reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
-	intel_mid_msgbus_write32(PUNIT_PORT, MRFLD_ISPSSPM0, reg_value);
+	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
 
 	/* FIXME: experienced value for delay */
 	timeout = jiffies + msecs_to_jiffies(50);
 	while (1) {
-		reg_value = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSPM0);
+		iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
 		dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n",
 				reg_value);
 		/* wait until ISPSSPM0 bit[25:24] shows 0x0 */

@@ -1323,7 +1319,7 @@ static int atomisp_pci_probe(struct pci_dev *dev,
 		isp->dfs = &dfs_config_cht;
 		isp->pdev->d3cold_delay = 0;
 
-		val = intel_mid_msgbus_read32(CCK_PORT, CCK_FUSE_REG_0);
+		iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
 		switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
 		case 0x00:
 			isp->hpll_freq = HPLL_FREQ_800MHZ;
Signature · 1 line
2.14.1
author
#5 lore raw

PATCH 6/7 staging: atomisp: Remove dead code for MID (#4)

In reply to Andy Shevchenko

Since we switched to upstream IOSF MBI API the custom code become not in use anymore.

Signed-off-by Andy Shevchenko <[email protected]>
---
 .../atomisp/include/asm/intel_mid_pcihelpers.h     | 22 -----
 .../media/atomisp/pci/atomisp2/atomisp_internal.h  |  1 -
 .../media/atomisp/platform/intel-mid/Makefile      |  1 -
 .../platform/intel-mid/intel_mid_pcihelpers.c      | 98 ----------------------
 4 files changed, 122 deletions(-)
 delete mode 100644 drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h
 delete mode 100644 drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c
drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h deleted +0 -22
deleted file mode 100644
index bf39f42c1c96..000000000000
@@ -1,22 +0,0 @@
-/*
- * Access to message bus through three registers
- * in CUNIT(0:0:0) PCI configuration space.
- * MSGBUS_CTRL_REG(0xD0):
- *   31:24      = message bus opcode
- *   23:16      = message bus port
- *   15:8       = message bus address, low 8 bits.
- *   7:4        = message bus byte enables
- * MSGBUS_CTRL_EXT_REG(0xD8):
- *   31:8       = message bus address, high 24 bits.
- * MSGBUS_DATA_REG(0xD4):
- *   hold the data for write or read
- */
-#define PCI_ROOT_MSGBUS_CTRL_REG        0xD0
-#define PCI_ROOT_MSGBUS_DATA_REG        0xD4
-#define PCI_ROOT_MSGBUS_CTRL_EXT_REG    0xD8
-#define PCI_ROOT_MSGBUS_READ            0x10
-#define PCI_ROOT_MSGBUS_WRITE           0x11
-#define PCI_ROOT_MSGBUS_DWORD_ENABLE    0xf0
-
-u32 intel_mid_msgbus_read32(u8 port, u32 addr);
-void intel_mid_msgbus_write32(u8 port, u32 addr, u32 data);
drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h +0 -1
index 7542a72f1d0f..1fe1711387a2 100644
@@ -30,7 +30,6 @@
 #include <linux/idr.h>
 
 #include <asm/intel-mid.h>
-#include "../../include/asm/intel_mid_pcihelpers.h"
 
 #include <media/media-device.h>
 #include <media/v4l2-subdev.h>
drivers/staging/media/atomisp/platform/intel-mid/Makefile +0 -1
index 4621261c35db..c53db1364e21 100644
@@ -1,5 +1,4 @@
 #
 # Makefile for intel-mid devices.
 #
-obj-$(CONFIG_INTEL_ATOMISP) += intel_mid_pcihelpers.o
 obj-$(CONFIG_INTEL_ATOMISP) += atomisp_gmin_platform.o
drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c deleted +0 -98

98 lines not on this page · raw message

Signature · 1 line
2.14.1
author
#6 lore raw

PATCH 7/7 staging: atomisp: Remove unneeded intel-mid.h inclusion

In reply to Andy Shevchenko

In many files in the driver the intel-mid.h header inclusion is redundant.

Signed-off-by Andy Shevchenko <[email protected]>
---
 drivers/staging/media/atomisp/i2c/imx/drv201.c                        | 1 -
 drivers/staging/media/atomisp/i2c/imx/dw9714.c                        | 1 -
 drivers/staging/media/atomisp/i2c/imx/imx.c                           | 1 -
 drivers/staging/media/atomisp/i2c/imx/otp_imx.c                       | 1 -
 drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c              | 1 -
 drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h         | 2 --
 drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c            | 1 -
 drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c           | 1 -
 drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c             | 1 -
 drivers/staging/media/atomisp/platform/clock/platform_vlv2_plat_clk.h | 1 -
 10 files changed, 11 deletions(-)
drivers/staging/media/atomisp/i2c/imx/drv201.c +0 -1
index 6d9d4c968722..532af7da3158 100644
@@ -16,7 +16,6 @@
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <media/v4l2-device.h>
-#include <asm/intel-mid.h>
 
 #include "drv201.h"
drivers/staging/media/atomisp/i2c/imx/dw9714.c +0 -1
index 6397a7ee0af6..7e58fb3589cc 100644
@@ -16,7 +16,6 @@
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <media/v4l2-device.h>
-#include <asm/intel-mid.h>
 
 #include "dw9714.h"
drivers/staging/media/atomisp/i2c/imx/imx.c +0 -1
index 49ab0af87096..71b688970822 100644
@@ -18,7 +18,6 @@
  * 02110-1301, USA.
  *
  */
-#include <asm/intel-mid.h>
 #include "../../include/linux/atomisp_platform.h"
 #include <linux/bitops.h>
 #include <linux/device.h>
drivers/staging/media/atomisp/i2c/imx/otp_imx.c +0 -1
index 1ca27c26ef75..279784cab6c3 100644
@@ -30,7 +30,6 @@
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <media/v4l2-device.h>
-#include <asm/intel-mid.h>
 #include "common.h"
 
 /* Defines for OTP Data Registers */
drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +0 -1
index 73e15dd9d4d6..b0c647f4d250 100644
@@ -28,7 +28,6 @@
 #include <linux/pm_runtime.h>
 #include <linux/timer.h>
 
-#include <asm/intel-mid.h>
 #include <asm/iosf_mbi.h>
 
 #include <media/v4l2-event.h>
drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h +0 -2
index 1fe1711387a2..6c1eb417361d 100644
@@ -29,8 +29,6 @@
 #include <linux/pm_qos.h>
 #include <linux/idr.h>
 
-#include <asm/intel-mid.h>
-
 #include <media/media-device.h>
 #include <media/v4l2-subdev.h>
drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c +0 -1
index 717647951fb6..dd59167237c1 100644
@@ -24,7 +24,6 @@
 #include <linux/delay.h>
 #include <linux/pci.h>
 
-#include <asm/intel-mid.h>
 
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-event.h>
drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c +0 -1
index 744ab6eb42a0..d27a50e66be2 100644
@@ -25,7 +25,6 @@
 #include <linux/mm.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
-#include <asm/intel-mid.h>
 
 #include <media/v4l2-event.h>
 #include <media/v4l2-mediabus.h>
drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +0 -1
index 0896f5ea7e4e..e85b3819bffa 100644
@@ -28,7 +28,6 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 
-#include <asm/intel-mid.h>
 #include <asm/iosf_mbi.h>
 
 #include "../../include/linux/atomisp_gmin_platform.h"
drivers/staging/media/atomisp/platform/clock/platform_vlv2_plat_clk.h +0 -1
index b730ab0e8223..3bc0de129780 100644
@@ -20,7 +20,6 @@
 #define _PLATFORM_VLV2_PLAT_CLK_H_
 
 #include <linux/sfi.h>
-#include <asm/intel-mid.h>
 
 extern void __init *vlv2_plat_clk_device_platform_data(
 				void *info) __attribute__((weak));
Signature · 1 line
2.14.1