Implement basic MSA functions
PATCH v3 1/3 s390x/tcg: implement spm (SET PROGRAM MASK)
In reply to David HildenbrandMissing and is used inside Linux in the context of CPACF.
--- target/s390x/cpu.h | 2 ++ target/s390x/insn-data.def | 2 ++ target/s390x/translate.c | 11 +++++++++++ 3 files changed, 15 insertions(+)
target/s390x/cpu.h +2 -0
@@ -292,6 +292,7 @@ extern const struct VMStateDescription vmstate_s390_cpu;#undef PSW_SHIFT_ASC#undef PSW_MASK_CC#undef PSW_MASK_PM +#undef PSW_SHIFT_MASK_PM#undef PSW_MASK_64#undef PSW_MASK_32#undef PSW_MASK_ESA_ADDR
@@ -309,6 +310,7 @@ extern const struct VMStateDescription vmstate_s390_cpu;#define PSW_SHIFT_ASC 46#define PSW_MASK_CC 0x0000300000000000ULL#define PSW_MASK_PM 0x00000F0000000000ULL +#define PSW_SHIFT_MASK_PM 40#define PSW_MASK_64 0x0000000100000000ULL#define PSW_MASK_32 0x0000000080000000ULL#define PSW_MASK_ESA_ADDR 0x000000007fffffffULL
target/s390x/insn-data.def +2 -0
@@ -755,6 +755,8 @@ C(0xb2b8, SRNMB, S, FPE, 0, 0, 0, 0, srnm, 0) /* SET DFP ROUNDING MODE */ C(0xb2b9, SRNMT, S, DFPR, 0, 0, 0, 0, srnm, 0) +/* SET PROGRAM MASK */ + C(0x0400, SPM, RR_a, Z, r1, 0, 0, 0, spm, 0) /* SHIFT LEFT SINGLE */ D(0x8b00, SLA, RS_a, Z, r1, sh32, new, r1_32, sla, 0, 31)
target/s390x/translate.c +11 -0
@@ -3796,6 +3796,17 @@ static ExitStatus op_srnm(DisasContext *s, DisasOps *o)return NO_EXIT ; } +static ExitStatus op_spm (DisasContext *s,DisasOps *o) +{ +tcg_gen_extrl_i64_i32 (cc_op, o->in1); +tcg_gen_extract_i32 (cc_op, cc_op,28 ,2 ); +set_cc_static (s); + +tcg_gen_shri_i64 (o->in1, o->in1,24 ); +tcg_gen_deposit_i64 (psw_mask, psw_mask, o->in1,PSW_SHIFT_MASK_PM ,4 ); +return NO_EXIT ; +} +#ifndef CONFIG_USER_ONLY static ExitStatus op_spka (DisasContext *s,DisasOps *o) {
Signature · 1 line
2.13.5
v3 cover Implement basic MSA functions
Some leftover from "target/s390x: tcg improvments + MSA functions".
Implement all basic MSA (cpacf/crypto) instructions <= z13. Only provide the query subfunction (to query available subfunctions), no actual de/encryption yet. Good enough to unlock the STFL bits.
I have written kvm-unit-tests for MSA functions and for SPM/IPM. Will send them out soon. I use the following cpu model to test with an upstream kernel compiled for z10:
... -cpu qemu,mvcos=on,stfle=on,ldisp=on,ldisphp=on,\
eimm=on,stckf=on,csst=on,csst2=on,ginste=on,\
exrl=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on ...Available on: https://github.com/davidhildenbrand/qemu.git s390x-msa
v2 -> v3:
- "s390x/tcg: add basic MSA features"
-- drop one check (fc >= 128) that can due to masking never happen
v1 -> v2:
- "s390x/tcg: implement spm (SET PROGRAM MASK)" -- use tcg_gen_extrl_i64_i32 + tcg_gen_extract_i32
- "s390x/tcg: move wrap_address() to internal.h" -- internal.h instead of cpu.h
- "s390x/tcg: add basic MSA features"
-- minor style fixes
David Hildenbrand (3):
s390x/tcg: implement spm (SET PROGRAM MASK)
s390x/tcg: move wrap_address() to internal.h
s390x/tcg: add basic MSA features
target/s390x/Makefile.objs | 2 +- target/s390x/cpu.h | 2 ++ target/s390x/cpu_models.c | 4 +++ target/s390x/crypto_helper.c | 65 ++++++++++++++++++++++++++++++++++++++++++ target/s390x/helper.h | 1 + target/s390x/insn-data.def | 15 ++++++++++ target/s390x/internal.h | 14 +++++++++ target/s390x/mem_helper.c | 14 --------- target/s390x/translate.c | 67 ++++++++++++++++++++++++++++++++++++++++++++ 9 files changed, 169 insertions(+), 15 deletions(-) create mode 100644 target/s390x/crypto_helper.c
Signature · 1 line
2.13.5
PATCH v3 2/3 s390x/tcg: move wrap_address() to internal.h
We want to use it in another file.
--- target/s390x/internal.h | 14 ++++++++++++++ target/s390x/mem_helper.c | 14 -------------- 2 files changed, 14 insertions(+), 14 deletions(-)
target/s390x/internal.h +14 -0
@@ -162,6 +162,20 @@ static inline uint8_t get_per_atmid(CPUS390XState *env) ((env->psw.mask &PSW_ASC_ACCREG ) ? (1 <<2 ) :0 ); } +static inline uint64_t wrap_address (CPUS390XState *env,uint64_t a) +{ +if (!(env->psw.mask &PSW_MASK_64 )) { +if (!(env->psw.mask &PSW_MASK_32 )) { +/* 24-Bit mode */ + a &=0x00ffffff ; + }else { +/* 31-Bit mode */ + a &=0x7fffffff ; + } + } +return a; +} +/* CC optimization */ /* Instead of computing the condition codes after each x86 instruction,
target/s390x/mem_helper.c +0 -14
@@ -122,20 +122,6 @@ static inline void cpu_stsize_data_ra(CPUS390XState *env, uint64_t addr, } } -static inline uint64_t wrap_address (CPUS390XState *env,uint64_t a) -{ -if (!(env->psw.mask &PSW_MASK_64 )) { -if (!(env->psw.mask &PSW_MASK_32 )) { -/* 24-Bit mode */ - a &=0x00ffffff ; - }else { -/* 31-Bit mode */ - a &=0x7fffffff ; - } - } -return a; -} -static void fast_memset (CPUS390XState *env,uint64_t dest,uint8_t byte,uint32_t l,uintptr_t ra) {
Signature · 1 line
2.13.5
PATCH v3 3/3 s390x/tcg: add basic MSA features
In reply to David HildenbrandThe STFLE bits for the MSA (extension) facilities simply indicate that the respective instructions can be executed. The QUERY subfunction can then be used to identify which features exactly are available.
Availability of subfunctions can also vary on real hardware. For now, we simply implement a CPU model without any available subfunctions except QUERY (which is always around).
As all MSA functions behave quite similarly, we can use one translation handler for now. Prepare the code for implementation of actual subfunctions.
At least MSA is helpful for now, as older Linux kernels require this facility when compiled for a z9 model. Allow to enable the facilities for the qemu cpu model.
--- target/s390x/Makefile.objs | 2 +- target/s390x/cpu_models.c | 4 +++ target/s390x/crypto_helper.c | 65 ++++++++++++++++++++++++++++++++++++++++++++ target/s390x/helper.h | 1 + target/s390x/insn-data.def | 13 +++++++++ target/s390x/translate.c | 56 ++++++++++++++++++++++++++++++++++++++ 6 files changed, 140 insertions(+), 1 deletion(-) create mode 100644 target/s390x/crypto_helper.c
target/s390x/Makefile.objs +1 -1
@@ -1,6 +1,6 @@ obj-y += cpu.o cpu_models.o cpu_features.o gdbstub.o interrupt.o helper.o obj-$(CONFIG_TCG) += translate.o cc_helper.o excp_helper.o fpu_helper.o -obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o +obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o crypto_helper.o obj-$(CONFIG_SOFTMMU) += machine.o ioinst.o arch_dump.o mmu_helper.o diag.o obj-$(CONFIG_KVM) += kvm.o obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
target/s390x/cpu_models.c +4 -0
@@ -825,6 +825,7 @@ static void add_qemu_cpu_model_features(S390FeatBitmap fbm)S390_FEAT_STFLE ,S390_FEAT_EXTENDED_IMMEDIATE ,S390_FEAT_EXTENDED_TRANSLATION_2 , +S390_FEAT_MSA ,S390_FEAT_EXTENDED_TRANSLATION_3 ,S390_FEAT_LONG_DISPLACEMENT , S390_FEAT_LONG_DISPLACEMENT_FAST,
@@ -841,6 +842,9 @@ static void add_qemu_cpu_model_features(S390FeatBitmap fbm)S390_FEAT_STFLE_49 ,S390_FEAT_LOCAL_TLB_CLEARING ,S390_FEAT_STFLE_53 , +S390_FEAT_MSA_EXT_5 , +S390_FEAT_MSA_EXT_3 , + S390_FEAT_MSA_EXT_4, };int i;
target/s390x/crypto_helper.c new file +65 -0
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target/s390x/helper.h +1 -0
@@ -115,6 +115,7 @@ DEF_HELPER_4(cu21, i32, env, i32, i32, i32) DEF_HELPER_4(cu24, i32, env, i32, i32, i32) DEF_HELPER_4(cu41, i32, env, i32, i32, i32) DEF_HELPER_4(cu42, i32, env, i32, i32, i32) +DEF_HELPER_5(msa, i32, env, i32, i32, i32, i32)#ifndef CONFIG_USER_ONLY DEF_HELPER_3 (servc, i32, env, i64, i64)
target/s390x/insn-data.def +13 -0
@@ -941,6 +941,19 @@ /* UNPACK UNICODE */ C(0xe200, UNPKU, SS_a, E2, la1, a2, 0, 0, unpku, 0) +/* MSA Instructions */ + D(0xb91e, KMAC, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMAC) + D(0xb928, PCKMO, RRE, MSA3, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCKMO) + D(0xb92a, KMF, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMF) + D(0xb92b, KMO, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMO) + D(0xb92c, PCC, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCC) + D(0xb92d, KMCTR, RRF_b, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMCTR) + D(0xb92e, KM, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KM) + D(0xb92f, KMC, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMC) + D(0xb93c, PPNO, RRE, MSA5, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PPNO) + D(0xb93e, KIMD, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KIMD) + D(0xb93f, KLMD, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KLMD) + #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ D(0xb250, CSP, RRE, Z, r1_32u, ra2, r1_P, 0, csp, 0, MO_TEUL)
target/s390x/translate.c +56 -0
68 lines not on this page · raw message
Signature · 1 line
2.13.5
Re: [Qemu-devel] [PATCH v3 3/3] s390x/tcg: add basic MSA features
Quoted 16 lines · David Hildenbrand
The STFLE bits for the MSA (extension) facilities simply indicate that the respective instructions can be executed. The QUERY subfunction can then be used to identify which features exactly are available.
Availability of subfunctions can also vary on real hardware. For now, we simply implement a CPU model without any available subfunctions except QUERY (which is always around).
As all MSA functions behave quite similarly, we can use one translation handler for now. Prepare the code for implementation of actual subfunctions.
At least MSA is helpful for now, as older Linux kernels require this facility when compiled for a z9 model. Allow to enable the facilities for the qemu cpu model.
Signed-off-by David Hildenbrand <[email protected]>
Quoted 9 lines
--- target/s390x/Makefile.objs | 2 +- target/s390x/cpu_models.c | 4 +++ target/s390x/crypto_helper.c | 65 ++++++++++++++++++++++++++++++++++++++++++++ target/s390x/helper.h | 1 + target/s390x/insn-data.def | 13 +++++++++ target/s390x/translate.c | 56 ++++++++++++++++++++++++++++++++++++++ 6 files changed, 140 insertions(+), 1 deletion(-) create mode 100644 target/s390x/crypto_helper.c
r~
Quoted 10 lines · On Wed, 20 Sep 2017 17:30:13 +0200 David Hildenbrand <[email protected]> wrote:
Some leftover from "target/s390x: tcg improvments + MSA functions".
Implement all basic MSA (cpacf/crypto) instructions <= z13. Only provide the query subfunction (to query available subfunctions), no actual de/encryption yet. Good enough to unlock the STFL bits.
I have written kvm-unit-tests for MSA functions and for SPM/IPM. Will send them out soon. I use the following cpu model to test with an upstream kernel compiled for z10:
Quoted 5 lines
... -cpu qemu,mvcos=on,stfle=on,ldisp=on,ldisphp=on,\ eimm=on,stckf=on,csst=on,csst2=on,ginste=on,\ exrl=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on ...Available on: https://github.com/davidhildenbrand/qemu.git s390x-msa
I used the following cpu model:
-cpu qemu,eimm=on,ldisp=on,stckf=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on
and got
qemu-system-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
qemu-system-s390x: warning: 'msa5-base' requires 'klmd-sha-512'.
(It works anyway.)
However,
-cpu qemu,eimm=on,ldisp=on,stckf=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on,kimd-sha-512=on
gives
qemu-system-s390x: can't apply global qemu-s390-cpu.kimd-sha-512=on: Feature 'kimd-sha-512' is not available for CPU model 'z900', it was introduced with later models.
which is a bit confusing.
So I'm wondering whether providing msa5-base without the providing the algorithms above is sane - or whether it is just enough to satisfy some kernels.
[Double-checking the various dependencies looks impossible without access to IBM doc, anyway - I just hope you got it right back then :)]
Quoted 19 lines · Cornelia Huck
Quoted 10 lines · On Wed, 20 Sep 2017 17:30:13 +0200 David Hildenbrand <[email protected]> wrote:
Some leftover from "target/s390x: tcg improvments + MSA functions".
Implement all basic MSA (cpacf/crypto) instructions <= z13. Only provide the query subfunction (to query available subfunctions), no actual de/encryption yet. Good enough to unlock the STFL bits.
I have written kvm-unit-tests for MSA functions and for SPM/IPM. Will send them out soon. I use the following cpu model to test with an upstream kernel compiled for z10:
Quoted 5 lines
... -cpu qemu,mvcos=on,stfle=on,ldisp=on,ldisphp=on,\ eimm=on,stckf=on,csst=on,csst2=on,ginste=on,\ exrl=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on ...Available on: https://github.com/davidhildenbrand/qemu.git s390x-msa
Quoted 9 lines
I used the following cpu model:
-cpu qemu,eimm=on,ldisp=on,stckf=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on
and got
qemu-system-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
qemu-system-s390x: warning: 'msa5-base' requires 'klmd-sha-512'.
Yes, I am aware of that and it is on my todo list. Shouldn't matter for now as it is completely optional and not enabled as default.
Quoted 11 lines
(It works anyway.)
However,
-cpu qemu,eimm=on,ldisp=on,stckf=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on,kimd-sha-512=on
gives
qemu-system-s390x: can't apply global qemu-s390-cpu.kimd-sha-512=on: Feature 'kimd-sha-512' is not available for CPU model 'z900', it was introduced with later models.
which is a bit confusing.
Due to the way we hack up the qemu cpu model, allowing to set features that are theoretically not possible (just to have some way of enabling them before we can change the qemu model to something never).
Quoted 8 lines
So I'm wondering whether providing msa5-base without the providing the algorithms above is sane - or whether it is just enough to satisfy some kernels.
[Double-checking the various dependencies looks impossible without access to IBM doc, anyway - I just hope you got it right back then :)]
We can take care of that later (if at all relevant).
Signature · 3 lines
Thanks, David
Cornelia Huck
AppliedQuoted 34 lines · On Wed, 20 Sep 2017 17:30:13 +0200 David Hildenbrand <[email protected]> wrote:
Some leftover from "target/s390x: tcg improvments + MSA functions".
Implement all basic MSA (cpacf/crypto) instructions <= z13. Only provide the query subfunction (to query available subfunctions), no actual de/encryption yet. Good enough to unlock the STFL bits.
I have written kvm-unit-tests for MSA functions and for SPM/IPM. Will send them out soon. I use the following cpu model to test with an upstream kernel compiled for z10:
... -cpu qemu,mvcos=on,stfle=on,ldisp=on,ldisphp=on,\ eimm=on,stckf=on,csst=on,csst2=on,ginste=on,\ exrl=on,msa-base=on,msa3-base=on,msa4-base=on,msa5-base=on ...Available on: https://github.com/davidhildenbrand/qemu.git s390x-msa
v2 -> v3:
- "s390x/tcg: add basic MSA features"
-- drop one check (fc >= 128) that can due to masking never happenv1 -> v2:
- "s390x/tcg: implement spm (SET PROGRAM MASK)" -- usetcg_gen_extrl_i64_i32+tcg_gen_extract_i32
- "s390x/tcg: movewrap_address()tointernal.h" --internal.hinstead ofcpu.h
- "s390x/tcg: add basic MSA features"
-- minor style fixesDavid Hildenbrand (3):
s390x/tcg: implement spm (SET PROGRAM MASK)
s390x/tcg: movewrap_address()tointernal.h
s390x/tcg: add basic MSA features
Quoted 12 lines
target/s390x/Makefile.objs | 2 +- target/s390x/cpu.h | 2 ++ target/s390x/cpu_models.c | 4 +++ target/s390x/crypto_helper.c | 65 ++++++++++++++++++++++++++++++++++++++++++ target/s390x/helper.h | 1 + target/s390x/insn-data.def | 15 ++++++++++ target/s390x/internal.h | 14 +++++++++ target/s390x/mem_helper.c | 14 --------- target/s390x/translate.c | 67 ++++++++++++++++++++++++++++++++++++++++++++ 9 files changed, 169 insertions(+), 15 deletions(-) create mode 100644 target/s390x/crypto_helper.c
Thanks, applied.