x86: minimal ACPI support for Intel Tangier

This brings initial support for Intel Merrifield platform (based on Intel Tangier SoC) along with minimum support of Intel Edison board (based on Merrifield).

This RFC series based on discussion [1] to show how we may unleash the powerfulness of ACPI on the board, which initially didn't support it, via U-Boot.

Note, pin control device is using compatible strings since there is near to impossible to allocate ACPI ID for it. Patches to the kernel to make it OF-enumerated driver are under review.

Note, I dunno the split of DSL pieces is fully correct since we need to understand the difference between SoC, platform, and board terms. Even though some stuff here declared under 'tangier' folder it's related to Intel Merrifield platform (like Wi-Fi chip connected to SDIO port of Intel Tangier). Because of some restrictions of ACPI language / interpreter I may not split some of those parts. Thus, it needs to be revisited.

More information is available on [2].

[1]: https://lists.denx.de/pipermail/u-boot/2017-August/303997.html
[2]: https://edison.internet-share.com/wiki/ACPI

Since v1:
- drop RFC
- address several Bin's comments
- add tag

Andy Shevchenko (2):
x86: tangier: Enable ACPI support for Intel Tangier
x86: edison: Bring minimal ACPI support to the board

 arch/x86/cpu/tangier/Makefile                      |   1 +
 arch/x86/cpu/tangier/acpi.c                        |  87 ++++++
 .../include/asm/arch-tangier/acpi/global_nvs.asl   |  16 ++
 .../x86/include/asm/arch-tangier/acpi/platform.asl |  31 +++
 .../include/asm/arch-tangier/acpi/southcluster.asl | 298 +++++++++++++++++++++
 arch/x86/include/asm/arch-tangier/global_nvs.h     |  22 ++
 board/intel/edison/.gitignore                      |   3 +
 board/intel/edison/Kconfig                         |   6 +
 board/intel/edison/Makefile                        |   1 +
 board/intel/edison/dsdt.asl                        |  13 +
 include/configs/edison.h                           |   3 +
 11 files changed, 481 insertions(+)
 create mode 100644 arch/x86/cpu/tangier/acpi.c
 create mode 100644 arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl
 create mode 100644 arch/x86/include/asm/arch-tangier/acpi/platform.asl
 create mode 100644 arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
 create mode 100644 arch/x86/include/asm/arch-tangier/global_nvs.h
 create mode 100644 board/intel/edison/.gitignore
 create mode 100644 board/intel/edison/dsdt.asl

2.14.2

Intel Tangier SoC is a part of Intel Merrifield platform which doesn't utilize ACPI by default. Here is an attempt to unleash ACPI flexibility power on Intel Merrifield based platforms.

The change brings minimum support of the devices that found on Intel Merrifield based end user device.

---
 arch/x86/cpu/tangier/Makefile                      |   1 +
 arch/x86/cpu/tangier/acpi.c                        |  87 ++++++
 .../include/asm/arch-tangier/acpi/global_nvs.asl   |  16 ++
 .../x86/include/asm/arch-tangier/acpi/platform.asl |  31 +++
 .../include/asm/arch-tangier/acpi/southcluster.asl | 298 +++++++++++++++++++++
 arch/x86/include/asm/arch-tangier/global_nvs.h     |  22 ++
 6 files changed, 455 insertions(+)
 create mode 100644 arch/x86/cpu/tangier/acpi.c
 create mode 100644 arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl
 create mode 100644 arch/x86/include/asm/arch-tangier/acpi/platform.asl
 create mode 100644 arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
 create mode 100644 arch/x86/include/asm/arch-tangier/global_nvs.h

index d146b3f5c2..92cfa555ed 100644
@@ -5,3 +5,4 @@
 #
 
 obj-y += car.o tangier.o sdram.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o

new file mode 100644
index 0000000000..b1f0f67979
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * Partially based on global_nvs.asl for other x86 platforms
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/acpi/global_nvs.h>
+
+OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE)
+Field(GNVS, ByteAcc, NoLock, Preserve)
+{
+    Offset (0x00),
+    PCNT, 8,    /* processor count */
+}

new file mode 100644
index 0000000000..a57b7cb319
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * Partially based on platform.asl for other x86 platforms
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/acpi/statdef.asl>
+
+/*
+ * The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0.
+ */
+Method(_PTS, 1)
+{
+}
+
+/* The _WAK method is called on system wakeup */
+Method(_WAK, 1)
+{
+    Return (Package() {0, 0})
+}
+
+/* ACPI global NVS */
+#include "global_nvs.asl"
+
+Scope (\_SB)
+{
+    #include "southcluster.asl"
+}

new file mode 100644
index 0000000000..8ab5cf2aa2
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * Partially based on global_nvs.h for other x86 platforms
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _GLOBAL_NVS_H_
+#define _GLOBAL_NVS_H_
+
+struct __packed acpi_global_nvs {
+	u8	pcnt;		/* processor count */
+
+	/*
+	 * Add padding so sizeof(struct acpi_global_nvs) == 0x100.
+	 * This must match the size defined in the global_nvs.asl.
+	 */
+	u8	rsvd[255];
+};
+
+#endif /* _GLOBAL_NVS_H_ */

2.14.2

applied to u-boot-x86, thanks!

This board is based on Intel Tangier SoC (Intel Merrifield platform) and may utilize ACPI powerfulness.

Bring minimum support by appending initial DSDT table for it.

Note, the addresses for generated tables are carefully chosen to avoid any conflicts with existing shadowed BIOS data. The user have somewhat like ~31 kB available for compiled ACPI tables that ought to be enough.

---
 board/intel/edison/.gitignore |  3 +++
 board/intel/edison/Kconfig    |  6 ++++++
 board/intel/edison/Makefile   |  1 +
 board/intel/edison/dsdt.asl   | 13 +++++++++++++
 include/configs/edison.h      |  3 +++
 5 files changed, 26 insertions(+)
 create mode 100644 board/intel/edison/.gitignore
 create mode 100644 board/intel/edison/dsdt.asl

new file mode 100644
index 0000000000..6eb8a5481a
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c

index 4ff9d5adec..ef9b14aa2b 100644
@@ -15,6 +15,12 @@ config SYS_CONFIG_NAME
 config SYS_TEXT_BASE
 	default 0x01101000
 
+config ROM_TABLE_ADDR
+	default 0x0e4500
+
+config ROM_TABLE_SIZE
+	default 0x007b00
+
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select X86_LOAD_FROM_32_BIT

index dde159435b..eed8d65eb6 100644
@@ -5,3 +5,4 @@
 #
 
 obj-y	+= start.o edison.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

new file mode 100644
index 0000000000..d2e04730c9
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * Partially based on dsdt.asl for other x86 boards
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+	/* platform specific */
+	#include <asm/arch/acpi/platform.asl>
+}

index d25b50c076..65d1660fc2 100644
@@ -9,6 +9,9 @@
 
 #include <asm/ibmpc.h>
 
+/* ACPI */
+#define CONFIG_LAST_STAGE_INIT
+
 /* Boot */
 #define CONFIG_BOOTCOMMAND "run bootcmd"
 

2.14.2

applied to u-boot-x86, thanks!