MIPS: microMIPS: Fix incorrect mask in insn_table_MM
PATCH 1/1 MIPS: microMIPS: Fix incorrect mask in insn_table_MM
It seems that this is a typo error and the proper bit masking is "RT | RS" instead of "RS | RS".
This issue was detected with the help of Coccinelle.
Reported-by Julia Lawall <[email protected]>
Signed-off-by Gustavo A. R. Silva <[email protected]>
--- arch/mips/mm/uasm-micromips.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/mips/mm/uasm-micromips.c +1 -1
@@ -80,7 +80,7 @@ static const struct insn const insn_table_MM[insn_invalid] = { [insn_jr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS}, [insn_lb] = {M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, [insn_ld] = {0, 0}, - [insn_lh] = {M(mm_lh32_op, 0, 0, 0, 0, 0), RS | RS | SIMM}, + [insn_lh] = {M(mm_lh32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, [insn_ll] = {M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM}, [insn_lld] = {0, 0}, [insn_lui] = {M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM},
Signature · 1 line
2.7.4
Quoted 6 lines · Gustavo A. R. Silva
It seems that this is a typo error and the proper bit masking is "RT | RS" instead of "RS | RS".
This issue was detected with the help of Coccinelle.
Reported-by Julia Lawall <[email protected]>
May I suggest adding:
Fixes d6b3314b49e1 ("MIPS: uasm: Add lh uam instruction")
Quoted 1 line
Signed-off-by Gustavo A. R. Silva <[email protected]>
Reviewed-by James Hogan <jhogan@@kernel.org>
Probably worthy of a stable tag too (though there will be conflicts with ce807d5f67ed309a6f357b88cc93185d89e921d3 before 4.13):
Cc: <[email protected]> # 3.16+
Thanks
James
Quoted 21 lines
--- arch/mips/mm/uasm-micromips.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/mips/mm/uasm-micromips.c +1
-1@@ -80,7 +80,7 @@ static const struct insn const insn_table_MM[insn_invalid] = { [insn_jr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS}, [insn_lb] = {M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, [insn_ld] = {0, 0}, - [insn_lh] = {M(mm_lh32_op, 0, 0, 0, 0, 0), RS | RS | SIMM}, + [insn_lh] = {M(mm_lh32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, [insn_ll] = {M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM}, [insn_lld] = {0, 0}, [insn_lui] = {M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM},Signature · 1 line
2.7.4
James Hogan
Reviewed-byQuoted 4 lines · James Hogan
Quoted 1 line · Gustavo A. R. Silva
Signed-off-by Gustavo A. R. Silva <[email protected]>Reviewed-by James Hogan <jhogan@@kernel.org>
That should of course be:
Reviewed-by James Hogan <[email protected]>