PDF formatting fixes
cover PDF formatting fixes
Tables and graphviz graphs are not formatted correctly with sphinx 1.6.5. This series fixes those issues (hopefully not breaking older versions).
Rob
Rob Herring (4):
Set horizontal margins to 2cm
Use fixed column widths for all 4 column property tables Ensure figures inserted at location in the source doc Set maximum sizes for digraphs
source/conf.py | 4 +++- source/device-bindings.rst | 8 ++++---- source/devicenodes.rst | 18 +++++++++--------- source/devicetree-basics.rst | 3 +++ source/flattened-format.rst | 1 + 5 files changed, 20 insertions(+), 14 deletions(-)
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2.14.1
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PATCH 1/4 Set horizontal margins to 2cm
Some tables are a bit squashed, so decrease the margins a bit.
Signed-off-by Rob Herring <[email protected]>
--- source/conf.py | 2 ++ 1 file changed, 2 insertions(+)
source/conf.py +2 -0
@@ -242,6 +242,8 @@ latex_elements = { # The paper size ('letterpaper' or 'a4paper'). 'papersize': 'a4paper', + 'sphinxsetup': 'hmargin=2cm', + # The font size ('10pt', '11pt' or '12pt'). #'pointsize': '10pt',
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PATCH 2/4 Use fixed column widths for all 4 column property tables
In reply to a message not in the archiveWe have a mixture of table widths and the auto sizing doesn't want to use the maximum line width in some Sphinx versions for some reason. We've already used fixed widths in some places, so just use fixed widths everywhere.
Signed-off-by Rob Herring <[email protected]>
--- source/device-bindings.rst | 8 ++++---- source/devicenodes.rst | 18 +++++++++--------- 2 files changed, 13 insertions(+), 13 deletions(-)
source/device-bindings.rst +4 -4
@@ -150,7 +150,7 @@ specific representation. ``current-speed`` Property ^^^^^^^^^^^^^^^^^^^^^^^^^^ -.. tabularcolumns:: l J +.. tabularcolumns:: | l J | .. table:: ``current-speed`` Property =========== ==============================================================
@@ -170,7 +170,7 @@ Serial devices compatible to the National Semiconductor 16450/16550 UART (Universal Asynchronous Receiver Transmitter) should be represented in the devicetree using following properties. -.. tabularcolumns:: l c l J +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ns16550 UART Properties ======================= ===== ===================== ===============================================
@@ -393,7 +393,7 @@ specifiers: 2 = active high level sensitive type enabled 3 = high to low edge sensitive type enabled -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: Open-PIC properties ======================== ===== ===================== ===============================================
@@ -423,7 +423,7 @@ probed for devices. The devices on the bus can be accessed directly without additional configuration required. This type of bus is represented as a node with a compatible value of "simple-bus". -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``simple-bus`` Compatible Node Properties ======================== ===== ===================== ===============================================
source/devicenodes.rst +9 -9
@@ -22,7 +22,7 @@ Root node The devicetree has a single root node of which all other device nodes are descendants. The full path to the root node is ``/``. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: Root Node Properties =================== ===== ================= ===============================================
@@ -131,7 +131,7 @@ memory reservations) as WIMG = 0b001x. That is: If the VLE storage attribute is supported, with VLE=0. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/memory`` Node Properties ======================= ===== ========================= ===============================================
@@ -202,7 +202,7 @@ The ``/chosen`` node does not represent a real device in the system but describes parameters chosen or specified by the system firmware at run time. It shall be a child of the root node. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/chosen`` Node Properties ======================= ===== ===================== ===============================================
@@ -253,7 +253,7 @@ A ``/cpus`` node is required for all devicetrees. It does not represent a real device in the system, but acts as a container for child ``cpu`` nodes which represent the systems CPUs. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/cpus`` Node Properties ======================= ===== ===================== ===============================================
@@ -310,7 +310,7 @@ The following table describes the general properties of ``cpu`` nodes. Some of the properties described in :numref:`table-cpu-node-props` are select standard properties with specific applicable detail. -.. tabularcolumns:: | p{1.5cm} p{1cm} p{2.5cm} p{9.0cm} | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. _table-cpu-node-props: .. table:: ``/cpus/cpu*`` Node General Properties :class: longtable
@@ -435,7 +435,7 @@ standard properties with specific applicable detail. :ref:`sect-standard-properties`) are allowed but are optional. -.. tabularcolumns:: | p{1.5cm} p{1cm} p{2.5cm} p{9.0cm} | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/cpus/cpu*`` Node Power ISA Properties :class: longtable
@@ -503,7 +503,7 @@ The following properties of a cpu node describe the translate look-aside buffer in the processor’s MMU. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/cpu/cpu*`` Node Power ISA TLB Properties ============== ===== =========== ===============================================
@@ -546,7 +546,7 @@ Internal (L1) Cache Properties The following properties of a cpu node describe the processor’s internal (L1) cache. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/cpu/cpu*`` Node Power ISA Cache Properties ======================= ===== ============= ===============================================
@@ -658,7 +658,7 @@ appropriate location in the devicetree. Multiple-level and shared caches are represented with the properties in Table 3-9. The L1 cache properties are described in Table 3-8. -.. tabularcolumns:: | l c l J | +.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | .. table:: ``/cpu/cpu*/l?-cache`` Node Power ISA Multiple-level and Shared Cache Properties =============== ===== ============ ===============================================
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PATCH 3/4 Ensure figures inserted at location in the source doc
In reply to a message not in the archiveBy default, Latex will move figures to give "better" page breaks. This leads to some strange placement, so ensure figures are always placed in the same position as they are in the source files.
Signed-off-by Rob Herring <[email protected]>
--- source/conf.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
source/conf.py +1 -1
@@ -248,7 +248,7 @@ latex_elements = { #'pointsize': '10pt', # Latex figure (float) alignment -#'figure_align': 'htbp', + 'figure_align': 'H', } # Release numbers with a qualifier (ex. '-rc', '-pre') get a watermark.
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PATCH 4/4 Set maximum sizes for digraphs
In reply to a message not in the archiveBetween 1.5.6 and 1.6.5 of sphinx, the digraphs stopped being scaled to fit. Add a maximum size to them to fix this.
Signed-off-by Rob Herring <[email protected]>
--- source/devicetree-basics.rst | 3 +++ source/flattened-format.rst | 1 + 2 files changed, 4 insertions(+)
source/devicetree-basics.rst +3 -0
@@ -47,6 +47,7 @@ with properties and values inside each node. rankdir = LR; ranksep = equally; + size = "6,8" node [ shape="Mrecord"; width="3.5"; fontname = Courier; ]; "/" [ label = "\N |
@@ -153,6 +154,7 @@ identified by a forward slash (/). rankdir = LR; ranksep = equally; + size = "6,8" node [ shape="Mrecord"; width="2.5"; fontname = Courier; ]; "/":e -> "cpus":w
@@ -883,6 +885,7 @@ sits in the logical interrupt tree. rankdir = LR ranksep = "1.5" + size = "6,8" edge [ dir="none" ] node [ shape="Mrecord" width="2.5" ]
source/flattened-format.rst +1 -0
@@ -24,6 +24,7 @@ will resemble the diagram in :numref:`figure_device_tree_structure` rankdir = LR ranksep = "1.5" + size = "6,8" edge [ dir="none" ] node [ shape="Mrecord" width="2.5" ]
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