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imx: spl: Fix NAND bootmode detection

PATCH New Eran Matityahu 1 participant 1 message Dec 14, 2017

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PATCH 1/1 imx: spl: Fix NAND bootmode detection

commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit") broke the NAND bootmode detection by checking if BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_* macros that were introduced since.

Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf, like it was in the code before.

Cc Stefano Babic <[email protected]>
Cc Jagan Teki <[email protected]>
Cc Tim Harvey <[email protected]>
---
 arch/arm/include/asm/mach-imx/sys_proto.h | 3 ++-
 arch/arm/mach-imx/spl.c                   | 2 +-
 board/engicam/common/board.c              | 2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)
arch/arm/include/asm/mach-imx/sys_proto.h +2 -1
index a80a392..9bdb40f 100644
@@ -81,7 +81,8 @@ enum imx6_bmode {
 	IMX6_BMODE_ESD,
 	IMX6_BMODE_MMC,
 	IMX6_BMODE_EMMC,
-	IMX6_BMODE_NAND,
+	IMX6_BMODE_NAND_MIN,
+	IMX6_BMODE_NAND_MAX = 0xf,
 };
 
 static inline u8 imx6_is_bmode_from_gpr9(void)
arch/arm/mach-imx/spl.c +1 -1
index d0d1b73..723f51f 100644
@@ -91,7 +91,7 @@ u32 spl_boot_device(void)
 	case IMX6_BMODE_EMMC:
 		return BOOT_DEVICE_MMC1;
 	/* NAND Flash: 8.5.2, Table 8-10 */
-	case IMX6_BMODE_NAND:
+	case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
 		return BOOT_DEVICE_NAND;
 	}
 	return BOOT_DEVICE_NONE;
board/engicam/common/board.c +1 -1
index f633c71..1bdd833 100644
@@ -69,7 +69,7 @@ int board_late_init(void)
 #endif
 		env_set("modeboot", "mmcboot");
 		break;
-	case IMX6_BMODE_NAND:
+	case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
 		env_set("modeboot", "nandboot");
 		break;
 	default:
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