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bmips: add support for bcm6368 usbh phy

PATCH New Álvaro Fernández Rojas 2 participants 23 messages Feb 4, 2018 – Mar 19, 2018

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#0 lore raw

cover bmips: add support for bcm6368 usbh phy

Add support for BCM 6328/6362/6368/63268 usbh phy.

Álvaro Fernández Rojas (9):
phy: add support for bcm6368 usbh phy
mips: bmips: add support for bcm6368 usb
mips: bmips: add wap-5813n usb support
mips: bmips: add support for bcm6328 usb
mips: bmips: add ar-5387un usb support
mips: bmips: add support for bcm6362 usb
mips: bmips: add dgnd3700v2 usb support
mips: bmips: add support for bcm63268 usb
mips: bmips: add vr-3032u usb support

 arch/mips/dts/brcm,bcm63268.dtsi         |  30 +++++
 arch/mips/dts/brcm,bcm6328.dtsi          |  30 +++++
 arch/mips/dts/brcm,bcm6362.dtsi          |  30 +++++
 arch/mips/dts/brcm,bcm6368.dtsi          |  29 +++++
 arch/mips/dts/comtrend,ar-5387un.dts     |  12 ++
 arch/mips/dts/comtrend,vr-3032u.dts      |  12 ++
 arch/mips/dts/comtrend,wap-5813n.dts     |  12 ++
 arch/mips/dts/netgear,dgnd3700v2.dts     |  12 ++
 configs/comtrend_ar5387un_ram_defconfig  |   9 ++
 configs/comtrend_vr3032u_ram_defconfig   |   9 ++
 configs/comtrend_wap5813n_ram_defconfig  |   9 ++
 configs/netgear_dgnd3700v2_ram_defconfig |   9 ++
 drivers/phy/Kconfig                      |   6 +
 drivers/phy/Makefile                     |   1 +
 drivers/phy/bcm6368-usbh-phy.c           | 203 +++++++++++++++++++++++++++++++
 include/configs/bmips_bcm63268.h         |   7 ++
 include/configs/bmips_bcm6328.h          |   7 ++
 include/configs/bmips_bcm6362.h          |   7 ++
 include/configs/bmips_bcm6368.h          |   7 ++
 19 files changed, 441 insertions(+)
 create mode 100644 drivers/phy/bcm6368-usbh-phy.c
Signature · 1 line
2.11.0
#1 lore raw

PATCH 1/9 phy: add support for bcm6368 usbh phy

---
 drivers/phy/Kconfig            |   6 ++
 drivers/phy/Makefile           |   1 +
 drivers/phy/bcm6368-usbh-phy.c | 203 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/phy/bcm6368-usbh-phy.c
drivers/phy/Kconfig +6 -0
index 43fb4c9bfd..d3fa9ded2a 100644
@@ -71,6 +71,12 @@ config BCM6358_USBH_PHY
 	help
 	  Support for the Broadcom MIPS BCM6358 USBH PHY.
 
+config BCM6368_USBH_PHY
+	bool "BCM6368 USBH PHY support"
+	depends on PHY && ARCH_BMIPS
+	help
+	  Support for the Broadcom MIPS BCM6368 USBH PHY.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
drivers/phy/Makefile +1 -0
index 04843fd49b..d8239854a3 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
 obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
+obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
drivers/phy/bcm6368-usbh-phy.c new file +203 -0

203 lines not on this page · raw message

Signature · 1 line
2.11.0
#2 lore raw

PATCH v2 1/9 phy: add support for bcm6368 usbh phy

Quoted 8 lines · Álvaro Fernández Rojas
---
 drivers/phy/Kconfig            |   6 ++
 drivers/phy/Makefile           |   1 +
 drivers/phy/bcm6368-usbh-phy.c | 203 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/phy/bcm6368-usbh-phy.c

nits below

Quoted 149 lines
drivers/phy/Kconfig +6 -0
index 43fb4c9bfd..d3fa9ded2a 100644
@@ -71,6 +71,12 @@ config BCM6358_USBH_PHY
 	help
 	  Support for the Broadcom MIPS BCM6358 USBH PHY.
 
+config BCM6368_USBH_PHY
+	bool "BCM6368 USBH PHY support"
+	depends on PHY && ARCH_BMIPS
+	help
+	  Support for the Broadcom MIPS BCM6368 USBH PHY.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
drivers/phy/Makefile +1 -0
index 04843fd49b..d8239854a3 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
 obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
+obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
drivers/phy/bcm6368-usbh-phy.c new file +114 -0
new file mode 100644
index 0000000000..93577b30ba
@@ -0,0 +1,203 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/bcm63xx/usb-common.c:
+ *	Copyright 2008 Maxime Bizon <[email protected]>
+ *	Copyright 2013 Florian Fainelli <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <power-domain.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <dm/device.h>
+
+/* USBH PLL Control register */
+#define USBH_PLL_REG		0x18
+#define USBH_PLL_IDDQ_PWRDN	BIT(9)
+#define USBH_PLL_PWRDN_DELAY	BIT(10)
+
+/* USBH Swap Control register */
+#define USBH_SWAP_REG		0x1c
+#define USBH_SWAP_OHCI_DATA	BIT(0)
+#define USBH_SWAP_OHCI_ENDIAN	BIT(1)
+#define USBH_SWAP_EHCI_DATA	BIT(3)
+#define USBH_SWAP_EHCI_ENDIAN	BIT(4)
+
+/* USBH Setup register */
+#define USBH_SETUP_REG		0x28
+#define USBH_SETUP_IOC		BIT(4)
+#define USBH_SETUP_IPP		BIT(5)
+
+struct bcm6368_usbh_hw {
+	uint32_t setup_clr;
+	uint32_t setup_set;
+	uint32_t pll_clr;
+};
+
+struct bcm6368_usbh_priv {
+	const struct bcm6368_usbh_hw *hw;
+	void __iomem *regs;
+};
+
+static int bcm6368_usbh_init(struct phy *phy)
+{
+	struct bcm6368_usbh_priv *priv = dev_get_priv(phy->dev);
+	const struct bcm6368_usbh_hw *hw = priv->hw;
+
+	/* configure to work in native cpu endian */
+	clrsetbits_be32(priv->regs + USBH_SWAP_REG,
+			USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
+			USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
+
+	/* setup config */
+	if (hw->setup_clr)
+		clrbits_be32(priv->regs + USBH_SETUP_REG,
+			     hw->setup_clr);
+
+	setbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_set);
+
+	/* enable pll control */
+	if (hw->pll_clr)
+		clrbits_be32(priv->regs + USBH_PLL_REG,
+			     hw->pll_clr);
+
+	return 0;
+}
+
+static struct phy_ops bcm6368_usbh_ops = {
+	.init = bcm6368_usbh_init,
+};
+
+static const struct bcm6368_usbh_hw bcm6328_hw = {
+	.pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
+	.setup_clr = 0,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct bcm6368_usbh_hw bcm6362_hw = {
+	.pll_clr = 0,
+	.setup_clr = 0,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct bcm6368_usbh_hw bcm6368_hw = {
+	.pll_clr = 0,
+	.setup_clr = 0,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct bcm6368_usbh_hw bcm63268_hw = {
+	.pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
+	.setup_clr = USBH_SETUP_IPP,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct udevice_id bcm6368_usbh_ids[] = {
+	{
+		.compatible = "brcm,bcm6328-usbh",
+		.data = (ulong)&bcm6328_hw,
+	}, {
+		.compatible = "brcm,bcm6362-usbh",
+		.data = (ulong)&bcm6362_hw,
+	}, {
+		.compatible = "brcm,bcm6368-usbh",
+		.data = (ulong)&bcm6368_hw,
+	}, {
+		.compatible = "brcm,bcm63268-usbh",
+		.data = (ulong)&bcm63268_hw,
+	}, { /* sentinel */ }

drivers/phy/bcm6368-usbh-phy.c line 124

Quoted 10 lines
drivers/phy/bcm6368-usbh-phy.c new file +10 -0
+};
+
+static int bcm6368_usbh_probe(struct udevice *dev)
+{
+	struct bcm6368_usbh_priv *priv = dev_get_priv(dev);
+	const struct bcm6368_usbh_hw *hw =
+		(const struct bcm6368_usbh_hw *)dev_get_driver_data(dev);
+#if defined(CONFIG_POWER_DOMAIN)
+	struct power_domain pwr_dom;
+#endif

would the driver work without CONFIG_POWER_DOMAIN or would this be always needed? I'm asking because in the USB PHY driver for BCM6318 you do a "select POWER_DOMAIN".

Quoted 80 lines
drivers/phy/bcm6368-usbh-phy.c new file +79 -0
+	struct reset_ctl rst_ctl;
+	struct clk clk;
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int ret;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = ioremap(addr, size);
+	priv->hw = hw;
+
+	/* enable usbh clock */
+	ret = clk_get_by_name(dev, "usbh", &clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_enable(&clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_free(&clk);
+	if (ret < 0)
+		return ret;
+
+#if defined(CONFIG_POWER_DOMAIN)
+	/* enable power domain */
+	ret = power_domain_get(dev, &pwr_dom);
+	if (ret < 0)
+		return ret;
+
+	ret = power_domain_on(&pwr_dom);
+	if (ret < 0)
+		return ret;
+
+	ret = power_domain_free(&pwr_dom);
+	if (ret < 0)
+		return ret;
+#endif
+
+	/* perform reset */
+	ret = reset_get_by_index(dev, 0, &rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_deassert(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_free(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	/* enable usb_ref clock */
+	ret = clk_get_by_name(dev, "usb_ref", &clk);
+	if (!ret) {
+		ret = clk_enable(&clk);
+		if (ret < 0)
+			return ret;
+
+		ret = clk_free(&clk);
+		if (ret < 0)
+			return ret;
+	}
+
+	mdelay(100);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6368_usbh) = {
+	.name = "bcm6368-usbh",
+	.id = UCLASS_PHY,
+	.of_match = bcm6368_usbh_ids,
+	.ops = &bcm6368_usbh_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm6368_usbh_priv),
+	.probe = bcm6368_usbh_probe,
+};
Signature · 9 lines
- Daniel

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#3 lore raw

PATCH 1/9 phy: add support for bcm6368 usbh phy

Hi Daniel,

Quoted 168 lines · Daniel Schwierzeck
Quoted 8 lines · Álvaro Fernández Rojas
---
  drivers/phy/Kconfig            |   6 ++
  drivers/phy/Makefile           |   1 +
  drivers/phy/bcm6368-usbh-phy.c | 203 +++++++++++++++++++++++++++++++++++++++++
  3 files changed, 210 insertions(+)

create mode 100644 drivers/phy/bcm6368-usbh-phy.c

nits below

Quoted 154 lines
drivers/phy/Kconfig +6 -0
index 43fb4c9bfd..d3fa9ded2a 100644
@@ -71,6 +71,12 @@ config BCM6358_USBH_PHY
  	help
  	  Support for the Broadcom MIPS BCM6358 USBH PHY.
 
+config BCM6368_USBH_PHY
+	bool "BCM6368 USBH PHY support"
+	depends on PHY && ARCH_BMIPS
+	help
+	  Support for the Broadcom MIPS BCM6368 USBH PHY.
+
  config PIPE3_PHY
  	bool "Support omap's PIPE3 PHY"
  	depends on PHY && ARCH_OMAP2PLUS
drivers/phy/Makefile +1 -0
index 04843fd49b..d8239854a3 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
  obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
  obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
  obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
+obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o
  obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
  obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
  obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
drivers/phy/bcm6368-usbh-phy.c new file +119 -0
new file mode 100644
index 0000000000..93577b30ba
@@ -0,0 +1,203 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/bcm63xx/usb-common.c:
+ *	Copyright 2008 Maxime Bizon <[email protected]>
+ *	Copyright 2013 Florian Fainelli <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <power-domain.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <dm/device.h>
+
+/* USBH PLL Control register */
+#define USBH_PLL_REG		0x18
+#define USBH_PLL_IDDQ_PWRDN	BIT(9)
+#define USBH_PLL_PWRDN_DELAY	BIT(10)
+
+/* USBH Swap Control register */
+#define USBH_SWAP_REG		0x1c
+#define USBH_SWAP_OHCI_DATA	BIT(0)
+#define USBH_SWAP_OHCI_ENDIAN	BIT(1)
+#define USBH_SWAP_EHCI_DATA	BIT(3)
+#define USBH_SWAP_EHCI_ENDIAN	BIT(4)
+
+/* USBH Setup register */
+#define USBH_SETUP_REG		0x28
+#define USBH_SETUP_IOC		BIT(4)
+#define USBH_SETUP_IPP		BIT(5)
+
+struct bcm6368_usbh_hw {
+	uint32_t setup_clr;
+	uint32_t setup_set;
+	uint32_t pll_clr;
+};
+
+struct bcm6368_usbh_priv {
+	const struct bcm6368_usbh_hw *hw;
+	void __iomem *regs;
+};
+
+static int bcm6368_usbh_init(struct phy *phy)
+{
+	struct bcm6368_usbh_priv *priv = dev_get_priv(phy->dev);
+	const struct bcm6368_usbh_hw *hw = priv->hw;
+
+	/* configure to work in native cpu endian */
+	clrsetbits_be32(priv->regs + USBH_SWAP_REG,
+			USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
+			USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
+
+	/* setup config */
+	if (hw->setup_clr)
+		clrbits_be32(priv->regs + USBH_SETUP_REG,
+			     hw->setup_clr);
+
+	setbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_set);
+
+	/* enable pll control */
+	if (hw->pll_clr)
+		clrbits_be32(priv->regs + USBH_PLL_REG,
+			     hw->pll_clr);
+
+	return 0;
+}
+
+static struct phy_ops bcm6368_usbh_ops = {
+	.init = bcm6368_usbh_init,
+};
+
+static const struct bcm6368_usbh_hw bcm6328_hw = {
+	.pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
+	.setup_clr = 0,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct bcm6368_usbh_hw bcm6362_hw = {
+	.pll_clr = 0,
+	.setup_clr = 0,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct bcm6368_usbh_hw bcm6368_hw = {
+	.pll_clr = 0,
+	.setup_clr = 0,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct bcm6368_usbh_hw bcm63268_hw = {
+	.pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
+	.setup_clr = USBH_SETUP_IPP,
+	.setup_set = USBH_SETUP_IOC,
+};
+
+static const struct udevice_id bcm6368_usbh_ids[] = {
+	{
+		.compatible = "brcm,bcm6328-usbh",
+		.data = (ulong)&bcm6328_hw,
+	}, {
+		.compatible = "brcm,bcm6362-usbh",
+		.data = (ulong)&bcm6362_hw,
+	}, {
+		.compatible = "brcm,bcm6368-usbh",
+		.data = (ulong)&bcm6368_hw,
+	}, {
+		.compatible = "brcm,bcm63268-usbh",
+		.data = (ulong)&bcm63268_hw,
+	}, { /* sentinel */ }
+};
+
+static int bcm6368_usbh_probe(struct udevice *dev)
+{
+	struct bcm6368_usbh_priv *priv = dev_get_priv(dev);
Quoted 8 lines

drivers/phy/bcm6368-usbh-phy.c line 124

Quoted 5 lines
drivers/phy/bcm6368-usbh-phy.c new file +5 -0
+	const struct bcm6368_usbh_hw *hw =
+		(const struct bcm6368_usbh_hw *)dev_get_driver_data(dev);
+#if defined(CONFIG_POWER_DOMAIN)
+	struct power_domain pwr_dom;
+#endif

would the driver work without CONFIG_POWER_DOMAIN or would this be always needed? I'm asking because in the USB PHY driver for BCM6318 you do a "select POWER_DOMAIN".

Only 6328, 6362 and 63268 have a power domain controller. However, the 6368 doesn't have it.

Quoted 81 lines
Quoted 81 lines
drivers/phy/bcm6368-usbh-phy.c new file +79 -0
+	struct reset_ctl rst_ctl;
+	struct clk clk;
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int ret;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = ioremap(addr, size);
+	priv->hw = hw;
+
+	/* enable usbh clock */
+	ret = clk_get_by_name(dev, "usbh", &clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_enable(&clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_free(&clk);
+	if (ret < 0)
+		return ret;
+
+#if defined(CONFIG_POWER_DOMAIN)
+	/* enable power domain */
+	ret = power_domain_get(dev, &pwr_dom);
+	if (ret < 0)
+		return ret;
+
+	ret = power_domain_on(&pwr_dom);
+	if (ret < 0)
+		return ret;
+
+	ret = power_domain_free(&pwr_dom);
+	if (ret < 0)
+		return ret;
+#endif
+
+	/* perform reset */
+	ret = reset_get_by_index(dev, 0, &rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_deassert(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_free(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	/* enable usb_ref clock */
+	ret = clk_get_by_name(dev, "usb_ref", &clk);
+	if (!ret) {
+		ret = clk_enable(&clk);
+		if (ret < 0)
+			return ret;
+
+		ret = clk_free(&clk);
+		if (ret < 0)
+			return ret;
+	}
+
+	mdelay(100);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6368_usbh) = {
+	.name = "bcm6368-usbh",
+	.id = UCLASS_PHY,
+	.of_match = bcm6368_usbh_ids,
+	.ops = &bcm6368_usbh_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm6368_usbh_priv),
+	.probe = bcm6368_usbh_probe,
+};
#4 lore raw

PATCH 2/9 mips: bmips: add support for bcm6368 usb

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/brcm,bcm6368.dtsi | 29 +++++++++++++++++++++++++++++
 include/configs/bmips_bcm6368.h |  7 +++++++
 2 files changed, 36 insertions(+)
arch/mips/dts/brcm,bcm6368.dtsi +29 -0
index 1bb538a1f3..fc1c5a244f 100644
@@ -164,5 +164,34 @@
 			reg = <0x10001200 0x4c>;
 			u-boot,dm-pre-reloc;
 		};
+
+		ehci: usb-controller at 10001500 {
+			compatible = "brcm,bcm6368-ehci", "generic-ehci";
+			reg = <0x10001500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10001600 {
+			compatible = "brcm,bcm6368-ohci", "generic-ohci";
+			reg = <0x10001600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10001700 {
+			compatible = "brcm,bcm6368-usbh";
+			reg = <0x10001700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6368_CLK_USBH>;
+			clock-names = "usbh";
+			resets = <&periph_rst BCM6368_RST_USBH>;
+
+			status = "disabled";
+		};
 	};
 };
include/configs/bmips_bcm6368.h +7 -0
index ce35fae6a0..ad8877b7d3 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#5 lore raw

PATCH 3/9 mips: bmips: add wap-5813n usb support

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/comtrend,wap-5813n.dts    | 12 ++++++++++++
 configs/comtrend_wap5813n_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/comtrend,wap-5813n.dts +12 -0
index 29386e2662..f1f5430b42 100644
@@ -51,10 +51,18 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &gpio0 {
 	status = "okay";
 };
 
+&ohci {
+	status = "okay";
+};
+
 &pflash {
 	status = "okay";
 };
@@ -63,3 +71,7 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/comtrend_wap5813n_ram_defconfig +9 -0
index 985bd3cc25..3edfc7aad0 100644
@@ -25,6 +25,7 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -37,8 +38,16 @@ CONFIG_LED_GPIO=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
+CONFIG_PHY=y
+CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#6 lore raw

PATCH 4/9 mips: bmips: add support for bcm6328 usb

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/brcm,bcm6328.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm6328.h |  7 +++++++
 2 files changed, 37 insertions(+)
arch/mips/dts/brcm,bcm6328.dtsi +30 -0
index 67d9278be4..4fbbcec153 100644
@@ -153,6 +153,36 @@
 			#power-domain-cells = <1>;
 		};
 
+		ehci: usb-controller at 10002500 {
+			compatible = "brcm,bcm6328-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10002600 {
+			compatible = "brcm,bcm6328-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10002700 {
+			compatible = "brcm,bcm6328-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6328_CLK_USBH>;
+			clock-names = "usbh";
+			power-domains = <&periph_pwr BCM6328_PWR_USBH>;
+			resets = <&periph_rst BCM6328_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller at 10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x864>;
include/configs/bmips_bcm6328.h +7 -0
index 41c7838a23..2cb9b5540e 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#7 lore raw

PATCH 5/9 mips: bmips: add ar-5387un usb support

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/comtrend,ar-5387un.dts    | 12 ++++++++++++
 configs/comtrend_ar5387un_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/comtrend,ar-5387un.dts +12 -0
index 6067881a78..3a97315b3f 100644
@@ -21,6 +21,10 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &leds {
 	status = "okay";
 
@@ -51,6 +55,10 @@
 	};
 };
 
+&ohci {
+	status = "okay";
+};
+
 &spi {
 	status = "okay";
 
@@ -67,3 +75,7 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/comtrend_ar5387un_ram_defconfig +9 -0
index e4ed8cf9e0..72e069ba43 100644
@@ -28,6 +28,7 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -41,6 +42,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_BCM6358_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_BCM6328_POWER_DOMAIN=y
 CONFIG_DM_RESET=y
@@ -50,3 +53,9 @@ CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_DM_SPI=y
 CONFIG_BCM63XX_HSSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#8 lore raw

PATCH 6/9 mips: bmips: add support for bcm6362 usb

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/brcm,bcm6362.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm6362.h |  7 +++++++
 2 files changed, 37 insertions(+)
arch/mips/dts/brcm,bcm6362.dtsi +30 -0
index 921fcd52c3..20a589b007 100644
@@ -177,6 +177,36 @@
 			#power-domain-cells = <1>;
 		};
 
+		ehci: usb-controller at 10002500 {
+			compatible = "brcm,bcm6362-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10002600 {
+			compatible = "brcm,bcm6362-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10002700 {
+			compatible = "brcm,bcm6368-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6362_CLK_USBH>;
+			clock-names = "usbh";
+			power-domains = <&periph_pwr BCM6362_PWR_USBH>;
+			resets = <&periph_rst BCM6362_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller at 10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x864>;
include/configs/bmips_bcm6362.h +7 -0
index 6ff0a33d49..79eeb17feb 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#9 lore raw

PATCH 7/9 mips: bmips: add dgnd3700v2 usb support

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/netgear,dgnd3700v2.dts     | 12 ++++++++++++
 configs/netgear_dgnd3700v2_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/netgear,dgnd3700v2.dts +12 -0
index 2739f2035a..bcd14f8013 100644
@@ -40,6 +40,10 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &gpio0 {
 	status = "okay";
 };
@@ -115,7 +119,15 @@
 	};
 };
 
+&ohci {
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/netgear_dgnd3700v2_ram_defconfig +9 -0
index 8106081fe0..4927a738f8 100644
@@ -27,6 +27,7 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -38,6 +39,8 @@ CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_PHY=y
+CONFIG_BCM6358_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_BCM6328_POWER_DOMAIN=y
 CONFIG_DM_RESET=y
@@ -45,3 +48,9 @@ CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#10 lore raw

PATCH 8/9 mips: bmips: add support for bcm63268 usb

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/brcm,bcm63268.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm63268.h |  7 +++++++
 2 files changed, 37 insertions(+)
arch/mips/dts/brcm,bcm63268.dtsi +30 -0
index 4d4e36cccc..ade0b49e68 100644
@@ -183,6 +183,36 @@
 			status = "disabled";
 		};
 
+		ehci: usb-controller at 10002500 {
+			compatible = "brcm,bcm63268-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10002600 {
+			compatible = "brcm,bcm63268-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10002700 {
+			compatible = "brcm,bcm63268-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM63268_CLK_USBH>, <&timer_clk BCM63268_TCLK_USB_REF>;
+			clock-names = "usbh", "usb_ref";
+			power-domains = <&periph_pwr BCM63268_PWR_USBH>;
+			resets = <&periph_rst BCM63268_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller at 10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x894>;
include/configs/bmips_bcm63268.h +7 -0
index ac0a6700f7..042479b515 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#11 lore raw

PATCH 9/9 mips: bmips: add vr-3032u usb support

In reply to Álvaro Fernández Rojas
---
 arch/mips/dts/comtrend,vr-3032u.dts    | 12 ++++++++++++
 configs/comtrend_vr3032u_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/comtrend,vr-3032u.dts +12 -0
index 54e738c821..9bbecbcdff 100644
@@ -21,6 +21,10 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &leds {
 	status = "okay";
 	brcm,serial-leds;
@@ -64,7 +68,15 @@
 	};
 };
 
+&ohci {
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/comtrend_vr3032u_ram_defconfig +9 -0
index 0cf286c77c..f39d8d6f28 100644
@@ -26,6 +26,7 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -35,6 +36,8 @@ CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
+CONFIG_PHY=y
+CONFIG_BCM6358_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_BCM6328_POWER_DOMAIN=y
 CONFIG_DM_RESET=y
@@ -42,3 +45,9 @@ CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#12 lore raw

v2 cover bmips: add support for bcm6368 usbh phy

In reply to Álvaro Fernández Rojas

Add support for BCM 6328/6362/6368/63268 usbh phy.

v2: use correct phy driver and simplify code.

Álvaro Fernández Rojas (9):
phy: add support for bcm6368 usbh phy
mips: bmips: add support for bcm6368 usb
mips: bmips: add wap-5813n usb support
mips: bmips: add support for bcm6328 usb
mips: bmips: add ar-5387un usb support
mips: bmips: add support for bcm6362 usb
mips: bmips: add dgnd3700v2 usb support
mips: bmips: add support for bcm63268 usb
mips: bmips: add vr-3032u usb support

 arch/mips/dts/brcm,bcm63268.dtsi         |  30 +++++
 arch/mips/dts/brcm,bcm6328.dtsi          |  30 +++++
 arch/mips/dts/brcm,bcm6362.dtsi          |  30 +++++
 arch/mips/dts/brcm,bcm6368.dtsi          |  29 +++++
 arch/mips/dts/comtrend,ar-5387un.dts     |  12 ++
 arch/mips/dts/comtrend,vr-3032u.dts      |  12 ++
 arch/mips/dts/comtrend,wap-5813n.dts     |  12 ++
 arch/mips/dts/netgear,dgnd3700v2.dts     |  12 ++
 configs/comtrend_ar5387un_ram_defconfig  |   9 ++
 configs/comtrend_vr3032u_ram_defconfig   |   9 ++
 configs/comtrend_wap5813n_ram_defconfig  |   9 ++
 configs/netgear_dgnd3700v2_ram_defconfig |   9 ++
 drivers/phy/Kconfig                      |   6 +
 drivers/phy/Makefile                     |   1 +
 drivers/phy/bcm6368-usbh-phy.c           | 196 +++++++++++++++++++++++++++++++
 include/configs/bmips_bcm63268.h         |   7 ++
 include/configs/bmips_bcm6328.h          |   7 ++
 include/configs/bmips_bcm6362.h          |   7 ++
 include/configs/bmips_bcm6368.h          |   7 ++
 19 files changed, 434 insertions(+)
 create mode 100644 drivers/phy/bcm6368-usbh-phy.c
Signature · 1 line
2.11.0
#13 lore raw

PATCH v2 1/9 phy: add support for bcm6368 usbh phy

---
v2: simplify code removing setup register set bits

 drivers/phy/Kconfig            |   6 ++
 drivers/phy/Makefile           |   1 +
 drivers/phy/bcm6368-usbh-phy.c | 196 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 203 insertions(+)
 create mode 100644 drivers/phy/bcm6368-usbh-phy.c
drivers/phy/Kconfig +6 -0
index 43fb4c9bfd..d3fa9ded2a 100644
@@ -71,6 +71,12 @@ config BCM6358_USBH_PHY
 	help
 	  Support for the Broadcom MIPS BCM6358 USBH PHY.
 
+config BCM6368_USBH_PHY
+	bool "BCM6368 USBH PHY support"
+	depends on PHY && ARCH_BMIPS
+	help
+	  Support for the Broadcom MIPS BCM6368 USBH PHY.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
drivers/phy/Makefile +1 -0
index 04843fd49b..d8239854a3 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
 obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
+obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
drivers/phy/bcm6368-usbh-phy.c new file +196 -0

196 lines not on this page · raw message

Signature · 1 line
2.11.0
#14 lore raw

PATCH v2 2/9 mips: bmips: add support for bcm6368 usb

In reply to Álvaro Fernández Rojas

---
v2: no changes

 arch/mips/dts/brcm,bcm6368.dtsi | 29 +++++++++++++++++++++++++++++
 include/configs/bmips_bcm6368.h |  7 +++++++
 2 files changed, 36 insertions(+)
arch/mips/dts/brcm,bcm6368.dtsi +29 -0
index 1bb538a1f3..fc1c5a244f 100644
@@ -164,5 +164,34 @@
 			reg = <0x10001200 0x4c>;
 			u-boot,dm-pre-reloc;
 		};
+
+		ehci: usb-controller at 10001500 {
+			compatible = "brcm,bcm6368-ehci", "generic-ehci";
+			reg = <0x10001500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10001600 {
+			compatible = "brcm,bcm6368-ohci", "generic-ohci";
+			reg = <0x10001600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10001700 {
+			compatible = "brcm,bcm6368-usbh";
+			reg = <0x10001700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6368_CLK_USBH>;
+			clock-names = "usbh";
+			resets = <&periph_rst BCM6368_RST_USBH>;
+
+			status = "disabled";
+		};
 	};
 };
include/configs/bmips_bcm6368.h +7 -0
index ce35fae6a0..ad8877b7d3 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#15 lore raw

PATCH v2 3/9 mips: bmips: add wap-5813n usb support

In reply to Álvaro Fernández Rojas

---
v2: use correct phy driver

 arch/mips/dts/comtrend,wap-5813n.dts    | 12 ++++++++++++
 configs/comtrend_wap5813n_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/comtrend,wap-5813n.dts +12 -0
index 29386e2662..f1f5430b42 100644
@@ -51,10 +51,18 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &gpio0 {
 	status = "okay";
 };
 
+&ohci {
+	status = "okay";
+};
+
 &pflash {
 	status = "okay";
 };
@@ -63,3 +71,7 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/comtrend_wap5813n_ram_defconfig +9 -0
index 985bd3cc25..32cecc7e8b 100644
@@ -25,6 +25,7 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -37,8 +38,16 @@ CONFIG_LED_GPIO=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
+CONFIG_PHY=y
+CONFIG_BCM6368_USBH_PHY=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#16 lore raw

PATCH v2 4/9 mips: bmips: add support for bcm6328 usb

In reply to Álvaro Fernández Rojas

---
v2: no changes

 arch/mips/dts/brcm,bcm6328.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm6328.h |  7 +++++++
 2 files changed, 37 insertions(+)
arch/mips/dts/brcm,bcm6328.dtsi +30 -0
index 67d9278be4..4fbbcec153 100644
@@ -153,6 +153,36 @@
 			#power-domain-cells = <1>;
 		};
 
+		ehci: usb-controller at 10002500 {
+			compatible = "brcm,bcm6328-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10002600 {
+			compatible = "brcm,bcm6328-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10002700 {
+			compatible = "brcm,bcm6328-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6328_CLK_USBH>;
+			clock-names = "usbh";
+			power-domains = <&periph_pwr BCM6328_PWR_USBH>;
+			resets = <&periph_rst BCM6328_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller at 10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x864>;
include/configs/bmips_bcm6328.h +7 -0
index 41c7838a23..2cb9b5540e 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#17 lore raw

PATCH v2 5/9 mips: bmips: add ar-5387un usb support

In reply to Álvaro Fernández Rojas

---
v2: use correct phy driver

 arch/mips/dts/comtrend,ar-5387un.dts    | 12 ++++++++++++
 configs/comtrend_ar5387un_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/comtrend,ar-5387un.dts +12 -0
index 6067881a78..3a97315b3f 100644
@@ -21,6 +21,10 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &leds {
 	status = "okay";
 
@@ -51,6 +55,10 @@
 	};
 };
 
+&ohci {
+	status = "okay";
+};
+
 &spi {
 	status = "okay";
 
@@ -67,3 +75,7 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/comtrend_ar5387un_ram_defconfig +9 -0
index e4ed8cf9e0..a0e07072a7 100644
@@ -28,6 +28,7 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -41,6 +42,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_BCM6328_POWER_DOMAIN=y
 CONFIG_DM_RESET=y
@@ -50,3 +53,9 @@ CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_DM_SPI=y
 CONFIG_BCM63XX_HSSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#18 lore raw

PATCH v2 6/9 mips: bmips: add support for bcm6362 usb

In reply to Álvaro Fernández Rojas

---
v2: no changes

 arch/mips/dts/brcm,bcm6362.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm6362.h |  7 +++++++
 2 files changed, 37 insertions(+)
arch/mips/dts/brcm,bcm6362.dtsi +30 -0
index 921fcd52c3..20a589b007 100644
@@ -177,6 +177,36 @@
 			#power-domain-cells = <1>;
 		};
 
+		ehci: usb-controller at 10002500 {
+			compatible = "brcm,bcm6362-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10002600 {
+			compatible = "brcm,bcm6362-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10002700 {
+			compatible = "brcm,bcm6368-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6362_CLK_USBH>;
+			clock-names = "usbh";
+			power-domains = <&periph_pwr BCM6362_PWR_USBH>;
+			resets = <&periph_rst BCM6362_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller at 10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x864>;
include/configs/bmips_bcm6362.h +7 -0
index 6ff0a33d49..79eeb17feb 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#19 lore raw

PATCH v2 7/9 mips: bmips: add dgnd3700v2 usb support

In reply to Álvaro Fernández Rojas

---
v2: use correct phy driver

 arch/mips/dts/netgear,dgnd3700v2.dts     | 12 ++++++++++++
 configs/netgear_dgnd3700v2_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/netgear,dgnd3700v2.dts +12 -0
index 2739f2035a..bcd14f8013 100644
@@ -40,6 +40,10 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &gpio0 {
 	status = "okay";
 };
@@ -115,7 +119,15 @@
 	};
 };
 
+&ohci {
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/netgear_dgnd3700v2_ram_defconfig +9 -0
index 8106081fe0..4e31d71f35 100644
@@ -27,6 +27,7 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -38,6 +39,8 @@ CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_PHY=y
+CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_BCM6328_POWER_DOMAIN=y
 CONFIG_DM_RESET=y
@@ -45,3 +48,9 @@ CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#20 lore raw

PATCH v2 8/9 mips: bmips: add support for bcm63268 usb

In reply to Álvaro Fernández Rojas

---
v2: no changes

 arch/mips/dts/brcm,bcm63268.dtsi | 30 ++++++++++++++++++++++++++++++
 include/configs/bmips_bcm63268.h |  7 +++++++
 2 files changed, 37 insertions(+)
arch/mips/dts/brcm,bcm63268.dtsi +30 -0
index 4d4e36cccc..ade0b49e68 100644
@@ -183,6 +183,36 @@
 			status = "disabled";
 		};
 
+		ehci: usb-controller at 10002500 {
+			compatible = "brcm,bcm63268-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller at 10002600 {
+			compatible = "brcm,bcm63268-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy at 10002700 {
+			compatible = "brcm,bcm63268-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM63268_CLK_USBH>, <&timer_clk BCM63268_TCLK_USB_REF>;
+			clock-names = "usbh", "usb_ref";
+			power-domains = <&periph_pwr BCM63268_PWR_USBH>;
+			resets = <&periph_rst BCM63268_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller at 10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x894>;
include/configs/bmips_bcm63268.h +7 -0
index ac0a6700f7..042479b515 100644
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
 
Signature · 1 line
2.11.0
#21 lore raw

PATCH v2 9/9 mips: bmips: add vr-3032u usb support

In reply to Álvaro Fernández Rojas

---
v2: use correct phy driver

 arch/mips/dts/comtrend,vr-3032u.dts    | 12 ++++++++++++
 configs/comtrend_vr3032u_ram_defconfig |  9 +++++++++
 2 files changed, 21 insertions(+)
arch/mips/dts/comtrend,vr-3032u.dts +12 -0
index 54e738c821..9bbecbcdff 100644
@@ -21,6 +21,10 @@
 	};
 };
 
+&ehci {
+	status = "okay";
+};
+
 &leds {
 	status = "okay";
 	brcm,serial-leds;
@@ -64,7 +68,15 @@
 	};
 };
 
+&ohci {
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&usbh {
+	status = "okay";
+};
configs/comtrend_vr3032u_ram_defconfig +9 -0
index 0cf286c77c..e0bc60d35f 100644
@@ -26,6 +26,7 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
@@ -35,6 +36,8 @@ CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
+CONFIG_PHY=y
+CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_BCM6328_POWER_DOMAIN=y
 CONFIG_DM_RESET=y
@@ -42,3 +45,9 @@ CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SERIAL=y
 CONFIG_BCM6345_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
Signature · 1 line
2.11.0
#22 lore raw

v2 cover bmips: add support for bcm6368 usbh phy

In reply to Álvaro Fernández Rojas
Quoted 28 lines · Álvaro Fernández Rojas

Add support for BCM 6328/6362/6368/63268 usbh phy.

v2: use correct phy driver and simplify code.

Álvaro Fernández Rojas (9):
phy: add support for bcm6368 usbh phy
mips: bmips: add support for bcm6368 usb
mips: bmips: add wap-5813n usb support
mips: bmips: add support for bcm6328 usb
mips: bmips: add ar-5387un usb support
mips: bmips: add support for bcm6362 usb
mips: bmips: add dgnd3700v2 usb support
mips: bmips: add support for bcm63268 usb
mips: bmips: add vr-3032u usb support

 arch/mips/dts/brcm,bcm63268.dtsi         |  30 +++++
 arch/mips/dts/brcm,bcm6328.dtsi          |  30 +++++
 arch/mips/dts/brcm,bcm6362.dtsi          |  30 +++++
 arch/mips/dts/brcm,bcm6368.dtsi          |  29 +++++
 arch/mips/dts/comtrend,ar-5387un.dts     |  12 ++
 arch/mips/dts/comtrend,vr-3032u.dts      |  12 ++
 arch/mips/dts/comtrend,wap-5813n.dts     |  12 ++
 arch/mips/dts/netgear,dgnd3700v2.dts     |  12 ++
 configs/comtrend_ar5387un_ram_defconfig  |   9 ++
 configs/comtrend_vr3032u_ram_defconfig   |   9 ++
 configs/comtrend_wap5813n_ram_defconfig  |   9 ++
 configs/netgear_dgnd3700v2_ram_defconfig |   9 ++
 drivers/phy/Kconfig                      |   6 +
Quoted 9 lines
 drivers/phy/Makefile                     |   1 +
 drivers/phy/bcm6368-usbh-phy.c           | 196 +++++++++++++++++++++++++++++++
 include/configs/bmips_bcm63268.h         |   7 ++
 include/configs/bmips_bcm6328.h          |   7 ++
 include/configs/bmips_bcm6362.h          |   7 ++
 include/configs/bmips_bcm6368.h          |   7 ++
 19 files changed, 434 insertions(+)
 create mode 100644 drivers/phy/bcm6368-usbh-phy.c

applied to u-boot-mips, thanks.

Signature · 9 lines
- Daniel

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