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x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist

PATCH New Alexander Sergeyev 2 participants 2 messages Mar 13, 2018 – Mar 16, 2018 x86

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Alexander Sergeyev

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PATCH 1/1 x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist

In accordance with Intel's microcode revision guidance from March 6 MCU rev 0xc2 is cleared on both Skylake H/S and Skylake Xeon E3 processors that share CPUID 506E3.

Signed-off-by Alexander Sergeyev <[email protected]>

---
arch/x86/kernel/cpu/intel.c | 3 +--

1 file changed, 1 insertion(+), 2 deletions(-)
arch/x86/kernel/cpu/intel.c +0 -0
index b862067bb33c..3f8d7a3b6447 100644
@@ -105,7 +105,7 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)

/*
* Early microcode releases for the Spectre v2 mitigation were broken.
* Information taken from;
- * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
+ * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
* - https://kb.vmware.com/s/article/52345
* - Microcode revisions observed in the wild
* - Release note from 20180108 microcode release

@@ -123,7 +123,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x80 },
	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
-	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },
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2.16.1
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#1 lore raw
x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist
Commit-ID:  e3b3121fa8da94cb20f9e0c64ab7981ae47fd085
Gitweb:     https://git.kernel.org/tip/e3b3121fa8da94cb20f9e0c64ab7981ae47fd085
Author:     Alexander Sergeyev <[email protected]>
AuthorDate: Tue, 13 Mar 2018 22:38:56 +0300
Committer:  Thomas Gleixner <[email protected]>
CommitDate: Fri, 16 Mar 2018 12:33:11 +0100

x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist

In accordance with Intel's microcode revision guidance from March 6 MCU rev 0xc2 is cleared on both Skylake H/S and Skylake Xeon E3 processors that share CPUID 506E3.

Signed-off-by Alexander Sergeyev <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Cc Jia Zhang <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Kyle Huey <[email protected]>
Cc David Woodhouse <[email protected]>
Link https://lkml.kernel.org/r/[email protected] open here
---
 arch/x86/kernel/cpu/intel.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
arch/x86/kernel/cpu/intel.c +1 -2
index 4aa9fd379390..c3af167d0a70 100644
@@ -105,7 +105,7 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
 /*
  * Early microcode releases for the Spectre v2 mitigation were broken.
  * Information taken from;
- * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
+ * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
  * - https://kb.vmware.com/s/article/52345
  * - Microcode revisions observed in the wild
  * - Release note from 20180108 microcode release

@@ -123,7 +123,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
 	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x80 },
 	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
 	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
-	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
 	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
 	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
 	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },