drm/i915: Show dmc debug registers on CFL and GLK
Subsystems (2)
PATCH 1/1 drm/i915: Show dmc debug registers on CFL and GLK
Since Coffee Lake uses the Kaby Lake DMC it's a safe bet that the debug registers are the same. I haven't double-checked that the GLK DMC uses the same registers as BXT, but it seems as good of a guess as any.
--- drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/i915_debugfs.c +3 -2
@@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)seq_printf (m,"version: %d.%d\n" ,CSR_VERSION_MAJOR (csr->version),CSR_VERSION_MINOR (csr->version)); -if (IS_KABYLAKE (dev_priv) || +if (IS_KABYLAKE (dev_priv) ||IS_COFFEELAKE (dev_priv) || (IS_SKYLAKE (dev_priv) && csr->version >=CSR_VERSION (1 ,6 ))) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (SKL_CSR_DC3_DC5_COUNT ));seq_printf (m,"DC5 -> DC6 count: %d\n" ,I915_READ (SKL_CSR_DC5_DC6_COUNT )); - }else if (IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) { + }else if (IS_GEMINILAKE (dev_priv) || +IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (BXT_CSR_DC3_DC5_COUNT )); }
Signature · 6 lines
2.16.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✗ Fi.CI.BAT: failure for drm/i915: Show dmc debug registers on CFL and GLK
== Series Details ==
== Series Details ==
Series: drm/i915: Show dmc debug registers on CFL and GLK
URL : https://patchwork.freedesktop.org/series/40031/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK include/generated/bounds.h
CHK include/generated/timeconst.h
CHK include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
DESCEND objtool
CHK scripts/mod/devicetable-offsets.h
CHK include/generated/compile.h
CHK kernel/config_data.h
CC [M] drivers/gpu/drm/i915/i915_debugfs.o
drivers/gpu/drm/i915/i915_debugfs.c: In function ‘i915_dmc_info’:
drivers/gpu/drm/i915/i915_debugfs.c:2822:34: error: suggest parentheses around ‘&&’ within ‘||’ [-Werror=parentheses]
IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {cc1: all warnings being treated as errorsscripts/Makefile.build:324: recipe for target 'drivers/gpu/drm/i915/i915_debugfs.o' failed make[4]: *** [drivers/gpu/drm/i915/i915_debugfs.o] Error 1 scripts/Makefile.build:583: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2scripts/Makefile.build:583: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2scripts/Makefile.build:583: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1051: recipe for target 'drivers' failed
make: *** [drivers] Error 2
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PATCH 1/1 drm/i915: Show dmc debug registers on CFL and GLK
In reply to David WeinehallSince Coffee Lake uses the Kaby Lake DMC it's a safe bet that the debug registers are the same. I haven't double-checked that the GLK DMC uses the same registers as BXT, but it seems as good of a guess as any.
v2: Add parentheses to silence warning
--- drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/i915_debugfs.c +3 -2
@@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)seq_printf (m,"version: %d.%d\n" ,CSR_VERSION_MAJOR (csr->version),CSR_VERSION_MINOR (csr->version)); -if (IS_KABYLAKE (dev_priv) || +if (IS_KABYLAKE (dev_priv) ||IS_COFFEELAKE (dev_priv) || (IS_SKYLAKE (dev_priv) && csr->version >=CSR_VERSION (1 ,6 ))) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (SKL_CSR_DC3_DC5_COUNT ));seq_printf (m,"DC5 -> DC6 count: %d\n" ,I915_READ (SKL_CSR_DC5_DC6_COUNT )); - }else if (IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) { + }else if (IS_GEMINILAKE (dev_priv) || + (IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 ))) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (BXT_CSR_DC3_DC5_COUNT )); }
Signature · 6 lines
2.16.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for drm/i915: Show dmc debug registers on CFL and GLK (rev2)
In reply to David Weinehall== Series Details ==
== Series Details ==
Series: drm/i915: Show dmc debug registers on CFL and GLK (rev2)
URL : https://patchwork.freedesktop.org/series/40031/
State : success
== Summary ==
Series 40031v2 drm/i915: Show dmc debug registers on CFL and GLK
https://patchwork.freedesktop.org/api/1.0/series/40031/revisions/2/mbox/
---- Known issues:
Test debugfs_test:
Subgroup read_all_entries:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:435s fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:444s fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:536s fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:298s fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:514s fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:517s fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:503s fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:413s fi-cfl-s2 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:578s fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:513s fi-cnl-drrs total:285 pass:254 dwarn:3 dfail:0 fail:0 skip:28 time:524s fi-cnl-y3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:588s fi-elk-e7500 total:285 pass:226 dwarn:0 dfail:0 fail:0 skip:59 time:421s fi-gdg-551 total:285 pass:177 dwarn:0 dfail:0 fail:0 skip:108 time:318s fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:404s fi-ilk-650 total:285 pass:225 dwarn:0 dfail:0 fail:0 skip:60 time:421s fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:475s fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:428s fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:477s fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:472s fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:514s fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:656s fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:444s fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:532s fi-skl-6700hq total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:541s fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:507s fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:506s fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:428s fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:454s fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0 fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:405s
95626f201526d97b6f284b397fd73c8a2d514ff4 drm-tip: 2018y-03m-15d-11h-01m-14s UTC integration manifest 7800a68bfb39 drm/i915: Show dmc debug registers on CFL and GLK
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8365/issues.html
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Patchwork
CI✗ Fi.CI.IGT: failure for drm/i915: Show dmc debug registers on CFL and GLK (rev2)
In reply to David Weinehall== Series Details ==
== Series Details ==
Series: drm/i915: Show dmc debug registers on CFL and GLK (rev2)
URL : https://patchwork.freedesktop.org/series/40031/
State : failure
== Summary ==
---- Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc-modesetfrombusy:
pass -> FAIL (shard-apl)---- Known issues:
Test gem_eio:
Subgroup in-flight-external:
incomplete -> PASS (shard-apl) fdo#105341 +1
Test kms_flip:
Subgroup 2x-plain-flip-fb-recreate:
pass -> FAIL (shard-hsw) fdo#100368
Test kms_sysfs_edid_timing:
pass -> WARN (shard-apl) fdo#100047fdo#105341 https://bugs.freedesktop.org/show_bug.cgi?id=105341
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
shard-apl total:3399 pass:1795 dwarn:1 dfail:0 fail:8 skip:1592 time:12040s shard-hsw total:3442 pass:1767 dwarn:1 dfail:0 fail:2 skip:1671 time:11814s shard-snb total:3442 pass:1358 dwarn:1 dfail:0 fail:2 skip:2081 time:7201s
Blacklisted hosts:
shard-kbl total:2129 pass:1187 dwarn:4 dfail:0 fail:5 skip:932 time:5546s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8365/shards.html
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Rodrigo Vivi
maintainerQuoted 4 lines · David Weinehall
Since Coffee Lake uses the Kaby Lake DMC it's a safe bet that the debug registers are the same. I haven't double-checked that the GLK DMC uses the same registers as BXT, but it seems as good of a guess as any.
It would be good to check. Last time that I checked we were getting deep PC residencies but these registers were zeroed on CFL.
Also this bit confuses many people since it is not a proper residency counter :/
Quoted 34 lines
Signed-off-by David Weinehall <[email protected]>--- drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)drivers/gpu/drm/i915/i915_debugfs.c +3
-2@@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)seq_printf (m,"version: %d.%d\n" ,CSR_VERSION_MAJOR (csr->version),CSR_VERSION_MINOR (csr->version)); -if (IS_KABYLAKE (dev_priv) || +if (IS_KABYLAKE (dev_priv) ||IS_COFFEELAKE (dev_priv) || (IS_SKYLAKE (dev_priv) && csr->version >=CSR_VERSION (1 ,6 ))) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (SKL_CSR_DC3_DC5_COUNT ));seq_printf (m,"DC5 -> DC6 count: %d\n" ,I915_READ (SKL_CSR_DC5_DC6_COUNT )); - }else if (IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) { + }else if (IS_GEMINILAKE (dev_priv) || +IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (BXT_CSR_DC3_DC5_COUNT )); }Signature · 6 lines
2.16.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Quoted 11 lines · Rodrigo Vivi
Quoted 4 lines · David Weinehall
Since Coffee Lake uses the Kaby Lake DMC it's a safe bet that the debug registers are the same. I haven't double-checked that the GLK DMC uses the same registers as BXT, but it seems as good of a guess as any.
It would be good to check. Last time that I checked we were getting deep PC residencies but these registers were zeroed on CFL.
Also this bit confuses many people since it is not a proper residency counter :/
I'll run some tests on all platforms that are supposed to be supported by this, and compare the behaviour.
Quoted 31 lines
Quoted 31 lines
Signed-off-by David Weinehall <[email protected]>--- drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)drivers/gpu/drm/i915/i915_debugfs.c +3
-2@@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)seq_printf (m,"version: %d.%d\n" ,CSR_VERSION_MAJOR (csr->version),CSR_VERSION_MINOR (csr->version)); -if (IS_KABYLAKE (dev_priv) || +if (IS_KABYLAKE (dev_priv) ||IS_COFFEELAKE (dev_priv) || (IS_SKYLAKE (dev_priv) && csr->version >=CSR_VERSION (1 ,6 ))) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (SKL_CSR_DC3_DC5_COUNT ));seq_printf (m,"DC5 -> DC6 count: %d\n" ,I915_READ (SKL_CSR_DC5_DC6_COUNT )); - }else if (IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) { + }else if (IS_GEMINILAKE (dev_priv) || +IS_BROXTON (dev_priv) && csr->version >=CSR_VERSION (1 ,4 )) {seq_printf (m,"DC3 -> DC5 count: %d\n" ,I915_READ (BXT_CSR_DC3_DC5_COUNT )); }Signature · 1 line
2.16.2
Quoted 4 lines
Quoted 4 lines
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kbuild test robot
build botThank you for the patch! Perhaps something to improve:
Hi David,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on v4.16-rc4]
[also build test WARNING on next-20180316]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/David-Weinehall/drm-i915-Show-dmc-debug-registers-on-CFL-and-GLK/20180318-082134
config: x86_64-randconfig-x002-201811 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_dmc_info':
>> drivers/gpu/drm/i915/i915_debugfs.c:2785:34: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {vim +2785 drivers/gpu/drm/i915/i915_debugfs.c
2756
2757 static int i915_dmc_info(struct seq_file *m, void *unused)
2758 {
2759 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2760 struct intel_csr *csr;
2761
2762 if (!HAS_CSR(dev_priv))
2763 return -ENODEV;
2764
2765 csr = &dev_priv->csr;
2766
2767 intel_runtime_pm_get(dev_priv);
2768
2769 seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL));
2770 seq_printf(m, "path: %s\n", csr->fw_path);
2771
2772 if (!csr->dmc_payload)
2773 goto out;
2774
2775 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
2776 CSR_VERSION_MINOR(csr->version));
2777
2778 if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
2779 (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
2780 seq_printf(m, "DC3 -> DC5 count: %d\n",
2781 I915_READ(SKL_CSR_DC3_DC5_COUNT));
2782 seq_printf(m, "DC5 -> DC6 count: %d\n",
2783 I915_READ(SKL_CSR_DC5_DC6_COUNT));
2784 } else if (IS_GEMINILAKE(dev_priv) ||
> 2785 IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { 2786 seq_printf(m, "DC3 -> DC5 count: %d\n",
2787 I915_READ(BXT_CSR_DC3_DC5_COUNT));
2788 }
2789
2790 out:
2791 seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0)));
2792 seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE));
2793 seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL));
2794
2795 intel_runtime_pm_put(dev_priv);
2796
2797 return 0;
2798 }
2799
---
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kbuild test robot
build botThank you for the patch! Yet something to improve:
Hi David,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on v4.16-rc4]
[also build test ERROR on next-20180316]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/David-Weinehall/drm-i915-Show-dmc-debug-registers-on-CFL-and-GLK/20180318-082134
config: i386-randconfig-x075-201811 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce:
# save the attached .config to linux build tree
make ARCH=i386 All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_dmc_info':
>> drivers/gpu/drm/i915/i915_debugfs.c:2785:34: error: suggest parentheses around '&&' within '||' [-Werror=parentheses]
IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {cc1: all warnings being treated as errors
vim +2785 drivers/gpu/drm/i915/i915_debugfs.c
2756
2757 static int i915_dmc_info(struct seq_file *m, void *unused)
2758 {
2759 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2760 struct intel_csr *csr;
2761
2762 if (!HAS_CSR(dev_priv))
2763 return -ENODEV;
2764
2765 csr = &dev_priv->csr;
2766
2767 intel_runtime_pm_get(dev_priv);
2768
2769 seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL));
2770 seq_printf(m, "path: %s\n", csr->fw_path);
2771
2772 if (!csr->dmc_payload)
2773 goto out;
2774
2775 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
2776 CSR_VERSION_MINOR(csr->version));
2777
2778 if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
2779 (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
2780 seq_printf(m, "DC3 -> DC5 count: %d\n",
2781 I915_READ(SKL_CSR_DC3_DC5_COUNT));
2782 seq_printf(m, "DC5 -> DC6 count: %d\n",
2783 I915_READ(SKL_CSR_DC5_DC6_COUNT));
2784 } else if (IS_GEMINILAKE(dev_priv) ||
> 2785 IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { 2786 seq_printf(m, "DC3 -> DC5 count: %d\n",
2787 I915_READ(BXT_CSR_DC3_DC5_COUNT));
2788 }
2789
2790 out:
2791 seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0)));
2792 seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE));
2793 seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL));
2794
2795 intel_runtime_pm_put(dev_priv);
2796
2797 return 0;
2798 }
2799
---
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