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target/xtensa: fix timers test

PATCH Superseded Max Filippov 2 participants 2 messages Mar 23, 2018

v1 of 2 Superseded Latest is v2 →

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Max Filippov

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#0 lore raw

PATCH 1/1 target/xtensa: fix timers test

Change frequency of the core used in tests so that clock cycle takes exactly 64ns. Change icount power used in tests to 6, so that each instruction takes exactly 1 clock cycle. With these changes the assumptions of the xtensa timers test are correct and the test must always pass.

Longer story:
http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg04326.html

Cc Pavel Dovgaluk <[email protected]>
Signed-off-by Max Filippov <[email protected]>
---
 target/xtensa/core-dc232b.c | 2 +-
 tests/tcg/xtensa/Makefile   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
target/xtensa/core-dc232b.c +1 -1
index aa07018af4e7..8846336f5cfa 100644
@@ -47,7 +47,7 @@ static XtensaConfig dc232b __attribute__((unused)) = {
         }
     },
     .isa_internal = &xtensa_modules,
-    .clock_freq_khz = 10000,
+    .clock_freq_khz = 15625,
     DEFAULT_SECTIONS
 };
tests/tcg/xtensa/Makefile +1 -1
index 2882c431e4a9..091518c05583 100644
@@ -5,7 +5,7 @@ CROSS=xtensa-$(CORE)-elf-
 
 ifndef XT
 SIM = ../../../xtensa-softmmu/qemu-system-xtensa
-SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 7 $(EXTFLAGS) -kernel
+SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel
 SIMDEBUG = -s -S
 else
 SIM = xt-run
Signature · 1 line
2.11.0
#1 lore raw

Hi Max,

Quoted 8 lines · Max Filippov

Change frequency of the core used in tests so that clock cycle takes exactly 64ns. Change icount power used in tests to 6, so that each instruction takes exactly 1 clock cycle. With these changes the assumptions of the xtensa timers test are correct and the test must always pass.

Longer story:
http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg04326.html

Would be great to have it in this commit message.

Quoted 13 lines
Cc Pavel Dovgaluk <[email protected]>
Signed-off-by Max Filippov <[email protected]>
---
 target/xtensa/core-dc232b.c | 2 +-
 tests/tcg/xtensa/Makefile   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
target/xtensa/core-dc232b.c +0 -0
index aa07018af4e7..8846336f5cfa 100644

target/xtensa/core-dc232b.c static XtensaConfig dc232b __attribute__((unused)) = { · line 50

Quoted 5 lines
target/xtensa/core-dc232b.c +1 -1
@@ -47,7 +47,7 @@ static XtensaConfig dc232b __attribute__((unused)) = {
         }
     },
     .isa_internal = &xtensa_modules,
-    .clock_freq_khz = 10000,
+    .clock_freq_khz = 15625,

What about using self-explicit:

       .clock_freq_khz = (NANOSECONDS_PER_SECOND / 64) / 1000;
Quoted 9 lines
target/xtensa/core-dc232b.c +0 -0
     DEFAULT_SECTIONS
 };
tests/tcg/xtensa/Makefile +0 -0
index 2882c431e4a9..091518c05583 100644

tests/tcg/xtensa/Makefile CROSS=xtensa-$(CORE)-elf- · line 11

Quoted 8 lines
tests/tcg/xtensa/Makefile +1 -1
@@ -5,7 +5,7 @@ CROSS=xtensa-$(CORE)-elf-
 
 ifndef XT
 SIM = ../../../xtensa-softmmu/qemu-system-xtensa
-SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 7 $(EXTFLAGS) -kernel
+SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel
 SIMDEBUG = -s -S
 else
 SIM = xt-run

Regards,

Phil.