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PCI: qcom: fix a bitwise vs logical NOT typo

PATCH Applied Dan Carpenter 4 participants 4 messages May 1, 2018 – May 16, 2018

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#0 lore raw

PATCH 1/1 PCI: qcom: fix a bitwise vs logical NOT typo

There is a typo here so we accidentally set "val" to zero when we intended just to clear BIT(0).

Fixes 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe controller")

---
Not tested.

drivers/pci/dwc/pcie-qcom.c +1 -1
index 5897af7d3355..b65bbf7c284e 100644
@@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
 
 	/* enable PCIe clocks and resets */
 	val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-	val &= !BIT(0);
+	val &= ~BIT(0);
 	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
 
 	/* change DBI base address */
Acked-by on v1 1/1
#1 lore raw

Hi Dan,

Thanks for the patch!

Quoted 14 lines · Dan Carpenter

There is a typo here so we accidentally set "val" to zero when we intended just to clear BIT(0).

Fixes 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe controller")

---
Not tested.

drivers/pci/dwc/pcie-qcom.c +0 -0
index 5897af7d3355..b65bbf7c284e 100644

drivers/pci/dwc/pcie-qcom.c static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie) · line 875

Quoted 8 lines
drivers/pci/dwc/pcie-qcom.c +1 -1
@@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
 
  	/* enable PCIe clocks and resets */
  	val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-	val &= !BIT(0);
+	val &= ~BIT(0);
  	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
 
  	/* change DBI base address */

John, can you test that fix?

Otherwise the fix looks correct:

regards,
Stan

Acked-by
#2 lore raw
Quoted 30 lines · Stanimir Varbanov

Hi Dan,

Thanks for the patch!

Quoted 14 lines · Dan Carpenter

There is a typo here so we accidentally set "val" to zero when we intended just to clear BIT(0).

Fixes 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe

controller")

---
Not tested.

drivers/pci/dwc/pcie-qcom.c +0 -0
index 5897af7d3355..b65bbf7c284e 100644

drivers/pci/dwc/pcie-qcom.c static int qcom_pcie_init_2_4_0(struct qcom_pcie · line 875

Quoted 8 lines
drivers/pci/dwc/pcie-qcom.c +1 -1
@@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie 
 *pcie)
         /* enable PCIe clocks and resets */
       val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-    val &= !BIT(0);
+    val &= ~BIT(0);
       writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
         /* change DBI base address */
 

John, can you test that fix?

Quoted 6 lines

Otherwise the fix looks correct:

regards,
Stan

#3 lore raw
In reply to Dan Carpenter
Quoted 13 lines · Dan Carpenter

There is a typo here so we accidentally set "val" to zero when we intended just to clear BIT(0).

Fixes 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe controller")

---
Not tested.

drivers/pci/dwc/pcie-qcom.c +0 -0
index 5897af7d3355..b65bbf7c284e 100644

drivers/pci/dwc/pcie-qcom.c static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie) · line 875

Quoted 8 lines
drivers/pci/dwc/pcie-qcom.c +1 -1
@@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
 
 	/* enable PCIe clocks and resets */
 	val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-	val &= !BIT(0);
+	val &= ~BIT(0);
 	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
 
 	/* change DBI base address */

Applied to pci/dwc for v4.18, thanks.

Lorenzo