drm/amd/display/dc/dce: Fix multiple potential integer overflows
Subsystems (3)
PATCH 1/1 drm/amd/display/dc/dce: Fix multiple potential integer overflows
Add suffix ULL to constant 5 and cast variables target_pix_clk_khz and feedback_divider to uint64_t in order to avoid multiple potential integer overflows and give the compiler complete information about the proper arithmetic to use.
Notice that such constant and variables are used in contexts that expect expressions of type uint64_t (64 bits, unsigned). The current casts to uint64_t effectively apply to each expression as a whole, but they do not prevent them from being evaluated using 32-bit arithmetic instead of 64-bit arithmetic.
Also, once the expressions are properly evaluated using 64-bit arithmentic, there is no need for the parentheses that enclose them.
Addresses-Coverity-ID: 1460245 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460286 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460401 ("Unintentional integer overflow")
--- drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +5 -5
@@ -133,7 +133,7 @@ static bool calculate_fb_and_fractional_fb_divider(uint64_t feedback_divider; feedback_divider = - (uint64_t )(target_pix_clk_khz * ref_divider * post_divider); + (uint64_t )target_pix_clk_khz * ref_divider * post_divider; feedback_divider *=10 ;/* additional factor, since we divide by 10 afterwards */ feedback_divider *= (uint64_t )(calc_pll_cs->fract_fb_divider_factor);
@@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(* of fractional feedback decimal point and the fractional FB Divider precision * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/ - feedback_divider += (uint64_t ) - (5 * calc_pll_cs->fract_fb_divider_precision_factor); + feedback_divider +=5UL * + calc_pll_cs->fract_fb_divider_precision_factor; feedback_divider =div_u64 (feedback_divider, calc_pll_cs->fract_fb_divider_precision_factor *10 );
@@ -203,8 +203,8 @@ static bool calc_fb_divider_checking_tolerance( &fract_feedback_divider);/*Actual calculated value*/ - actual_calc_clk_khz = (uint64_t )(feedback_divider * - calc_pll_cs->fract_fb_divider_factor) + + actual_calc_clk_khz = (uint64_t )feedback_divider * + calc_pll_cs->fract_fb_divider_factor + fract_feedback_divider; actual_calc_clk_khz *= calc_pll_cs->ref_freq_khz; actual_calc_clk_khz =
Signature · 1 line
2.7.4
Quoted 24 lines · Gustavo A. R. Silva
Add suffix ULL to constant 5 and cast variables
target_pix_clk_khzandfeedback_dividertouint64_tin order to avoid multiple potential integer overflows and give the compiler complete information about the proper arithmetic to use.Notice that such constant and variables are used in contexts that expect expressions of type
uint64_t(64 bits, unsigned). The current casts touint64_teffectively apply to each expression as a whole, but they do not prevent them from being evaluated using 32-bit arithmetic instead of 64-bit arithmetic.Also, once the expressions are properly evaluated using 64-bit arithmentic, there is no need for the parentheses that enclose them.
Addresses-Coverity-ID: 1460245 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460286 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460401 ("Unintentional integer overflow")Fixes 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")Signed-off-by Gustavo A. R. Silva <[email protected]>[...]
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c static bool calculate_fb_and_fractional_fb_divider( · line 149
Quoted 7 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +2
-2@@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(* of fractional feedback decimal point and the fractional FB Divider precision * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/ - feedback_divider += (uint64_t ) - (5 * calc_pll_cs->fract_fb_divider_precision_factor); + feedback_divider +=5UL * + calc_pll_cs->fract_fb_divider_precision_factor;
This should be 5ULL, as the commit log says, otherwise it's still only 32 bits on 32-bit platforms.
Signature · 6 lines
Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Hi Michel,
Quoted 28 lines · Michel Dänzer
Quoted 27 lines · Gustavo A. R. Silva
Add suffix ULL to constant 5 and cast variables
target_pix_clk_khzandfeedback_dividertouint64_tin order to avoid multiple potential integer overflows and give the compiler complete information about the proper arithmetic to use.Notice that such constant and variables are used in contexts that expect expressions of type
uint64_t(64 bits, unsigned). The current casts touint64_teffectively apply to each expression as a whole, but they do not prevent them from being evaluated using 32-bit arithmetic instead of 64-bit arithmetic.Also, once the expressions are properly evaluated using 64-bit arithmentic, there is no need for the parentheses that enclose them.
Addresses-Coverity-ID: 1460245 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460286 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460401 ("Unintentional integer overflow")Fixes 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")Signed-off-by Gustavo A. R. Silva <[email protected]>[...]
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +0
-0@@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(* of fractional feedback decimal point and the fractional FB Divider precision * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/
Quoted 8 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c static bool calculate_fb_and_fractional_fb_divider( · line 149
Quoted 4 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +2
-2- feedback_divider += (uint64_t ) - (5 * calc_pll_cs->fract_fb_divider_precision_factor); + feedback_divider +=5UL * + calc_pll_cs->fract_fb_divider_precision_factor;This should be 5ULL, as the commit log says, otherwise it's still only 32 bits on 32-bit platforms.
That's correct. Thanks for the report.
I'll send v2 shortly.
Thanks
--
Gustavo
Quoted 28 lines · Michel Dänzer
Quoted 27 lines · Gustavo A. R. Silva
Add suffix ULL to constant 5 and cast variables
target_pix_clk_khzandfeedback_dividertouint64_tin order to avoid multiple potential integer overflows and give the compiler complete information about the proper arithmetic to use.Notice that such constant and variables are used in contexts that expect expressions of type
uint64_t(64 bits, unsigned). The current casts touint64_teffectively apply to each expression as a whole, but they do not prevent them from being evaluated using 32-bit arithmetic instead of 64-bit arithmetic.Also, once the expressions are properly evaluated using 64-bit arithmentic, there is no need for the parentheses that enclose them.
Addresses-Coverity-ID: 1460245 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460286 ("Unintentional integer overflow")
Addresses-Coverity-ID: 1460401 ("Unintentional integer overflow")Fixes 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")Signed-off-by Gustavo A. R. Silva <[email protected]>[...]
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +0
-0@@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(* of fractional feedback decimal point and the fractional FB Divider precision * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/
Quoted 8 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c static bool calculate_fb_and_fractional_fb_divider( · line 149
Quoted 4 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +2
-2- feedback_divider += (uint64_t ) - (5 * calc_pll_cs->fract_fb_divider_precision_factor); + feedback_divider +=5UL * + calc_pll_cs->fract_fb_divider_precision_factor;This should be 5ULL, as the commit log says, otherwise it's still only 32 bits on 32-bit platforms.
Agreed.
Otherwise this looks good.
With that fixed this patch is
Harry
Quoted 1 line
_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On 07/04/2018 12:51 PM, Harry Wentland wrote:
[..]
Quoted 14 lines
Quoted 5 lines
Quoted 5 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +0
-0@@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(* of fractional feedback decimal point and the fractional FB Divider precision * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/ Quoted 8 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c static bool calculate_fb_and_fractional_fb_divider( · line 149
Quoted 4 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +2
-2- feedback_divider += (uint64_t ) - (5 * calc_pll_cs->fract_fb_divider_precision_factor); + feedback_divider +=5UL * + calc_pll_cs->fract_fb_divider_precision_factor;This should be 5ULL, as the commit log says, otherwise it's still only 32 bits on 32-bit platforms.
Quoted 7 lines
Agreed.
Otherwise this looks good.
With that fixed this patch is
Reviewed-by Harry Wentland <[email protected]>
Hi Harry,
I already sent v2: https://patchwork.kernel.org/patch/10506897/
Thanks
--
Gustavo
Harry Wentland
maintainerQuoted 22 lines · Gustavo A. R. Silva
On 07/04/2018 12:51 PM, Harry Wentland wrote:
[..]Quoted 18 lines
Quoted 5 lines
Quoted 5 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +0
-0@@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(* of fractional feedback decimal point and the fractional FB Divider precision * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/ Quoted 8 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c static bool calculate_fb_and_fractional_fb_divider( · line 149
Quoted 4 lines
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +2
-2- feedback_divider += (uint64_t ) - (5 * calc_pll_cs->fract_fb_divider_precision_factor); + feedback_divider +=5UL * + calc_pll_cs->fract_fb_divider_precision_factor;This should be 5ULL, as the commit log says, otherwise it's still only 32 bits on 32-bit platforms.
Agreed.
Otherwise this looks good.
Quoted 8 lines
Quoted 3 lines
With that fixed this patch is
Reviewed-by Harry Wentland <[email protected]>Hi Harry,
I already sent v2: https://patchwork.kernel.org/patch/10506897/
Thanks. Merged.
Harry
Quoted 4 lines
Thanks
--
Gustavo
_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx