clk: Add Allwinner CLK, RESET support

PATCH Superseded Jagan Teki 3 participants 33 messages Aug 26, 2018 – Aug 30, 2018

Subsystems (10)

Arm (32-bit) USB Arm sub-architectures Common clk +6 more subsystems

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Jagan Teki

author

2018-08-26 12:38 UTC #0 lore raw

v4 cover clk: Add Allwinner CLK, RESET support

This series is refined version of Allwinner CLK, RESET support for previous version[1] which implements CLK and RESET for USB.

Tested on A64, H3, H5, R40, A83T, A20.

Changes for v4:
- Collect Acked-by and Tested-by
- Rebase on master
- Fixed checkpatch warnings
- Fixed SPDX licence
- return 0 if reset request ops not used
Changes for v3:
- Added H6 CLK, RESET changes
- Added fastboot mmc device patch
- Added fat env mmc device patch
- Update bootorder to check eMMC as per DT
- Collect Tested-by
Changes for v2:
- Fixed few warnings and spaces in reset descriptor table
- Add Ethernet CLK and RESET changes

All these changes available at u-boot-sunxi/next

Note:
- V3S, A23, A33 still need to test

[1] https://patchwork.ozlabs.org/cover/959324/

Any inputs,
Jagan.

Jagan Teki (17):
clk: Add Allwinner A64 CLK driver
reset: Return 0 if no request ops
reset: Add Allwinner RESET driver
clk: sunxi: Add Allwinner H3/H5 CLK driver
clk: sunxi: Add Allwinner A10/A20 CLK driver
clk: sunxi: Add Allwinner A10s/A13 CLK driver
clk: sunxi: Add Allwinner A31 CLK driver
clk: sunxi: Add Allwinner A23 CLK driver
clk: sunxi: a23: Add CLK support for A33
clk: sunxi: Add Allwinner A83T CLK driver
clk: sunxi: Add Allwinner R40 CLK driver
clk: sunxi: Add Allwinner V3S CLK driver
sunxi: Enable CLK
phy: sun4i-usb: Use CLK and RESET support
musb-new: sunxi: Use CLK and RESET support
sunxi: usb: Switch to Generic host controllers
usb: host: Drop [e-o]hci-sunxi drivers

 arch/arm/include/asm/arch-sunxi/ccu.h         |  72 ++++++
 arch/arm/mach-sunxi/Kconfig                   |  12 +
 configs/A10-OLinuXino-Lime_defconfig          |   1 +
 configs/A10s-OLinuXino-M_defconfig            |   1 +
 configs/A13-OLinuXinoM_defconfig              |   1 +
 configs/A13-OLinuXino_defconfig               |   1 +
 configs/A20-OLinuXino-Lime2-eMMC_defconfig    |   1 +
 configs/A20-OLinuXino-Lime2_defconfig         |   1 +
 configs/A20-OLinuXino-Lime_defconfig          |   1 +
 configs/A20-Olimex-SOM204-EVB_defconfig       |   2 +
 configs/Auxtek-T003_defconfig                 |   1 +
 configs/Auxtek-T004_defconfig                 |   1 +
 configs/Bananapi_defconfig                    |   1 +
 configs/Bananapi_m2m_defconfig                |   1 +
 configs/Bananapro_defconfig                   |   1 +
 configs/CHIP_defconfig                        |   1 +
 configs/CHIP_pro_defconfig                    |   1 +
 configs/CSQ_CS908_defconfig                   |   1 +
 configs/Colombus_defconfig                    |   1 +
 configs/Cubieboard2_defconfig                 |   1 +
 configs/Cubieboard_defconfig                  |   1 +
 configs/Cubietruck_plus_defconfig             |   1 +
 configs/Hummingbird_A31_defconfig             |   1 +
 configs/Itead_Ibox_A20_defconfig              |   1 +
 configs/Linksprite_pcDuino3_Nano_defconfig    |   1 +
 configs/Linksprite_pcDuino3_defconfig         |   1 +
 configs/Linksprite_pcDuino_defconfig          |   1 +
 configs/MK808C_defconfig                      |   1 +
 configs/Marsboard_A10_defconfig               |   1 +
 configs/Mele_A1000G_quad_defconfig            |   1 +
 configs/Mele_A1000_defconfig                  |   1 +
 configs/Mele_I7_defconfig                     |   1 +
 configs/Mele_M3_defconfig                     |   1 +
 configs/Mele_M5_defconfig                     |   1 +
 configs/Mele_M9_defconfig                     |   1 +
 configs/Mini-X_defconfig                      |   1 +
 configs/Orangepi_defconfig                    |   1 +
 configs/Orangepi_mini_defconfig               |   1 +
 configs/Sinlinx_SinA31s_defconfig             |   1 +
 configs/Sinlinx_SinA33_defconfig              |   1 +
 configs/Sinovoip_BPI_M2_Plus_defconfig        |   1 +
 configs/Sinovoip_BPI_M2_defconfig             |   1 +
 configs/Sinovoip_BPI_M3_defconfig             |   1 +
 configs/Wexler_TAB7200_defconfig              |   1 +
 configs/Wobo_i5_defconfig                     |   1 +
 configs/a64-olinuxino_defconfig               |   1 +
 configs/ba10_tv_box_defconfig                 |   1 +
 configs/bananapi_m1_plus_defconfig            |   1 +
 configs/bananapi_m64_defconfig                |   1 +
 configs/ga10h_v1_1_defconfig                  |   1 +
 configs/h8_homlet_v2_defconfig                |   1 +
 configs/i12-tvbox_defconfig                   |   1 +
 configs/icnova-a20-swac_defconfig             |   1 +
 configs/inet1_defconfig                       |   1 +
 configs/inet_q972_defconfig                   |   1 +
 configs/jesurun_q5_defconfig                  |   1 +
 configs/libretech_all_h3_cc_h2_plus_defconfig |   1 +
 configs/libretech_all_h3_cc_h3_defconfig      |   1 +
 configs/libretech_all_h3_cc_h5_defconfig      |   1 +
 configs/mixtile_loftq_defconfig               |   1 +
 configs/mk802_a10s_defconfig                  |   1 +
 configs/mk802_defconfig                       |   1 +
 configs/mk802ii_defconfig                     |   1 +
 configs/nanopi_a64_defconfig                  |   1 +
 configs/nanopi_m1_defconfig                   |   1 +
 configs/nanopi_m1_plus_defconfig              |   1 +
 configs/nanopi_neo2_defconfig                 |   1 +
 configs/nanopi_neo_air_defconfig              |   1 +
 configs/nanopi_neo_defconfig                  |   1 +
 configs/nanopi_neo_plus2_defconfig            |   1 +
 configs/orangepi_2_defconfig                  |   1 +
 configs/orangepi_lite_defconfig               |   1 +
 configs/orangepi_one_defconfig                |   1 +
 configs/orangepi_pc2_defconfig                |   1 +
 configs/orangepi_pc_defconfig                 |   1 +
 configs/orangepi_pc_plus_defconfig            |   1 +
 configs/orangepi_plus2e_defconfig             |   1 +
 configs/orangepi_plus_defconfig               |   1 +
 configs/orangepi_prime_defconfig              |   1 +
 configs/orangepi_r1_defconfig                 |   1 +
 configs/orangepi_win_defconfig                |   1 +
 configs/orangepi_zero_defconfig               |   1 +
 configs/orangepi_zero_plus2_defconfig         |   1 +
 configs/orangepi_zero_plus_defconfig          |   1 +
 configs/parrot_r16_defconfig                  |   1 +
 configs/pine64_plus_defconfig                 |   1 +
 configs/r7-tv-dongle_defconfig                |   1 +
 configs/sopine_baseboard_defconfig            |   1 +
 configs/sun8i_a23_evb_defconfig               |   1 +
 configs/sunxi_Gemei_G9_defconfig              |   1 +
 configs/tbs_a711_defconfig                    |   1 +
 drivers/clk/Kconfig                           |   1 +
 drivers/clk/Makefile                          |   1 +
 drivers/clk/sunxi/Kconfig                     |  75 ++++++
 drivers/clk/sunxi/Makefile                    |  17 ++
 drivers/clk/sunxi/clk_a10.c                   |  77 ++++++
 drivers/clk/sunxi/clk_a10s.c                  |  74 ++++++
 drivers/clk/sunxi/clk_a23.c                   |  81 ++++++
 drivers/clk/sunxi/clk_a31.c                   |  86 +++++++
 drivers/clk/sunxi/clk_a64.c                   |  84 +++++++
 drivers/clk/sunxi/clk_a83t.c                  |  81 ++++++
 drivers/clk/sunxi/clk_h3.c                    |  97 ++++++++
 drivers/clk/sunxi/clk_r40.c                   |  88 +++++++
 drivers/clk/sunxi/clk_sunxi.c                 |  58 +++++
 drivers/clk/sunxi/clk_v3s.c                   |  69 ++++++
 drivers/phy/allwinner/phy-sun4i-usb.c         |  77 ++++--
 drivers/reset/Kconfig                         |   8 +
 drivers/reset/Makefile                        |   1 +
 drivers/reset/reset-sunxi.c                   | 125 ++++++++++
 drivers/reset/reset-uclass.c                  |   3 +
 drivers/usb/host/Kconfig                      |   2 +
 drivers/usb/host/Makefile                     |   2 -
 drivers/usb/host/ehci-sunxi.c                 | 204 ---------------
 drivers/usb/host/ohci-sunxi.c                 | 233 ------------------
 drivers/usb/musb-new/sunxi.c                  |  87 ++++---
 include/configs/sun4i.h                       |   4 -
 include/configs/sun50i.h                      |   5 -
 include/configs/sun5i.h                       |   4 -
 include/configs/sun6i.h                       |   4 -
 include/configs/sun7i.h                       |   4 -
 include/configs/sun8i.h                       |   4 -
 include/configs/sunxi-common.h                |   1 -
 scripts/config_whitelist.txt                  |   2 -
 123 files changed, 1310 insertions(+), 523 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-sunxi/ccu.h
 create mode 100644 drivers/clk/sunxi/Kconfig
 create mode 100644 drivers/clk/sunxi/Makefile
 create mode 100644 drivers/clk/sunxi/clk_a10.c
 create mode 100644 drivers/clk/sunxi/clk_a10s.c
 create mode 100644 drivers/clk/sunxi/clk_a23.c
 create mode 100644 drivers/clk/sunxi/clk_a31.c
 create mode 100644 drivers/clk/sunxi/clk_a64.c
 create mode 100644 drivers/clk/sunxi/clk_a83t.c
 create mode 100644 drivers/clk/sunxi/clk_h3.c
 create mode 100644 drivers/clk/sunxi/clk_r40.c
 create mode 100644 drivers/clk/sunxi/clk_sunxi.c
 create mode 100644 drivers/clk/sunxi/clk_v3s.c
 create mode 100644 drivers/reset/reset-sunxi.c
 delete mode 100644 drivers/usb/host/ehci-sunxi.c
 delete mode 100644 drivers/usb/host/ohci-sunxi.c

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

author

2018-08-26 12:38 UTC #1 lore raw

PATCH v4 1/17 clk: Add Allwinner A64 CLK driver

Add initial clock driver for Allwinner A64.

Implement USB clock enable and disable functions for OHCI, EHCI, OTG and USBPHY gate and clock registers.

Tested-by Jagan Teki <[email protected]> # BPI-M64

Signed-off-by Jagan Teki <[email protected]>

---
 arch/arm/include/asm/arch-sunxi/ccu.h | 47 ++++++++++++++++++++
 drivers/clk/Kconfig                   |  1 +
 drivers/clk/Makefile                  |  1 +
 drivers/clk/sunxi/Kconfig             | 18 ++++++++
 drivers/clk/sunxi/Makefile            |  9 ++++
 drivers/clk/sunxi/clk_a64.c           | 62 +++++++++++++++++++++++++++
 drivers/clk/sunxi/clk_sunxi.c         | 58 +++++++++++++++++++++++++
 7 files changed, 196 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-sunxi/ccu.h
 create mode 100644 drivers/clk/sunxi/Kconfig
 create mode 100644 drivers/clk/sunxi/Makefile
 create mode 100644 drivers/clk/sunxi/clk_a64.c
 create mode 100644 drivers/clk/sunxi/clk_sunxi.c

arch/arm/include/asm/arch-sunxi/ccu.h new file +47 -0

new file mode 100644
index 0000000000..998ab38bf2
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Amarula Solutions.
+ * Author: Jagan Teki <[email protected]>
+ */
+
+#ifndef _ASM_ARCH_CCU_H
+#define _ASM_ARCH_CCU_H
+
+/**
+ * ccu_clk_map - common clock unit clock map
+ *
+ * @off:		ccu clock offset
+ * @bit:		ccu clock bit value
+ * @ccu_clk_set_rate:	ccu clock set rate func
+ */
+struct ccu_clk_map {
+	u16 off;
+	u32 bit;
+	int (*ccu_clk_set_rate)(void *base, u32 bit, ulong rate);
+};
+
+/**
+ * struct ccu_desc - common clock unit descriptor
+ *
+ * @clks:		mapping clocks descriptor
+ * @num_clks:		number of mapped clocks
+ */
+struct ccu_desc {
+	struct ccu_clk_map *clks;
+	unsigned long num_clks;
+};
+
+/**
+ * struct sunxi_clk_priv - sunxi clock private structure
+ *
+ * @base:	base address
+ * @desc:	ccu descriptor
+ */
+struct sunxi_clk_priv {
+	void *base;
+	const struct ccu_desc *desc;
+};
+
+extern struct clk_ops sunxi_clk_ops;
+
+#endif /* _ASM_ARCH_CCU_H */

drivers/clk/Kconfig +1 -0

index a99abed9e9..b4992e9ff1 100644
@@ -88,6 +88,7 @@ source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/owl/Kconfig"
 source "drivers/clk/renesas/Kconfig"
+source "drivers/clk/sunxi/Kconfig"
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"

drivers/clk/Makefile +1 -0

index 034bf44078..f7dc6c6021 100644
@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_ARCH_MESON) += clk_meson.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_ARCH_SOCFPGA) += altera/
+obj-$(CONFIG_ARCH_SUNXI) += sunxi/
 obj-$(CONFIG_CLK_AT91) += at91/
 obj-$(CONFIG_CLK_MVEBU) += mvebu/
 obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o

drivers/clk/sunxi/Kconfig new file +18 -0

new file mode 100644
index 0000000000..bf5ecb3801
@@ -0,0 +1,18 @@
+config CLK_SUNXI
+	bool "Clock support for Allwinner SoCs"
+	depends on CLK && ARCH_SUNXI
+	default y
+	help
+	  This enables support for common clock driver API on Allwinner
+	  SoCs.
+
+if CLK_SUNXI
+
+config CLK_SUN50I_A64
+	bool "Clock driver for Allwinner A64"
+	default MACH_SUN50I
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner A64 SoC.
+
+endif # CLK_SUNXI

drivers/clk/sunxi/Makefile new file +9 -0

new file mode 100644
index 0000000000..fb20d28333
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2018 Amarula Solutions.
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
+
+obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_a64.c new file +62 -0

62 lines not on this page · raw message

drivers/clk/sunxi/clk_sunxi.c new file +58 -0

58 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:27 UTC #2 lore raw

PATCH v4 1/17 clk: Add Allwinner A64 CLK driver

Quoted 7 lines · Jagan Teki

Add initial clock driver for Allwinner A64.
Implement USB clock enable and disable functions for OHCI, EHCI, OTG and USBPHY gate and clock registers.
Tested-by Jagan Teki <[email protected]> # BPI-M64
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #3 lore raw

PATCH v4 2/17 reset: Return 0 if no request ops

In reply to Jagan Teki

Missing request ops from respective uclass driver generating "synchronous abort" in Allwinner platform, may be in arm. So return 0 if request ops is not used for those uclass drivers.

Cc Simon Glass <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/reset/reset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)

drivers/reset/reset-uclass.c +3 -0

index 3899537635..867dc8d596 100644
@@ -69,6 +69,9 @@ int reset_get_by_index(struct udevice *dev, int index,
 		return ret;
 	}
 
+	if (!ops->request)
+		return 0;
+
 	ret = ops->request(reset_ctl);
 	if (ret) {
 		debug("ops->request() failed: %d\n", ret);

Signature · 1 line

2.18.0.321.gffc6fa0e3

Simon Glass

2018-08-30 00:28 UTC #4 lore raw

PATCH v4 2/17 reset: Return 0 if no request ops

Hi Jagan,

Quoted 16 lines · Jagan Teki

Missing request ops from respective uclass driver generating "synchronous abort" in Allwinner platform, may be in arm. So return 0 if request ops is not used for those uclass drivers.
Cc Simon Glass <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 drivers/reset/reset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)
drivers/reset/reset-uclass.c +0 -0
index 3899537635..867dc8d596 100644

drivers/reset/reset-uclass.c int reset_get_by_index(struct udevice *dev, int index, · line 74

Quoted 6 lines

drivers/reset/reset-uclass.c +3 -0

@@ -69,6 +69,9 @@ int reset_get_by_index(struct udevice *dev, int index,
                return ret;
        }
 
+       if (!ops->request)
+               return 0;
+

Shouldn't this return -ENOSYS? The system call is missing.

Quoted 6 lines

drivers/reset/reset-uclass.c +0 -1

        ret = ops->request(reset_ctl);
        if (ret) {
                debug("ops->request() failed: %d\n", ret);
--

2.18.0.321.gffc6fa0e3

Regards,
Simon

Jagan Teki

author

2018-08-26 12:38 UTC #5 lore raw

PATCH v4 3/17 reset: Add Allwinner RESET driver

In reply to Jagan Teki

Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver job is to bind the reset driver. So add CLK bind call on respective SoC driver by passing ccu map descriptor so-that reset deassert, deassert operations held based on reset register map defined by CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET since CLK and RESET share common DT compatible and code.

Tested-by Jagan Teki <[email protected]> # BPI-M64

Signed-off-by Jagan Teki <[email protected]>

---
 arch/arm/include/asm/arch-sunxi/ccu.h |  25 ++++++
 drivers/clk/sunxi/Kconfig             |   1 +
 drivers/clk/sunxi/clk_a64.c           |  22 +++++
 drivers/reset/Kconfig                 |   8 ++
 drivers/reset/Makefile                |   1 +
 drivers/reset/reset-sunxi.c           | 125 ++++++++++++++++++++++++++
 6 files changed, 182 insertions(+)
 create mode 100644 drivers/reset/reset-sunxi.c

arch/arm/include/asm/arch-sunxi/ccu.h +25 -0

index 998ab38bf2..3e322a7655 100644
@@ -20,15 +20,31 @@ struct ccu_clk_map {
 	int (*ccu_clk_set_rate)(void *base, u32 bit, ulong rate);
 };
 
+/**
+ * ccu_reset_map - common clock unit reset map
+ *
+ * @off:	ccu reset offset
+ * @bit:	ccu reset bit value
+ */
+struct ccu_reset_map {
+	u16 off;
+	u32 bit;
+};
+
 /**
  * struct ccu_desc - common clock unit descriptor
  *
  * @clks:		mapping clocks descriptor
  * @num_clks:		number of mapped clocks
+ * @resets:		mapping resets descriptor
+ * @num_resets:		number of mapped resets
  */
 struct ccu_desc {
 	struct ccu_clk_map *clks;
 	unsigned long num_clks;
+
+	struct ccu_reset_map *resets;
+	unsigned long num_resets;
 };
 
 /**

@@ -44,4 +60,13 @@ struct sunxi_clk_priv {
 
 extern struct clk_ops sunxi_clk_ops;
 
+/**
+ * sunxi_reset_bind() - reset binding
+ *
+ * @dev:	reset device
+ * @count:	reset count
+ * @return 0 success, or error value
+ */
+int sunxi_reset_bind(struct udevice *dev, ulong count);
+
 #endif /* _ASM_ARCH_CCU_H */

drivers/clk/sunxi/Kconfig +1 -0

index bf5ecb3801..041d711e58 100644
@@ -1,6 +1,7 @@
 config CLK_SUNXI
 	bool "Clock support for Allwinner SoCs"
 	depends on CLK && ARCH_SUNXI
+	select DM_RESET
 	default y
 	help
 	  This enables support for common clock driver API on Allwinner

drivers/clk/sunxi/clk_a64.c +22 -0

index 8966472c2d..13b58aa57f 100644
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun50i-a64-ccu.h>
 
 static struct ccu_clk_map a64_clks[] = {
 	[CLK_BUS_OTG]		= { 0x060, BIT(23), NULL },

@@ -26,9 +27,24 @@ static struct ccu_clk_map a64_clks[] = {
 	[CLK_USB_OHCI1]		= { 0x0cc, BIT(17), NULL },
 };
 
+static struct ccu_reset_map a64_resets[] = {
+	[RST_USB_PHY0]		= { 0x0cc, BIT(0) },
+	[RST_USB_PHY1]		= { 0x0cc, BIT(1) },
+	[RST_USB_HSIC]		= { 0x0cc, BIT(2) },
+
+	[RST_BUS_OTG]		= { 0x2c0, BIT(23) },
+	[RST_BUS_EHCI0]		= { 0x2c0, BIT(24) },
+	[RST_BUS_EHCI1]		= { 0x2c0, BIT(25) },
+	[RST_BUS_OHCI0]		= { 0x2c0, BIT(28) },
+	[RST_BUS_OHCI1]		= { 0x2c0, BIT(29) },
+};
+
 static const struct ccu_desc sun50i_a64_ccu_desc = {
 	.clks = a64_clks,
 	.num_clks = ARRAY_SIZE(a64_clks),
+
+	.resets = a64_resets,
+	.num_resets =  ARRAY_SIZE(a64_resets),
 };
 
 static int a64_clk_probe(struct udevice *dev)

@@ -46,6 +62,11 @@ static int a64_clk_probe(struct udevice *dev)
 	return 0;
 }
 
+static int a64_clk_bind(struct udevice *dev)
+{
+	return sunxi_reset_bind(dev, 50);
+}
+
 static const struct udevice_id a64_clk_ids[] = {
 	{ .compatible = "allwinner,sun50i-a64-ccu",
 	  .data = (ulong)&sun50i_a64_ccu_desc },

@@ -59,4 +80,5 @@ U_BOOT_DRIVER(clk_sun50i_a64) = {
 	.priv_auto_alloc_size	= sizeof(struct sunxi_clk_priv),
 	.ops		= &sunxi_clk_ops,
 	.probe		= a64_clk_probe,
+	.bind		= a64_clk_bind,
 };

drivers/reset/Kconfig +8 -0

index 33c39b7fb6..bdc06564a0 100644
@@ -98,4 +98,12 @@ config RESET_SOCFPGA
 	help
 	  Support for reset controller on SoCFPGA platform.
 
+config RESET_SUNXI
+	bool "RESET support for Allwinner SoCs"
+	depends on DM_RESET && ARCH_SUNXI
+	default y
+	help
+	  This enables support for common reset driver for
+	  Allwinner SoCs.
+
 endmenu

drivers/reset/Makefile +1 -0

index ad08be4c8c..698d15a0e0 100644
@@ -15,3 +15,4 @@ obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
 obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
 obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
+obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o

drivers/reset/reset-sunxi.c new file +125 -0

125 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:33 UTC #6 lore raw

PATCH v4 3/17 reset: Add Allwinner RESET driver

Quoted 8 lines · Jagan Teki

Add common reset driver for all Allwinner SoC's.
Since CLK and RESET share common DT compatible, it is CLK driver job is to bind the reset driver. So add CLK bind call on respective SoC driver by passing ccu map descriptor so-that reset deassert, deassert operations held based on reset register map defined by CLK driver.

Quoted 5 lines

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET since CLK and RESET share common DT compatible and code.
Tested-by Jagan Teki <[email protected]> # BPI-M64
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #7 lore raw

PATCH v4 4/17 clk: sunxi: Add Allwinner H3/H5 CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner H3/H5.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for H3/H5, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for H3/H5, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by Jagan Teki <[email protected]> #BPI-M2+, OPI-PC2

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig  |  7 +++
 drivers/clk/sunxi/Makefile |  1 +
 drivers/clk/sunxi/clk_h3.c | 97 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 105 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_h3.c

drivers/clk/sunxi/Kconfig +7 -0

index 041d711e58..c3713bbac2 100644
@@ -9,6 +9,13 @@ config CLK_SUNXI
 
 if CLK_SUNXI
 
+config CLK_SUN8I_H3
+	bool "Clock driver for Allwinner H3/H5"
+	default MACH_SUNXI_H3_H5
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner H3/H5 SoC.
+
 config CLK_SUN50I_A64
 	bool "Clock driver for Allwinner A64"
 	default MACH_SUN50I

drivers/clk/sunxi/Makefile +1 -0

index fb20d28333..dec49f27a1 100644
@@ -6,4 +6,5 @@
 
 obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
 
+obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_h3.c new file +97 -0

97 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:36 UTC #8 lore raw

PATCH v4 4/17 clk: sunxi: Add Allwinner H3/H5 CLK driver

Quoted 11 lines · Jagan Teki

Add initial clock driver for Allwinner H3/H5.
- Implement USB bus and USB clocks via ccu_clk_map descriptor for H3/H5, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for H3/H5, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Tested-by Jagan Teki <[email protected]> #BPI-M2+, OPI-PC2
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #9 lore raw

PATCH v4 5/17 clk: sunxi: Add Allwinner A10/A20 CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner A10/A20.

- Implement USB ahb and USB clocks via ccu_clk_map descriptor for A10/A20, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset_map descriptor for A10/A20, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by Jagan Teki <[email protected]> # A20-OLinuXino-Lime2

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig   |  7 ++++
 drivers/clk/sunxi/Makefile  |  1 +
 drivers/clk/sunxi/clk_a10.c | 77 +++++++++++++++++++++++++++++++++++++
 3 files changed, 85 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_a10.c

drivers/clk/sunxi/Kconfig +7 -0

index c3713bbac2..fbbf94ef55 100644
@@ -9,6 +9,13 @@ config CLK_SUNXI
 
 if CLK_SUNXI
 
+config CLK_SUN4I_A10
+	bool "Clock driver for Allwinner A10/A20"
+	default MACH_SUN4I || MACH_SUN7I
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner A10/A20 SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index dec49f27a1..bba830922f 100644
@@ -6,5 +6,6 @@
 
 obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
 
+obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_a10.c new file +77 -0

77 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:37 UTC #10 lore raw

PATCH v4 5/17 clk: sunxi: Add Allwinner A10/A20 CLK driver

Quoted 11 lines · Jagan Teki

Add initial clock driver for Allwinner A10/A20.
- Implement USB ahb and USB clocks via ccu_clk_map descriptor for A10/A20, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset_map descriptor for A10/A20, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Tested-by Jagan Teki <[email protected]> # A20-OLinuXino-Lime2
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #11 lore raw

PATCH v4 6/17 clk: sunxi: Add Allwinner A10s/A13 CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner A10s/A13.

- Implement USB ahb and USB clocks via ccu_clk_map descriptor for A10s/A13, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset_map descriptor for A10s/A13, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig    |  7 ++++
 drivers/clk/sunxi/Makefile   |  1 +
 drivers/clk/sunxi/clk_a10s.c | 74 ++++++++++++++++++++++++++++++++++++
 3 files changed, 82 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_a10s.c

drivers/clk/sunxi/Kconfig +7 -0

index fbbf94ef55..b228c2fa3a 100644
@@ -16,6 +16,13 @@ config CLK_SUN4I_A10
 	  This enables common clock driver support for platforms based
 	  on Allwinner A10/A20 SoC.
 
+config CLK_SUN5I_A10S
+	bool "Clock driver for Allwinner A10s/A13"
+	default MACH_SUN5I
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner A10s/A13 SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index bba830922f..466d4b79d6 100644
@@ -7,5 +7,6 @@
 obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
 
 obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
+obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_a10s.c new file +74 -0

74 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:38 UTC #12 lore raw

PATCH v4 6/17 clk: sunxi: Add Allwinner A10s/A13 CLK driver

Quoted 10 lines · Jagan Teki

Add initial clock driver for Allwinner A10s/A13.
- Implement USB ahb and USB clocks via ccu_clk_map descriptor for A10s/A13, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset_map descriptor for A10s/A13, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Signed-off-by Jagan Teki <[email protected]>

IIRC, the clock set isn't entirely the same, but I guess the differences don't matter to U-Boot.

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #13 lore raw

PATCH v4 7/17 clk: sunxi: Add Allwinner A31 CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner A31.

- Implement USB ahb1 and USB clocks via ccu_clk_map descriptor for A31, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB ahb1 and USB resets via ccu_reset_map descriptor for A31, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig   |  7 +++
 drivers/clk/sunxi/Makefile  |  1 +
 drivers/clk/sunxi/clk_a31.c | 86 +++++++++++++++++++++++++++++++++++++
 3 files changed, 94 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_a31.c

drivers/clk/sunxi/Kconfig +7 -0

index b228c2fa3a..535b0dc02c 100644
@@ -23,6 +23,13 @@ config CLK_SUN5I_A10S
 	  This enables common clock driver support for platforms based
 	  on Allwinner A10s/A13 SoC.
 
+config CLK_SUN6I_A31
+	bool "Clock driver for Allwinner A31/A31s"
+	default MACH_SUN6I
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner A31/A31s SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index 466d4b79d6..3cf0071b0c 100644
@@ -8,5 +8,6 @@ obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
 
 obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
 obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
+obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_a31.c new file +86 -0

86 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:39 UTC #14 lore raw

PATCH v4 7/17 clk: sunxi: Add Allwinner A31 CLK driver

Quoted 10 lines · Jagan Teki

Add initial clock driver for Allwinner A31.
- Implement USB ahb1 and USB clocks via ccu_clk_map descriptor for A31, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB ahb1 and USB resets via ccu_reset_map descriptor for A31, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Thanks,
Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #15 lore raw

PATCH v4 8/17 clk: sunxi: Add Allwinner A23 CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner A23.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for A23, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for A23, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig   |  7 ++++
 drivers/clk/sunxi/Makefile  |  1 +
 drivers/clk/sunxi/clk_a23.c | 79 +++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_a23.c

drivers/clk/sunxi/Kconfig +7 -0

index 535b0dc02c..54600e8e1f 100644
@@ -30,6 +30,13 @@ config CLK_SUN6I_A31
 	  This enables common clock driver support for platforms based
 	  on Allwinner A31/A31s SoC.
 
+config CLK_SUN8I_A23
+	bool "Clock driver for Allwinner A23"
+	default MACH_SUN8I_A23
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner A23 SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index 3cf0071b0c..6924897036 100644
@@ -9,5 +9,6 @@ obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
 obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
 obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
 obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
+obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_a23.c new file +79 -0

79 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:39 UTC #16 lore raw

PATCH v4 8/17 clk: sunxi: Add Allwinner A23 CLK driver

Quoted 10 lines · Jagan Teki

Add initial clock driver for Allwinner A23.
- Implement USB bus and USB clocks via ccu_clk_map descriptor for A23, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for A23, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #17 lore raw

PATCH v4 9/17 clk: sunxi: a23: Add CLK support for A33

In reply to Jagan Teki

A33 has separate clock driver in Linux because of few clock differences wrt to A23 like audio etc,. these may not useful for U-Boot so added a33 ccu compatible on existing a23 clock driver.

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig   | 6 +++---
 drivers/clk/sunxi/clk_a23.c | 2 ++
 2 files changed, 5 insertions(+), 3 deletions(-)

drivers/clk/sunxi/Kconfig +3 -3

index 54600e8e1f..38ff99d345 100644
@@ -31,11 +31,11 @@ config CLK_SUN6I_A31
 	  on Allwinner A31/A31s SoC.
 
 config CLK_SUN8I_A23
-	bool "Clock driver for Allwinner A23"
-	default MACH_SUN8I_A23
+	bool "Clock driver for Allwinner A23/A33"
+	default MACH_SUN8I_A23 || MACH_SUN8I_A33
 	help
 	  This enables common clock driver support for platforms based
-	  on Allwinner A23 SoC.
+	  on Allwinner A23/A33 SoC.
 
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"

drivers/clk/sunxi/clk_a23.c +2 -0

index 165dea8cb2..4b30fe608c 100644
@@ -65,6 +65,8 @@ static int a23_clk_bind(struct udevice *dev)
 static const struct udevice_id a23_clk_ids[] = {
 	{ .compatible = "allwinner,sun8i-a23-ccu",
 	  .data = (ulong)&sun8i_a23_ccu_desc },
+	{ .compatible = "allwinner,sun8i-a33-ccu",
+	  .data = (ulong)&sun8i_a23_ccu_desc },
 	{ }
 };

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:40 UTC #18 lore raw

PATCH v4 9/17 clk: sunxi: a23: Add CLK support for A33

Quoted 6 lines · Jagan Teki

A33 has separate clock driver in Linux because of few clock differences wrt to A23 like audio etc,. these may not useful for U-Boot so added a33 ccu compatible on existing a23 clock driver.
Signed-off-by Jagan Teki <[email protected]>

I guess this one can be merged with the previous patch, just like you did for the h3/h5, a10/a20 and a10s/a13 already.

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #19 lore raw

PATCH v4 10/17 clk: sunxi: Add Allwinner A83T CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner A83T.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for A83T, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for A83T, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by Jagan Teki <[email protected]> # BPI-M3

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig    |  7 ++++
 drivers/clk/sunxi/Makefile   |  1 +
 drivers/clk/sunxi/clk_a83t.c | 81 ++++++++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_a83t.c

drivers/clk/sunxi/Kconfig +7 -0

index 38ff99d345..90af70d171 100644
@@ -37,6 +37,13 @@ config CLK_SUN8I_A23
 	  This enables common clock driver support for platforms based
 	  on Allwinner A23/A33 SoC.
 
+config CLK_SUN8I_A83T
+	bool "Clock driver for Allwinner A83T"
+	default MACH_SUN8I_A83T
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner A83T SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index 6924897036..4a254c8671 100644
@@ -10,5 +10,6 @@ obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
 obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
 obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
 obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
+obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_a83t.c new file +81 -0

81 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 14:41 UTC #20 lore raw

PATCH v4 10/17 clk: sunxi: Add Allwinner A83T CLK driver

Quoted 11 lines · Jagan Teki

Add initial clock driver for Allwinner A83T.
- Implement USB bus and USB clocks via ccu_clk_map descriptor for A83T, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for A83T, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Tested-by Jagan Teki <[email protected]> # BPI-M3
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #21 lore raw

PATCH v4 11/17 clk: sunxi: Add Allwinner R40 CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for R40, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for R40, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by Jagan Teki <[email protected]> # BPI-M2U, BPI-M2B

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig   |  7 +++
 drivers/clk/sunxi/Makefile  |  1 +
 drivers/clk/sunxi/clk_r40.c | 88 +++++++++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_r40.c

drivers/clk/sunxi/Kconfig +7 -0

index 90af70d171..c45a4ba378 100644
@@ -44,6 +44,13 @@ config CLK_SUN8I_A83T
 	  This enables common clock driver support for platforms based
 	  on Allwinner A83T SoC.
 
+config CLK_SUN8I_R40
+	bool "Clock driver for Allwinner R40"
+	default MACH_SUN8I_R40
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner R40 SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index 4a254c8671..61f8b87396 100644
@@ -11,5 +11,6 @@ obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
 obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
 obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
 obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
+obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_r40.c new file +88 -0

88 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 15:02 UTC #22 lore raw

PATCH v4 11/17 clk: sunxi: Add Allwinner R40 CLK driver

Quoted 11 lines · Jagan Teki

Add initial clock driver for Allwinner R40.
- Implement USB bus and USB clocks via ccu_clk_map descriptor for R40, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for R40, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Tested-by Jagan Teki <[email protected]> # BPI-M2U, BPI-M2B
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #23 lore raw

PATCH v4 12/17 clk: sunxi: Add Allwinner V3S CLK driver

In reply to Jagan Teki

Add initial clock driver for Allwinner V3S.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for V3S, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for V3S, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/clk/sunxi/Kconfig   |  7 ++++
 drivers/clk/sunxi/Makefile  |  1 +
 drivers/clk/sunxi/clk_v3s.c | 69 +++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk_v3s.c

drivers/clk/sunxi/Kconfig +7 -0

index c45a4ba378..a6f84e9e56 100644
@@ -51,6 +51,13 @@ config CLK_SUN8I_R40
 	  This enables common clock driver support for platforms based
 	  on Allwinner R40 SoC.
 
+config CLK_SUN8I_V3S
+	bool "Clock driver for Allwinner V3S"
+	default MACH_SUN8I_V3S
+	help
+	  This enables common clock driver support for platforms based
+	  on Allwinner V3S SoC.
+
 config CLK_SUN8I_H3
 	bool "Clock driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5

drivers/clk/sunxi/Makefile +1 -0

index 61f8b87396..fbd43527a6 100644
@@ -12,5 +12,6 @@ obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
 obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
 obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
 obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
+obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
 obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
 obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o

drivers/clk/sunxi/clk_v3s.c new file +69 -0

69 lines not on this page · raw message

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 15:02 UTC #24 lore raw

PATCH v4 12/17 clk: sunxi: Add Allwinner V3S CLK driver

Quoted 10 lines · Jagan Teki

Add initial clock driver for Allwinner V3S.
- Implement USB bus and USB clocks via ccu_clk_map descriptor for V3S, so it can accessed in common clk enable and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset_map descriptor for V3S, so it can accessed in common reset deassert and assert functions from reset-sunxi.c
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #25 lore raw

PATCH v4 13/17 sunxi: Enable CLK

In reply to Jagan Teki

CLK and DM_RESET drivers are now available for most of the Allwinner platforms, so enable in mach-sunxi/Kconfig

Enabling CLK will select DM_RESET by default.

Tested-by Jagan Teki <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
 arch/arm/mach-sunxi/Kconfig | 12 ++++++++++++
 1 file changed, 12 insertions(+)

arch/arm/mach-sunxi/Kconfig +12 -0

index 686f38fec4..b9575c6b92 100644
@@ -132,6 +132,7 @@ endif
 
 config MACH_SUNXI_H3_H5
 	bool
+	select CLK
 	select DM_I2C
 	select PHY_SUN4I_USB
 	select SUNXI_DE2

@@ -147,6 +148,7 @@ choice
 config MACH_SUN4I
 	bool "sun4i (Allwinner A10)"
 	select CPU_V7A
+	select CLK
 	select ARM_CORTEX_CPU_IS_UP
 	select DM_MMC if MMC
 	select DM_SCSI if SCSI

@@ -158,6 +160,7 @@ config MACH_SUN4I
 config MACH_SUN5I
 	bool "sun5i (Allwinner A13)"
 	select CPU_V7A
+	select CLK
 	select ARM_CORTEX_CPU_IS_UP
 	select DRAM_SUN4I
 	select PHY_SUN4I_USB

@@ -171,6 +174,7 @@ config MACH_SUN6I
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select ARCH_SUPPORT_PSCI
+	select CLK
 	select DRAM_SUN6I
 	select PHY_SUN4I_USB
 	select SUN6I_P2WI

@@ -185,6 +189,7 @@ config MACH_SUN7I
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select ARCH_SUPPORT_PSCI
+	select CLK
 	select DRAM_SUN4I
 	select PHY_SUN4I_USB
 	select SUNXI_GEN_SUN4I

@@ -197,6 +202,7 @@ config MACH_SUN8I_A23
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select ARCH_SUPPORT_PSCI
+	select CLK
 	select DRAM_SUN8I_A23
 	select PHY_SUN4I_USB
 	select SUNXI_GEN_SUN6I

@@ -210,6 +216,7 @@ config MACH_SUN8I_A33
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select ARCH_SUPPORT_PSCI
+	select CLK
 	select DRAM_SUN8I_A33
 	select PHY_SUN4I_USB
 	select SUNXI_GEN_SUN6I

@@ -220,6 +227,7 @@ config MACH_SUN8I_A33
 config MACH_SUN8I_A83T
 	bool "sun8i (Allwinner A83T)"
 	select CPU_V7A
+	select CLK
 	select DRAM_SUN8I_A83T
 	select PHY_SUN4I_USB
 	select SUNXI_GEN_SUN6I

@@ -231,6 +239,7 @@ config MACH_SUN8I_H3
 	select CPU_V7A
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
+	select CLK
 	select ARCH_SUPPORT_PSCI
 	select MACH_SUNXI_H3_H5
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT

@@ -241,6 +250,7 @@ config MACH_SUN8I_R40
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select ARCH_SUPPORT_PSCI
+	select CLK
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
 	select SUNXI_DRAM_DW

@@ -252,6 +262,7 @@ config MACH_SUN8I_V3S
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select ARCH_SUPPORT_PSCI
+	select CLK
 	select SUNXI_GEN_SUN6I
 	select SUNXI_DRAM_DW
 	select SUNXI_DRAM_DW_16BIT

@@ -270,6 +281,7 @@ config MACH_SUN9I
 config MACH_SUN50I
 	bool "sun50i (Allwinner A64)"
 	select ARM64
+	select CLK
 	select DM_I2C
 	select PHY_SUN4I_USB
 	select SUNXI_DE2

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

author

2018-08-26 12:38 UTC #26 lore raw

PATCH v4 14/17 phy: sun4i-usb: Use CLK and RESET support

In reply to Jagan Teki

Now clock and reset drivers are available for respective SoC's so use clk and reset ops on phy driver.

Tested-by Jagan Teki <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/phy/allwinner/phy-sun4i-usb.c | 77 ++++++++++++++++++++-------
 1 file changed, 57 insertions(+), 20 deletions(-)

drivers/phy/allwinner/phy-sun4i-usb.c +57 ~~-20~~

index a7d7e3f044..f206fa3f5d 100644
@@ -11,10 +11,12 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <dm/device.h>
 #include <generic-phy.h>
 #include <phy-sun4i-usb.h>
+#include <reset.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>

@@ -80,6 +82,7 @@ struct sun4i_usb_phy_cfg {
 	enum sun4i_usb_phy_type type;
 	u32 disc_thresh;
 	u8 phyctl_offset;
+	bool dedicated_clocks;
 	bool enable_pmu_unk1;
 	bool phy0_dual_route;
 };

@@ -88,30 +91,21 @@ struct sun4i_usb_phy_info {
 	const char *gpio_vbus;
 	const char *gpio_vbus_det;
 	const char *gpio_id_det;
-	int rst_mask;
 } phy_info[] = {
 	{
 		.gpio_vbus = CONFIG_USB0_VBUS_PIN,
 		.gpio_vbus_det = CONFIG_USB0_VBUS_DET,
 		.gpio_id_det = CONFIG_USB0_ID_DET,
-		.rst_mask = (CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK),
 	},
 	{
 		.gpio_vbus = CONFIG_USB1_VBUS_PIN,
 		.gpio_vbus_det = NULL,
 		.gpio_id_det = NULL,
-		.rst_mask = (CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK),
 	},
 	{
 		.gpio_vbus = CONFIG_USB2_VBUS_PIN,
 		.gpio_vbus_det = NULL,
 		.gpio_id_det = NULL,
-#ifdef CONFIG_MACH_SUN8I_A83T
-		.rst_mask = (CCM_USB_CTRL_HSIC_RST | CCM_USB_CTRL_HSIC_CLK |
-			     CCM_USB_CTRL_12M_CLK),
-#else
-		.rst_mask = (CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK),
-#endif
 	},
 	{
 		.gpio_vbus = CONFIG_USB3_VBUS_PIN,

@@ -126,13 +120,13 @@ struct sun4i_usb_phy_plat {
 	int gpio_vbus;
 	int gpio_vbus_det;
 	int gpio_id_det;
-	int rst_mask;
+	struct clk clocks;
+	struct reset_ctl resets;
 	int id;
 };
 
 struct sun4i_usb_phy_data {
 	void __iomem *base;
-	struct sunxi_ccm_reg *ccm;
 	const struct sun4i_usb_phy_cfg *cfg;
 	struct sun4i_usb_phy_plat *usb_phy;
 };

@@ -266,8 +260,19 @@ static int sun4i_usb_phy_init(struct phy *phy)
 	struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev);
 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
 	u32 val;
+	int ret;
 
-	setbits_le32(&data->ccm->usb_clk_cfg, usb_phy->rst_mask);
+	ret = clk_enable(&usb_phy->clocks);
+	if (ret) {
+		dev_err(dev, "failed to enable usb_%ldphy clock\n", phy->id);
+		return ret;
+	}
+
+	ret = reset_deassert(&usb_phy->resets);
+	if (ret) {
+		dev_err(dev, "failed to deassert usb_%ldreset reset\n", phy->id);
+		return ret;
+	}
 
 	if (data->cfg->type == sun8i_a83t_phy) {
 		if (phy->id == 0) {

@@ -308,6 +313,7 @@ static int sun4i_usb_phy_exit(struct phy *phy)
 {
 	struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev);
 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
+	int ret;
 
 	if (phy->id == 0) {
 		if (data->cfg->type == sun8i_a83t_phy) {

@@ -320,7 +326,17 @@ static int sun4i_usb_phy_exit(struct phy *phy)
 
 	sun4i_usb_phy_passby(phy, false);
 
-	clrbits_le32(&data->ccm->usb_clk_cfg, usb_phy->rst_mask);
+	ret = clk_disable(&usb_phy->clocks);
+	if (ret) {
+		dev_err(dev, "failed to disable usb_%ldphy clock\n", phy->id);
+		return ret;
+	}
+
+	ret = reset_assert(&usb_phy->resets);
+	if (ret) {
+		dev_err(dev, "failed to assert usb_%ldreset reset\n", phy->id);
+		return ret;
+	}
 
 	return 0;
 }

@@ -407,10 +423,6 @@ static int sun4i_usb_phy_probe(struct udevice *dev)
 	if (IS_ERR(data->base))
 		return PTR_ERR(data->base);
 
-	data->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-	if (IS_ERR(data->ccm))
-		return PTR_ERR(data->ccm);
-
 	data->usb_phy = plat;
 	for (i = 0; i < data->cfg->num_phys; i++) {
 		struct sun4i_usb_phy_plat *phy = &plat[i];

@@ -448,6 +460,24 @@ static int sun4i_usb_phy_probe(struct udevice *dev)
 			sunxi_gpio_set_pull(phy->gpio_id_det, SUNXI_GPIO_PULL_UP);
 		}
 
+		if (data->cfg->dedicated_clocks)
+			snprintf(name, sizeof(name), "usb%d_phy", i);
+		else
+			strlcpy(name, "usb_phy", sizeof(name));
+
+		ret = clk_get_by_name(dev, name, &phy->clocks);
+		if (ret) {
+			dev_err(dev, "failed to get usb%d_phy clock phandle\n", i);
+			return ret;
+		}
+
+		snprintf(name, sizeof(name), "usb%d_reset", i);
+		ret = reset_get_by_name(dev, name, &phy->resets);
+		if (ret) {
+			dev_err(dev, "failed to get usb%d_reset reset phandle\n", i);
+			return ret;
+		}
+
 		if (i || data->cfg->phy0_dual_route) {
 			snprintf(name, sizeof(name), "pmu%d", i);
 			phy->pmu = (void __iomem *)devfdt_get_addr_name(dev, name);

@@ -456,9 +486,6 @@ static int sun4i_usb_phy_probe(struct udevice *dev)
 		}
 
 		phy->id = i;
-		phy->rst_mask = info->rst_mask;
-		if ((data->cfg->type == sun8i_h3_phy) && (phy->id == 3))
-			phy->rst_mask = (BIT(3) | BIT(11));
 	};
 
 	debug("Allwinner Sun4I USB PHY driver loaded\n");

@@ -470,6 +497,7 @@ static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
 	.type = sun4i_a10_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A10,
+	.dedicated_clocks = false,
 	.enable_pmu_unk1 = false,
 };

@@ -478,6 +506,7 @@ static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
 	.type = sun4i_a10_phy,
 	.disc_thresh = 2,
 	.phyctl_offset = REG_PHYCTL_A10,
+	.dedicated_clocks = false,
 	.enable_pmu_unk1 = false,
 };

@@ -486,6 +515,7 @@ static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
 	.type = sun6i_a31_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A10,
+	.dedicated_clocks = true,
 	.enable_pmu_unk1 = false,
 };

@@ -494,6 +524,7 @@ static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
 	.type = sun4i_a10_phy,
 	.disc_thresh = 2,
 	.phyctl_offset = REG_PHYCTL_A10,
+	.dedicated_clocks = false,
 	.enable_pmu_unk1 = false,
 };

@@ -502,6 +533,7 @@ static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
 	.type = sun4i_a10_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A10,
+	.dedicated_clocks = true,
 	.enable_pmu_unk1 = false,
 };

@@ -510,6 +542,7 @@ static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
 	.type = sun8i_a33_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A33,
+	.dedicated_clocks = true,
 	.enable_pmu_unk1 = false,
 };

@@ -517,6 +550,7 @@ static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
 	.num_phys = 3,
 	.type = sun8i_a83t_phy,
 	.phyctl_offset = REG_PHYCTL_A33,
+	.dedicated_clocks = true,
 };
 
 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {

@@ -524,6 +558,7 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
 	.type = sun8i_h3_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A33,
+	.dedicated_clocks = true,
 	.enable_pmu_unk1 = true,
 	.phy0_dual_route = true,
 };

@@ -533,6 +568,7 @@ static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
 	.type = sun8i_v3s_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A33,
+	.dedicated_clocks = true,
 	.enable_pmu_unk1 = true,
 	.phy0_dual_route = true,
 };

@@ -542,6 +578,7 @@ static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
 	.type = sun50i_a64_phy,
 	.disc_thresh = 3,
 	.phyctl_offset = REG_PHYCTL_A33,
+	.dedicated_clocks = true,
 	.enable_pmu_unk1 = true,
 	.phy0_dual_route = true,
 };

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 15:03 UTC #27 lore raw

PATCH v4 14/17 phy: sun4i-usb: Use CLK and RESET support

Quoted 5 lines · Jagan Teki

Now clock and reset drivers are available for respective SoC's so use clk and reset ops on phy driver.
Tested-by Jagan Teki <[email protected]>
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #28 lore raw

PATCH v4 15/17 musb-new: sunxi: Use CLK and RESET support

In reply to Jagan Teki

Now clock and reset drivers are available for respective SoC's so use clk and reset ops on musb driver.

Tested-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/usb/musb-new/sunxi.c | 87 +++++++++++++++++++++---------------
 1 file changed, 51 insertions(+), 36 deletions(-)

drivers/usb/musb-new/sunxi.c +51 ~~-36~~

index 6cf9826cda..7126152a21 100644
@@ -16,9 +16,11 @@
  * This file is part of the Inventra Controller Driver for Linux.
  */
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
 #include <phy-sun4i-usb.h>
+#include <reset.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>

@@ -76,23 +78,18 @@
  * From usbc/usbc.c
  ******************************************************************************/
 
-#define OFF_SUN6I_AHB_RESET0	0x2c0
-
 struct sunxi_musb_config {
 	struct musb_hdrc_config *config;
 	bool has_reset;
-	u8 rst_bit;
-	u8 clkgate_bit;
-	u32 off_reset0;
 };
 
 struct sunxi_glue {
 	struct musb_host_data mdata;
-	struct sunxi_ccm_reg *ccm;
-	u32 *reg_reset0;
 	struct sunxi_musb_config *cfg;
 	struct device dev;
 	struct phy phy;
+	struct clk clk;
+	struct reset_ctl rst;
 };
 #define to_sunxi_glue(d)	container_of(d, struct sunxi_glue, dev)

@@ -296,24 +293,27 @@ static int sunxi_musb_init(struct musb *musb)
 
 	pr_debug("%s():\n", __func__);
 
-	ret = generic_phy_init(&glue->phy);
+	ret = clk_enable(&glue->clk);
 	if (ret) {
-		pr_err("failed to init USB PHY\n");
+		dev_err(dev, "failed to enable clock\n");
 		return ret;
 	}
 
-	musb->isr = sunxi_musb_interrupt;
-
-	setbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
-	if (glue->cfg->clkgate_bit)
-		setbits_le32(&glue->ccm->ahb_gate0,
-			     BIT(glue->cfg->clkgate_bit));
+	if (glue->cfg->has_reset) {
+		ret = reset_deassert(&glue->rst);
+		if (ret) {
+			dev_err(dev, "failed to deassert reset\n");
+			goto err_clk;
+		}
+	}
 
-	if (glue->cfg->has_reset)
-		setbits_le32(glue->reg_reset0, BIT(AHB_GATE_OFFSET_USB0));
+	ret = generic_phy_init(&glue->phy);
+	if (ret) {
+		pr_err("failed to init USB PHY\n");
+		goto err_rst;
+	}
 
-	if (glue->cfg->rst_bit)
-		setbits_le32(glue->reg_reset0, BIT(glue->cfg->rst_bit));
+	musb->isr = sunxi_musb_interrupt;
 
 	USBC_ConfigFIFO_Base();
 	USBC_EnableDpDmPullUp(musb->mregs);

@@ -329,6 +329,13 @@ static int sunxi_musb_init(struct musb *musb)
 	USBC_ForceVbusValidToHigh(musb->mregs);
 
 	return 0;
+
+err_rst:
+	if (glue->cfg->has_reset)
+		reset_assert(&glue->rst);
+err_clk:
+	clk_disable(&glue->clk);
+	return ret;
 }
 
 static int sunxi_musb_exit(struct musb *musb)

@@ -344,16 +351,19 @@ static int sunxi_musb_exit(struct musb *musb)
 		}
 	}
 
-	if (glue->cfg->has_reset)
-		clrbits_le32(glue->reg_reset0, BIT(AHB_GATE_OFFSET_USB0));
-
-	if (glue->cfg->rst_bit)
-		clrbits_le32(glue->reg_reset0, BIT(glue->cfg->rst_bit));
+	if (glue->cfg->has_reset) {
+		ret = reset_assert(&glue->rst);
+		if (ret) {
+			dev_err(dev, "failed to deassert reset\n");
+			return ret;
+		}
+	}
 
-	clrbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
-	if (glue->cfg->clkgate_bit)
-		clrbits_le32(&glue->ccm->ahb_gate0,
-			     BIT(glue->cfg->clkgate_bit));
+	ret = clk_disable(&glue->clk);
+	if (ret) {
+		dev_err(dev, "failed to enable clock\n");
+		return ret;
+	}
 
 	return 0;
 }

@@ -447,11 +457,19 @@ static int musb_usb_probe(struct udevice *dev)
 	if (!glue->cfg)
 		return -EINVAL;
 
-	glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-	if (IS_ERR(glue->ccm))
-		return PTR_ERR(glue->ccm);
+	ret = clk_get_by_index(dev, 0, &glue->clk);
+	if (ret) {
+		dev_err(dev, "failed to get clock\n");
+		return ret;
+	}
 
-	glue->reg_reset0 = (void *)glue->ccm + glue->cfg->off_reset0;
+	if (glue->cfg->has_reset) {
+		ret = reset_get_by_index(dev, 0, &glue->rst);
+		if (ret) {
+			dev_err(dev, "failed to get reset\n");
+			return ret;
+		}
+	}
 
 	ret = generic_phy_get_by_name(dev, "usb", &glue->phy);
 	if (ret) {

@@ -493,6 +511,7 @@ static int musb_usb_remove(struct udevice *dev)
 	struct musb_host_data *host = &glue->mdata;
 
 	musb_stop(host->host);
+
 	free(host->host);
 	host->host = NULL;

@@ -507,15 +526,11 @@ static const struct sunxi_musb_config sun4i_a10_cfg = {
 static const struct sunxi_musb_config sun6i_a31_cfg = {
 	.config = &musb_config,
 	.has_reset = true,
-	.off_reset0 = OFF_SUN6I_AHB_RESET0,
 };
 
 static const struct sunxi_musb_config sun8i_h3_cfg = {
 	.config = &musb_config_h3,
 	.has_reset = true,
-	.rst_bit = 23,
-	.clkgate_bit = 23,
-	.off_reset0 = OFF_SUN6I_AHB_RESET0,
 };
 
 static const struct udevice_id sunxi_musb_ids[] = {

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

author

2018-08-26 12:38 UTC #29 lore raw

PATCH v4 16/17 sunxi: usb: Switch to Generic host controllers

In reply to Jagan Teki

Once of key blocker for using USB Generic host controller drivers in Allwinner are CLK and RESET drivers, now these available for USB usage. So switch to use EHCI and OHCI Generic controllers.

Enabling USB is wisely a board choise, so Enable USB_OHCI_HCD where it already have USB_EHCI_HCD

Tested-by Jagan Teki <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
 configs/A10-OLinuXino-Lime_defconfig          | 1 +
 configs/A10s-OLinuXino-M_defconfig            | 1 +
 configs/A13-OLinuXinoM_defconfig              | 1 +
 configs/A13-OLinuXino_defconfig               | 1 +
 configs/A20-OLinuXino-Lime2-eMMC_defconfig    | 1 +
 configs/A20-OLinuXino-Lime2_defconfig         | 1 +
 configs/A20-OLinuXino-Lime_defconfig          | 1 +
 configs/A20-Olimex-SOM204-EVB_defconfig       | 2 ++
 configs/Auxtek-T003_defconfig                 | 1 +
 configs/Auxtek-T004_defconfig                 | 1 +
 configs/Bananapi_defconfig                    | 1 +
 configs/Bananapi_m2m_defconfig                | 1 +
 configs/Bananapro_defconfig                   | 1 +
 configs/CHIP_defconfig                        | 1 +
 configs/CHIP_pro_defconfig                    | 1 +
 configs/CSQ_CS908_defconfig                   | 1 +
 configs/Colombus_defconfig                    | 1 +
 configs/Cubieboard2_defconfig                 | 1 +
 configs/Cubieboard_defconfig                  | 1 +
 configs/Cubietruck_plus_defconfig             | 1 +
 configs/Hummingbird_A31_defconfig             | 1 +
 configs/Itead_Ibox_A20_defconfig              | 1 +
 configs/Linksprite_pcDuino3_Nano_defconfig    | 1 +
 configs/Linksprite_pcDuino3_defconfig         | 1 +
 configs/Linksprite_pcDuino_defconfig          | 1 +
 configs/MK808C_defconfig                      | 1 +
 configs/Marsboard_A10_defconfig               | 1 +
 configs/Mele_A1000G_quad_defconfig            | 1 +
 configs/Mele_A1000_defconfig                  | 1 +
 configs/Mele_I7_defconfig                     | 1 +
 configs/Mele_M3_defconfig                     | 1 +
 configs/Mele_M5_defconfig                     | 1 +
 configs/Mele_M9_defconfig                     | 1 +
 configs/Mini-X_defconfig                      | 1 +
 configs/Orangepi_defconfig                    | 1 +
 configs/Orangepi_mini_defconfig               | 1 +
 configs/Sinlinx_SinA31s_defconfig             | 1 +
 configs/Sinlinx_SinA33_defconfig              | 1 +
 configs/Sinovoip_BPI_M2_Plus_defconfig        | 1 +
 configs/Sinovoip_BPI_M2_defconfig             | 1 +
 configs/Sinovoip_BPI_M3_defconfig             | 1 +
 configs/Wexler_TAB7200_defconfig              | 1 +
 configs/Wobo_i5_defconfig                     | 1 +
 configs/a64-olinuxino_defconfig               | 1 +
 configs/ba10_tv_box_defconfig                 | 1 +
 configs/bananapi_m1_plus_defconfig            | 1 +
 configs/bananapi_m64_defconfig                | 1 +
 configs/ga10h_v1_1_defconfig                  | 1 +
 configs/h8_homlet_v2_defconfig                | 1 +
 configs/i12-tvbox_defconfig                   | 1 +
 configs/icnova-a20-swac_defconfig             | 1 +
 configs/inet1_defconfig                       | 1 +
 configs/inet_q972_defconfig                   | 1 +
 configs/jesurun_q5_defconfig                  | 1 +
 configs/libretech_all_h3_cc_h2_plus_defconfig | 1 +
 configs/libretech_all_h3_cc_h3_defconfig      | 1 +
 configs/libretech_all_h3_cc_h5_defconfig      | 1 +
 configs/mixtile_loftq_defconfig               | 1 +
 configs/mk802_a10s_defconfig                  | 1 +
 configs/mk802_defconfig                       | 1 +
 configs/mk802ii_defconfig                     | 1 +
 configs/nanopi_a64_defconfig                  | 1 +
 configs/nanopi_m1_defconfig                   | 1 +
 configs/nanopi_m1_plus_defconfig              | 1 +
 configs/nanopi_neo2_defconfig                 | 1 +
 configs/nanopi_neo_air_defconfig              | 1 +
 configs/nanopi_neo_defconfig                  | 1 +
 configs/nanopi_neo_plus2_defconfig            | 1 +
 configs/orangepi_2_defconfig                  | 1 +
 configs/orangepi_lite_defconfig               | 1 +
 configs/orangepi_one_defconfig                | 1 +
 configs/orangepi_pc2_defconfig                | 1 +
 configs/orangepi_pc_defconfig                 | 1 +
 configs/orangepi_pc_plus_defconfig            | 1 +
 configs/orangepi_plus2e_defconfig             | 1 +
 configs/orangepi_plus_defconfig               | 1 +
 configs/orangepi_prime_defconfig              | 1 +
 configs/orangepi_r1_defconfig                 | 1 +
 configs/orangepi_win_defconfig                | 1 +
 configs/orangepi_zero_defconfig               | 1 +
 configs/orangepi_zero_plus2_defconfig         | 1 +
 configs/orangepi_zero_plus_defconfig          | 1 +
 configs/parrot_r16_defconfig                  | 1 +
 configs/pine64_plus_defconfig                 | 1 +
 configs/r7-tv-dongle_defconfig                | 1 +
 configs/sopine_baseboard_defconfig            | 1 +
 configs/sun8i_a23_evb_defconfig               | 1 +
 configs/sunxi_Gemei_G9_defconfig              | 1 +
 configs/tbs_a711_defconfig                    | 1 +
 drivers/usb/host/Kconfig                      | 2 ++
 include/configs/sun4i.h                       | 4 ----
 include/configs/sun50i.h                      | 5 -----
 include/configs/sun5i.h                       | 4 ----
 include/configs/sun6i.h                       | 4 ----
 include/configs/sun7i.h                       | 4 ----
 include/configs/sun8i.h                       | 4 ----
 include/configs/sunxi-common.h                | 1 -
 97 files changed, 92 insertions(+), 26 deletions(-)

configs/A10-OLinuXino-Lime_defconfig +1 -0

index 3d56756114..74545b26e2 100644
@@ -22,5 +22,6 @@ CONFIG_SUN4I_EMAC=y
 CONFIG_AXP_ALDO3_VOLT=2800
 CONFIG_AXP_ALDO4_VOLT=2800
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A10s-OLinuXino-M_defconfig +1 -0

index ab576ba99e..f6b03d2424 100644
@@ -18,5 +18,6 @@ CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_AXP152_POWER=y
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A13-OLinuXinoM_defconfig +1 -0

index 04d588c0ff..6f5b335bd5 100644
@@ -19,5 +19,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUNXI_NO_PMIC=y
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A13-OLinuXino_defconfig +1 -0

index b02fe5bc53..fbe2151848 100644
@@ -26,6 +26,7 @@ CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_AXP_ALDO3_VOLT=3300
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A20-OLinuXino-Lime2-eMMC_defconfig +1 -0

index dfbf311093..5c55b6f174 100644
@@ -29,6 +29,7 @@ CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO3_VOLT=2800
 CONFIG_AXP_ALDO4_VOLT=2800
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A20-OLinuXino-Lime2_defconfig +1 -0

index 632482a8da..26b1b615e4 100644
@@ -28,6 +28,7 @@ CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO3_VOLT=2800
 CONFIG_AXP_ALDO4_VOLT=2800
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A20-OLinuXino-Lime_defconfig +1 -0

index dd6febfe52..abfb912059 100644
@@ -21,5 +21,6 @@ CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO3_VOLT=2800
 CONFIG_AXP_ALDO4_VOLT=2800
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/A20-Olimex-SOM204-EVB_defconfig +2 -0

index fd4629e3db..e73be2a5f5 100644
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y

@@ -29,6 +30,7 @@ CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO3_VOLT=2800
 CONFIG_AXP_ALDO4_VOLT=2800
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Auxtek-T003_defconfig +1 -0

index 8877d8acfa..a650298214 100644
@@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP152_POWER=y
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Auxtek-T004_defconfig +1 -0

index 3b32240337..0a8eb7a473 100644
@@ -13,5 +13,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP152_POWER=y
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Bananapi_defconfig +1 -0

index 3b7c56cfee..4109075250 100644
@@ -21,5 +21,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Bananapi_m2m_defconfig +1 -0

index 71e21ac1cb..71e0e217d6 100644
@@ -15,6 +15,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_FUNCTION_MASS_STORAGE=y

configs/Bananapro_defconfig +1 -0

index ca2bd8c024..fb71756206 100644
@@ -24,5 +24,6 @@ CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO4_VOLT=2500
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/CHIP_defconfig +1 -0

index b674b6cc74..e3cb48fe5a 100644
@@ -17,6 +17,7 @@ CONFIG_DFU_RAM=y
 CONFIG_AXP_ALDO3_VOLT=3300
 CONFIG_AXP_ALDO4_VOLT=3300
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/CHIP_pro_defconfig +1 -0

index ae3ca4d14f..84c5bdd1f2 100644
@@ -21,6 +21,7 @@ CONFIG_SYS_NAND_OOBSIZE=0x100
 CONFIG_AXP_ALDO3_VOLT=3300
 CONFIG_AXP_ALDO4_VOLT=3300
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/CSQ_CS908_defconfig +1 -0

index a739806687..875343d097 100644
@@ -16,6 +16,7 @@ CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO1_VOLT=3300
 CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Colombus_defconfig +1 -0

index 18f2f2f5c2..5970d31b2f 100644
@@ -26,5 +26,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO1_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Cubieboard2_defconfig +1 -0

index a08f538602..181bd55fba 100644
@@ -18,5 +18,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Cubieboard_defconfig +1 -0

index cc0569c669..85d463d04c 100644
@@ -17,5 +17,6 @@ CONFIG_SCSI_AHCI=y
 CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Cubietruck_plus_defconfig +1 -0

index ff5d3b595c..2c98fae745 100644
@@ -23,6 +23,7 @@ CONFIG_CONSOLE_MUX=y
 CONFIG_AXP_DLDO3_VOLT=2500
 CONFIG_AXP_DLDO4_VOLT=3300
 CONFIG_AXP_FLDO1_VOLT=1200
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Hummingbird_A31_defconfig +1 -0

index e49a34ad08..271d574aaf 100644
@@ -18,5 +18,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO1_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Itead_Ibox_A20_defconfig +1 -0

index ff2839511c..cf6ae6c5ea 100644
@@ -18,5 +18,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Linksprite_pcDuino3_Nano_defconfig +1 -0

index 92dd99e212..9f9a4d99bd 100644
@@ -21,5 +21,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Linksprite_pcDuino3_defconfig +1 -0

index 1dae7c0f6d..029db8e9ba 100644
@@ -20,5 +20,6 @@ CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Linksprite_pcDuino_defconfig +1 -0

index 439f502dad..e1e2b9db56 100644
@@ -13,5 +13,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/MK808C_defconfig +1 -0

index d0a8f7aba8..5944607676 100644
@@ -10,5 +10,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Marsboard_A10_defconfig +1 -0

index 4226fdecf3..9de3c97bfa 100644
@@ -14,5 +14,6 @@ CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_SUNXI_NO_PMIC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mele_A1000G_quad_defconfig +1 -0

index 2306963ca6..ceb29acc6a 100644
@@ -19,6 +19,7 @@ CONFIG_AXP_DCDC1_VOLT=3300
 CONFIG_AXP_ALDO1_VOLT=3300
 CONFIG_AXP_DLDO1_VOLT=3300
 CONFIG_AXP_DLDO4_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mele_A1000_defconfig +1 -0

index 353d4c8137..5f9ffafdd5 100644
@@ -17,5 +17,6 @@ CONFIG_SCSI_AHCI=y
 CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mele_I7_defconfig +1 -0

index eb22c7b862..a09ca86023 100644
@@ -18,5 +18,6 @@ CONFIG_AXP_DCDC1_VOLT=3300
 CONFIG_AXP_ALDO1_VOLT=3300
 CONFIG_AXP_DLDO1_VOLT=3300
 CONFIG_AXP_DLDO4_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mele_M3_defconfig +1 -0

index 7666a3b3bd..0a0f62332a 100644
@@ -17,5 +17,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mele_M5_defconfig +1 -0

index edd2201dfb..f77ec57bbf 100644
@@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mele_M9_defconfig +1 -0

index fcb9ea93d3..b448517f94 100644
@@ -18,5 +18,6 @@ CONFIG_AXP_DCDC1_VOLT=3300
 CONFIG_AXP_ALDO1_VOLT=3300
 CONFIG_AXP_DLDO1_VOLT=3300
 CONFIG_AXP_DLDO4_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Mini-X_defconfig +1 -0

index ab507b4fb6..91a9903958 100644
@@ -11,6 +11,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Orangepi_defconfig +1 -0

index cf2e3cd792..b77f66e939 100644
@@ -23,5 +23,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Orangepi_mini_defconfig +1 -0

index a837f26c25..eb1968b735 100644
@@ -25,5 +25,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Sinlinx_SinA31s_defconfig +1 -0

index 03fbb2a12f..57b046b0b6 100644
@@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Sinlinx_SinA33_defconfig +1 -0

index bbe2c18465..9e0cf7b70f 100644
@@ -20,6 +20,7 @@ CONFIG_CMD_DFU=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Sinovoip_BPI_M2_Plus_defconfig +1 -0

index ba11e35296..abebbd279f 100644
@@ -14,6 +14,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Sinovoip_BPI_M2_defconfig +1 -0

index d21b71df5b..c094b747c0 100644
@@ -18,5 +18,6 @@ CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO1_VOLT=3300
 CONFIG_AXP_ALDO2_VOLT=1800
 CONFIG_AXP_DLDO1_VOLT=3000
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Sinovoip_BPI_M3_defconfig +1 -0

index 2fb61a5898..c4c482de51 100644
@@ -24,6 +24,7 @@ CONFIG_CONSOLE_MUX=y
 CONFIG_AXP_DCDC5_VOLT=1200
 CONFIG_AXP_DLDO3_VOLT=2500
 CONFIG_AXP_SW_ON=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Wexler_TAB7200_defconfig +1 -0

index 926106545f..cad5fed798 100644
@@ -18,6 +18,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/Wobo_i5_defconfig +1 -0

index ae0e7f9604..d8d74331e9 100644
@@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_AXP_ALDO3_VOLT=3300
 CONFIG_AXP_ALDO4_VOLT=3300
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/a64-olinuxino_defconfig +1 -0

index b0f66310a6..2db89f5be7 100644
@@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/ba10_tv_box_defconfig +1 -0

index 78cef27753..8be5b24dd6 100644
@@ -16,6 +16,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/bananapi_m1_plus_defconfig +1 -0

index b915a774bd..e2f35cf99b 100644
@@ -21,4 +21,5 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_SCSI=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y

configs/bananapi_m64_defconfig +1 -0

index ebc29e3ed6..d33794c405 100644
@@ -12,6 +12,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/ga10h_v1_1_defconfig +1 -0

index 8b10aa54c9..1ac64a5349 100644
@@ -23,6 +23,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP_DLDO1_VOLT=3300
 CONFIG_CONS_INDEX=5
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/h8_homlet_v2_defconfig +1 -0

index 502064522c..d7314f1c7a 100644
@@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP_DLDO4_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/i12-tvbox_defconfig +1 -0

index 9a15bbd51f..d76e991a7f 100644
@@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/icnova-a20-swac_defconfig +1 -0

index cadd967a27..f7282a6e76 100644
@@ -22,5 +22,6 @@ CONFIG_CMD_UNZIP=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/inet1_defconfig +1 -0

index 0cd3ec4d93..eed075e264 100644
@@ -19,6 +19,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/inet_q972_defconfig +1 -0

index 739a65be11..8381101be9 100644
@@ -20,6 +20,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/jesurun_q5_defconfig +1 -0

index 32e648d44b..fda1f97b19 100644
@@ -15,6 +15,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_MII=y
 CONFIG_SUN4I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/libretech_all_h3_cc_h2_plus_defconfig +1 -0

index 9d3ad854f0..cf5af20df1 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/libretech_all_h3_cc_h3_defconfig +1 -0

index 1b67939546..d0dbd53e2d 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/libretech_all_h3_cc_h5_defconfig +1 -0

index a4c59d747c..a42568552a 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/mixtile_loftq_defconfig +1 -0

index b90316a4b4..7138846b66 100644
@@ -18,5 +18,6 @@ CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
 CONFIG_AXP_ALDO1_VOLT=3300
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/mk802_a10s_defconfig +1 -0

index 9235e29235..87b69acab9 100644
@@ -14,5 +14,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP152_POWER=y
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/mk802_defconfig +1 -0

index a7e8f0f890..e4291bd2c4 100644
@@ -10,5 +10,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUNXI_NO_PMIC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/mk802ii_defconfig +1 -0

index 6fbe2b0114..3585c12f8d 100644
@@ -9,5 +9,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_a64_defconfig +1 -0

index c9593fe833..9f9cc1c5f7 100644
@@ -10,5 +10,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_m1_defconfig +1 -0

index dfbf219b2b..abeffe4d06 100644
@@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_m1_plus_defconfig +1 -0

index 6fb6e5790e..151ed7655c 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_neo2_defconfig +1 -0

index 0e3b65348a..a8fb828f08 100644
@@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_neo_air_defconfig +1 -0

index 00817a9e29..423adbcc34 100644
@@ -13,5 +13,6 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_neo_defconfig +1 -0

index c43457cb49..3ecbbb4c27 100644
@@ -14,5 +14,6 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/nanopi_neo_plus2_defconfig +1 -0

index c33eb109b1..e2b3df770f 100644
@@ -13,4 +13,5 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y

configs/orangepi_2_defconfig +1 -0

index 4f892cf5d8..3f360732c3 100644
@@ -16,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
 CONFIG_SY8106A_POWER=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_lite_defconfig +1 -0

index f8069fe9bd..338abea498 100644
@@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_one_defconfig +1 -0

index 924165339e..fdb3a86a5a 100644
@@ -12,5 +12,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_pc2_defconfig +1 -0

index ed1a071642..c47e3e2ada 100644
@@ -13,6 +13,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_pc_defconfig +1 -0

index 84bf48fec6..d8f567e961 100644
@@ -14,5 +14,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
 CONFIG_SY8106A_POWER=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_pc_plus_defconfig +1 -0

index bf70773cc5..4f2e9d9c55 100644
@@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
 CONFIG_SY8106A_POWER=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_plus2e_defconfig +1 -0

index fa06d77ce3..7861523633 100644
@@ -16,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
 CONFIG_SY8106A_POWER=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_plus_defconfig +1 -0

index 01d8ac8c00..8c7fdeda4e 100644
@@ -18,5 +18,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
 CONFIG_SY8106A_POWER=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_prime_defconfig +1 -0

index adceaf2852..63a8cf29b4 100644
@@ -11,6 +11,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_r1_defconfig +1 -0

index bd43efefd3..5dc11fc18b 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_CONSOLE_MUX=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_win_defconfig +1 -0

index 33ae053dcb..930ab18a69 100644
@@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_zero_defconfig +1 -0

index 44c3144d55..0e463d70a7 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_CONSOLE_MUX=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_zero_plus2_defconfig +1 -0

index 38de6a0697..b3768d3be4 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/orangepi_zero_plus_defconfig +1 -0

index b10741b3e8..dc53b87a5b 100644
@@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/parrot_r16_defconfig +1 -0

index 88f4891e6b..b26df194a3 100644
@@ -18,6 +18,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_CONS_INDEX=5
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/pine64_plus_defconfig +1 -0

index d20604d01a..6832f3581f 100644
@@ -13,5 +13,6 @@ CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus"
 CONFIG_PHY_REALTEK=y
 CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/r7-tv-dongle_defconfig +1 -0

index ca398d9d6e..3bc23a2e1f 100644
@@ -13,5 +13,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_AXP152_POWER=y
 CONFIG_CONS_INDEX=2
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/sopine_baseboard_defconfig +1 -0

index ea826aabad..85db9ad341 100644
@@ -16,5 +16,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/sun8i_a23_evb_defconfig +1 -0

index 8a636c4e66..a89ac8c955 100644
@@ -14,5 +14,6 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_CONS_INDEX=5
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/sunxi_Gemei_G9_defconfig +1 -0

index 041103cafc..6530a4dc20 100644
@@ -16,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

configs/tbs_a711_defconfig +1 -0

index 7094384a89..faf3fd53bb 100644
@@ -19,6 +19,7 @@ CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_AXP_DCDC5_VOLT=1200
+CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_FUNCTION_MASS_STORAGE=y

drivers/usb/host/Kconfig +2 -0

index b4dd005651..60a152704a 100644
@@ -191,6 +191,7 @@ config USB_EHCI_GENERIC
 	bool "Support for generic EHCI USB controller"
 	depends on OF_CONTROL
 	depends on DM_USB
+	default ARCH_SUNXI
 	default n
 	---help---
 	  Enables support for generic EHCI controller.

@@ -221,6 +222,7 @@ config USB_OHCI_GENERIC
 	bool "Support for generic OHCI USB controller"
 	depends on OF_CONTROL
 	depends on DM_USB
+	default ARCH_SUNXI
 	select USB_HOST
 	---help---
 	  Enables support for generic OHCI controller.

include/configs/sun4i.h +0 -4

index af079a71ee..6033760583 100644
@@ -11,10 +11,6 @@
  * A10 specific configuration
  */
 
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_SUNXI
-#endif
-
 /*
  * Include common sunxi configuration where most the settings are
  */

include/configs/sun50i.h +0 -5

index 2d73c75b8c..e050a5299f 100644
@@ -10,11 +10,6 @@
  * A64 specific configuration
  */
 
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_SUNXI
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#endif
-
 #ifndef CONFIG_MACH_SUN50I_H6
 #define GICD_BASE		0x1c81000
 #define GICC_BASE		0x1c82000

include/configs/sun5i.h +0 -4

index c3692caa73..ee42af80d4 100644
@@ -11,10 +11,6 @@
  * High Level Configuration Options
  */
 
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_SUNXI
-#endif
-
 /*
  * Include common sunxi configuration where most the settings are
  */

include/configs/sun6i.h +0 -4

index 1523684fad..1e490daac1 100644
@@ -14,10 +14,6 @@
  * A31 specific configuration
  */
 
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_SUNXI
-#endif
-
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_ARMV7_SECURE_MAX_SIZE    (64 * 1024) /* 64 KB */

include/configs/sun7i.h +0 -4

index bb8f217b25..d2fd586672 100644
@@ -12,10 +12,6 @@
  * A20 specific configuration
  */
 
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_SUNXI
-#endif
-
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_ARMV7_SECURE_MAX_SIZE	(64 * 1024) /* 64 KB */

include/configs/sun8i.h +0 -4

index 7dc8693b76..9b4675e4c3 100644
@@ -12,10 +12,6 @@
  * A23 specific configuration
  */
 
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_SUNXI
-#endif
-
 /*
  * Include common sunxi configuration where most the settings are
  */

include/configs/sunxi-common.h +0 -1

index 9819d9980c..ed0cfc24f5 100644
@@ -295,7 +295,6 @@ extern int soft_i2c_gpio_scl;
 
 #ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_OHCI_SUNXI
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
 #endif

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 15:04 UTC #30 lore raw

PATCH v4 16/17 sunxi: usb: Switch to Generic host controllers

Quoted 10 lines · Jagan Teki

Once of key blocker for using USB Generic host controller drivers in Allwinner are CLK and RESET drivers, now these available for USB usage. So switch to use EHCI and OHCI Generic controllers.
Enabling USB is wisely a board choise, so Enable USB_OHCI_HCD where it already have USB_EHCI_HCD
Tested-by Jagan Teki <[email protected]>
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Jagan Teki

author

2018-08-26 12:38 UTC #31 lore raw

PATCH v4 17/17 usb: host: Drop [e-o]hci-sunxi drivers

In reply to Jagan Teki

Now Allwinner platform is all set to use Generic USB controller drivers, so remove the legacy sunxi drivers.

Tested-by Jagan Teki <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/usb/host/Makefile     |   2 -
 drivers/usb/host/ehci-sunxi.c | 204 -----------------------------
 drivers/usb/host/ohci-sunxi.c | 233 ----------------------------------
 scripts/config_whitelist.txt  |   2 -
 4 files changed, 441 deletions(-)
 delete mode 100644 drivers/usb/host/ehci-sunxi.c
 delete mode 100644 drivers/usb/host/ohci-sunxi.c

drivers/usb/host/Makefile +0 -2

index cb8c315a15..b62fdbb1d2 100644
@@ -15,7 +15,6 @@ obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
 obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
 obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
-obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o
 obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
 obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o

@@ -37,7 +36,6 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
-obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o

drivers/usb/host/ehci-sunxi.c deleted +0 ~~-204~~

204 lines not on this page · raw message

drivers/usb/host/ohci-sunxi.c deleted +0 ~~-233~~

233 lines not on this page · raw message

scripts/config_whitelist.txt +0 -2

index fc37099cbe..96d8798348 100644
@@ -4573,7 +4573,6 @@ CONFIG_USB_EHCI_MX5
 CONFIG_USB_EHCI_MXC
 CONFIG_USB_EHCI_MXS
 CONFIG_USB_EHCI_SPEAR
-CONFIG_USB_EHCI_SUNXI
 CONFIG_USB_EHCI_TEGRA
 CONFIG_USB_EHCI_TXFIFO_THRESH
 CONFIG_USB_EHCI_VCT

@@ -4612,7 +4611,6 @@ CONFIG_USB_MUSB_TUSB6010
 CONFIG_USB_OHCI_EP93XX
 CONFIG_USB_OHCI_LPC32XX
 CONFIG_USB_OHCI_NEW
-CONFIG_USB_OHCI_SUNXI
 CONFIG_USB_OTG
 CONFIG_USB_OTG_BLACKLIST_HUB
 CONFIG_USB_PHY_CFG_BASE

Signature · 1 line

2.18.0.321.gffc6fa0e3

Maxime Ripard

2018-08-27 15:03 UTC #32 lore raw

PATCH v4 17/17 usb: host: Drop [e-o]hci-sunxi drivers

Quoted 5 lines · Jagan Teki

Now Allwinner platform is all set to use Generic USB controller drivers, so remove the legacy sunxi drivers.
Tested-by Jagan Teki <[email protected]>
Signed-off-by Jagan Teki <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Maxime

Signature · 10 lines

Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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