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pinctrl: cannonlake: Fix gpio base for GPP-E

PATCH In review Simon Detheridge 3 participants 3 messages Sep 15, 2018 – Sep 18, 2018

Subsystems (3)
GPIO Pin control Pin controller - Intel
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Simon Detheridge

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PATCH 1/1 pinctrl: cannonlake: Fix gpio base for GPP-E

The gpio base for GPP-E was set incorrectly to 258 instead of 256, preventing the touchpad working on my Tong Fang GK5CN5Z laptop.

Buglink https://bugzilla.kernel.org/show_bug.cgi?id=200787
Signed-off-by Simon Detheridge <[email protected]>
---
 drivers/pinctrl/intel/pinctrl-cannonlake.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pinctrl/intel/pinctrl-cannonlake.c +1 -1
index fb1afe55bf53..8d48371caaa2 100644
@@ -379,7 +379,7 @@ static const struct intel_padgroup cnlh_community1_gpps[] = {
 static const struct intel_padgroup cnlh_community3_gpps[] = {
 	CNL_GPP(0, 155, 178, 192),		/* GPP_K */
 	CNL_GPP(1, 179, 202, 224),		/* GPP_H */
-	CNL_GPP(2, 203, 215, 258),		/* GPP_E */
+	CNL_GPP(2, 203, 215, 256),		/* GPP_E */
 	CNL_GPP(3, 216, 239, 288),		/* GPP_F */
 	CNL_GPP(4, 240, 248, CNL_NO_GPIO),	/* SPI */
 };
Signature · 1 line
2.16.4