sf: Add auto detection of 4-byte mode (vs standard 3-byte mode)
PATCH v2 1/1 sf: Add auto detection of 4-byte mode (vs standard 3-byte mode)
Some SPI NOR chips only support 4-byte mode addressing. Here the default 3-byte mode does not work and leads to incorrect accesses. This patch now reads the 4-byte mode status bit (in this case in the CR register of the Macronix SPI NOR) and configures the SPI transfers accordingly.
This was noticed on the LinkIt Smart 7688 modul, which is equipped with an Macronix MX25L25635F device. But this device does *NOT* support switching to 3-byte mode via the EX4B command.
This should also work when the bootrom configures the SPI flash to 4-byte mode and runs U-Boot after this. U-Boot should dectect this mode (if the 4-byte mode detection is available for this chip) and use the correct OPs in this case.
---
v2:
- Integrated STMICRO 4-byte detection from Simon
drivers/mtd/spi/sf_internal.h | 3 +- drivers/mtd/spi/spi_flash.c | 131 ++++++++++++++++++++++++++++------ include/spi_flash.h | 5 ++ 3 files changed, 118 insertions(+), 21 deletions(-)
drivers/mtd/spi/sf_internal.h +2 -1
@@ -26,7 +26,8 @@ enum spi_nor_option_flags { };#define SPI_FLASH_3B_ADDR_LEN 3 -#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN) +#define SPI_FLASH_4B_ADDR_LEN 4 +#define SPI_FLASH_CMD_MAX_LEN (1 + SPI_FLASH_4B_ADDR_LEN)#define SPI_FLASH_16MB_BOUN 0x1000000/* CFI Manufacture ID's */
drivers/mtd/spi/spi_flash.c +111 -20
221 lines not on this page · raw message
include/spi_flash.h +5 -0
@@ -36,6 +36,8 @@ struct spi_slave;* @dual_flash: Indicates dual flash memories - dual stacked, parallel * @shift: Flash shift useful in dual parallel * @flags: Indication of spi flash flags +* @in_4byte_mode: True if flash is detected to be in 4-byte mode +* @cmdlen: CMD length (3-byte vs 4-byte mode) * @size: Total flash size * @page_size: Write (page) size * @sector_size: Sector size
@@ -69,6 +71,9 @@ struct spi_flash {u8 shift;u16 flags; +bool in_4byte_mode; +int cmdlen; +u32 size;u32 page_size;u32 sector_size;
Signature · 1 line
2.19.1