mmc: tmio: Fix reset operation

From: Niklas Söderlund <[email protected]>

Hi,

While looking at the Renesas BSP kernel I found patches which improves the state of the hardware at probe and after runtime resume.

Patch 1/3 make sure the module clock is enabled after resuming before register are accessed. Patch 2/3 is the real change in this series and brings in reset of the vendor specific callback when resetting (SCC in the Renesas case). While 3/3 simply make sure that the IRQ mask for Renesas boards (Gen2 and later) are in a good shape after probe (and reset).

In addition to addressing the state after resuming it helped unbreak a SD card I have which are very problematic on Koelsch. Without this series inserting the card results in:

sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19) sh_mobile_sdhi ee100000.sd: Tuning procedure failed
mmc0: tuning execution failed: -5
mmc0: error -5 whilst initialising SD card
sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19)

While with this series applied (patch 2/3):

sh_mobile_sdhi ee100000.sd: timeout waiting for hardware interrupt (CMD19)
mmc0: new ultra high speed SDR50 SDHC card at address aaaa
mmcblk0: mmc0:aaaa SU04G 3.69 GiB
mmcblk0: p1 p2

Patch 1/3 was previously part of 2/3 but as it deals with a unrelated issue it's here broken out to a separate patch. Patch 3/3 have once been posted outside this series bit after comments from Wolfram it's brought back as it now deepens on 2/3.

Most changes in this series are based on similar work from Masaharu Hayakawa but for this version all changes now differ quiet a lot from his work. All mails sent to him bounce with a "Undelivered Mail Returned to Sender" error. I therefor felt the need to claim authorship as I don't want to post blame of my (potential) mistakes on some else.

Niklas Söderlund (3):
mmc: tmio: enable module clock before resetting when resuming
mmc: tmio: fix reset operation
mmc: renesas_sdhi: add initial setting of interrupt mask register

 drivers/mmc/host/renesas_sdhi_core.c |  4 ++++
 drivers/mmc/host/tmio_mmc.h          |  1 +
 drivers/mmc/host/tmio_mmc_core.c     | 22 ++++++++++------------
 3 files changed, 15 insertions(+), 12 deletions(-)

2.19.1

From: Niklas Söderlund <[email protected]>

On runtime power management resume, the host clock needs to be enabled before calling tmio_mmc_reset. If the mmc device has a power domain entry, the host clock is enabled via genpd_runtime_resume, running before tmio_mmc_host_runtime_resume. If the mmc device has no power domain entry, however, genpd_runtime_resume is not called. This patch changes tmio_mmc_host_runtime_resume to enable the host clock before calling tmio_mmc_reset.

Based on work from Masaharu Hayakawa.

---
 drivers/mmc/host/tmio_mmc_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

index f05c3a622f090cd6..71d3b380760d425f 100644
@@ -1330,8 +1330,8 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
 {
 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
 
-	tmio_mmc_reset(host);
 	tmio_mmc_clk_enable(host);
+	tmio_mmc_reset(host);
 
 	if (host->clk_cache)
 		host->set_clock(host, host->clk_cache);

2.19.1

Basically a good change, but needs also to be rebased.

From: Niklas Söderlund <[email protected]>

SD / MMC did not operate properly when suspend transition failed. Because the SCC was not reset at resume, issue of the command failed. Merge tmio_mmc_reset() into tmio_mmc_hw_reset() in order to add reset of SCC to tmio_mmc_host_runtime_resume().

Based on work from Masaharu Hayakawa.

---
* Changes sine v1
- Merge tmio_mmc_reset() into tmio_mmc_hw_reset() as it's now the only caller.

---
 drivers/mmc/host/tmio_mmc_core.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

index 71d3b380760d425f..da7a5ceeeef0b7ae 100644
@@ -157,8 +157,10 @@ static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 	}
 }
 
-static void tmio_mmc_reset(struct tmio_mmc_host *host)
+static void tmio_mmc_hw_reset(struct mmc_host *mmc)
 {
+	struct tmio_mmc_host *host = mmc_priv(mmc);
+
 	/* FIXME - should we set stop clock reg here */
 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
 	if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)

@@ -174,6 +176,10 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
 	}
 
+	tmio_mmc_abort_dma(host);
+
+	if (host->hw_reset)
+		host->hw_reset(host);
 }
 
 static void tmio_mmc_reset_work(struct work_struct *work)

@@ -214,7 +220,7 @@ static void tmio_mmc_reset_work(struct work_struct *work)
 
 	spin_unlock_irqrestore(&host->lock, flags);
 
-	tmio_mmc_reset(host);
+	tmio_mmc_hw_reset(host->mmc);
 
 	/* Ready for new calls */
 	host->mrq = NULL;

@@ -701,14 +707,6 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host,
 	return 0;
 }
 
-static void tmio_mmc_hw_reset(struct mmc_host *mmc)
-{
-	struct tmio_mmc_host *host = mmc_priv(mmc);
-
-	if (host->hw_reset)
-		host->hw_reset(host);
-}
-
 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
 {
 	struct tmio_mmc_host *host = mmc_priv(mmc);

@@ -1230,7 +1228,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
 
 	_host->set_clock(_host, 0);
-	tmio_mmc_reset(_host);
+	tmio_mmc_hw_reset(mmc);
 
 	_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
 	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);

@@ -1331,7 +1329,7 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
 
 	tmio_mmc_clk_enable(host);
-	tmio_mmc_reset(host);
+	tmio_mmc_hw_reset(host->mmc);
 
 	if (host->clk_cache)
 		host->set_clock(host, host->clk_cache);

2.19.1

This needs to be rebased on top of mmc/next because Yamada-san introduced a new hook for reset. Hmm, I thought I mentioned that before but can't recall where :(

From: Niklas Söderlund <[email protected]>

The initial value of the interrupt mask register may be different from the H/W manual at the startup of the kernel by setting from the bootloader. Since the error interrupts may be unmasked, the driver sets initial value.

The initial value is only known for R-Car Gen2 and Gen3 platforms so limit the initialization to those platforms.

Based on work from Masaharu Hayakawa.

---

* Changes since v1
- Limit the initialization to Gen2+ platforms by checking the TMIO_MMC_MIN_RCAR2 flag.
- Rename the constant for the initialization value to reflect it's only for R-Car Gen2+ platforms.
- Move setting of the initial mask to renesas_sdhi.

---
 drivers/mmc/host/renesas_sdhi_core.c | 4 ++++
 drivers/mmc/host/tmio_mmc.h          | 1 +
 2 files changed, 5 insertions(+)

index d3ac43c3d0b655dc..f2162f2b7de3ae05 100644
@@ -532,6 +532,10 @@ static void renesas_sdhi_hw_reset(struct tmio_mmc_host *host)
 	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
 		       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
 		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
+
+	if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
+		sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK,
+					     TMIO_MASK_INIT_RCAR2);
 }
 
 static int renesas_sdhi_wait_idle(struct tmio_mmc_host *host, u32 bit)

index a9972dc60c6fbb8c..00673cec47a4de13 100644
@@ -99,6 +99,7 @@
 
 /* Define some IRQ masks */
 /* This is the mask used at reset by the chip */
+#define TMIO_MASK_INIT_RCAR2	0x8b7f031d /* Initial value for R-Car Gen2+ */
 #define TMIO_MASK_ALL           0x837f031d
 #define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)

2.19.1

Hi Niklas,

Nice!

Can you please check if this fixes the similar issue on Magnus' ALT? My (old, latest is v4.15) logs show the same timeout, but with errors 84 (EILSEQ)
or 110 (ETIMEDOUT) instead of 5 (EIO).

Thanks!

Gr{oetje,eeting}s,

Geert

Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

We will have an Alt in Edinburgh which also showed such messages.