drm/i915/icl: Fix combo PHY HW context loss
Subsystems (2)
v2 cover drm/i915/icl: Fix combo PHY HW context loss
This is v2 of https://patchwork.freedesktop.org/series/51970/ addressing Rodrigo's and Jose's comments.
Imre Deak (5):
drm/i915/icl: Fix combo PHY uninit
drm/i915/cnl+: Move the combo PHY init/uninit code to a new file drm/i915/cnl+: Verify combo PHY HW state during PHY uninit drm/i915/icl: Skip init for an already enabled combo PHY drm/i915/icl: Fix port B combo PHY context loss after DC transitions
drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 + drivers/gpu/drm/i915/intel_combo_phy.c | 246 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 131 +++-------------- 4 files changed, 269 insertions(+), 115 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_combo_phy.c
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2.13.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH v2 1/5 drm/i915/icl: Fix combo PHY uninit
BSpec says to clear the comp init HW flag too during combo PHY uninit, so do that. The lack of this could badly interact with the PHY reinit after a DC6/9 transition at least, where (after a follow-up patch fixing the init code) we'd skip the initialization incorrectly due to this flag being set.
BSpec: 21257
--- drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/gpu/drm/i915/intel_runtime_pm.c +4 -0
@@ -3668,6 +3668,10 @@ void icl_display_core_uninit(struct drm_i915_private *dev_priv) val =I915_READ (ICL_PHY_MISC (port)); val |=ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ;I915_WRITE (ICL_PHY_MISC (port), val); + + val =I915_READ (ICL_PORT_COMP_DW0 (port)); + val &= ~COMP_INIT ; +I915_WRITE (ICL_PORT_COMP_DW0 (port), val); } }
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2.13.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [PATCH v2 1/5] drm/i915/icl: Fix combo PHY uninit
Quoted 9 lines · Imre Deak
BSpec says to clear the comp init HW flag too during combo PHY uninit,
so do that. The lack of this could badly interact with the PHY reinit after a DC6/9 transition at least, where (after a follow-up patch fixing
the init code) we'd skip the initialization incorrectly due to this flag
being set.
Quoted 3 lines
BSpec: 21257
Cc: Paulo Zanoni <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Quoted 14 lines
Cc José Roberto de Souza <[email protected]>Cc Rodrigo Vivi <[email protected]Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++++ 1 file changed, 4 insertions(+)drivers/gpu/drm/i915/intel_runtime_pm.c +0
-0
drivers/gpu/drm/i915/intel_runtime_pm.c void icl_display_core_uninit(struct · line 3677
Quoted 10 lines
drivers/gpu/drm/i915/intel_runtime_pm.c +4
-0@@ -3668,6 +3668,10 @@ void icl_display_core_uninit(struct drm_i915_private *dev_priv) val =I915_READ (ICL_PHY_MISC (port)); val |=ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ;I915_WRITE (ICL_PHY_MISC (port), val); + + val =I915_READ (ICL_PORT_COMP_DW0 (port)); + val &= ~COMP_INIT ; +I915_WRITE (ICL_PORT_COMP_DW0 (port), val); } }
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PATCH v2 2/5 drm/i915/cnl+: Move the combo PHY init/uninit code to a new file
In reply to Imre DeakSimilarly to the GEN9_LP DPIO PHY code keep the CNL+ combo PHY code in a separate file.
No functional change.
v2:
- Use SPDX license tag instead of boilerplate. (Rodrigo)
--- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/intel_combo_phy.c | 141 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 127 ++-------------------------- 4 files changed, 156 insertions(+), 119 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_combo_phy.c
drivers/gpu/drm/i915/Makefile +1 -0
@@ -113,6 +113,7 @@ i915-y += intel_audio.o \ intel_bios.o \ intel_cdclk.o \ intel_color.o \ + intel_combo_phy.o \ intel_connector.o \ intel_display.o \ intel_dpio_phy.o \
drivers/gpu/drm/i915/i915_drv.h +6 -0
@@ -3571,6 +3571,12 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder,void vlv_phy_reset_lanes (struct intel_encoder *encoder,const struct intel_crtc_state *old_crtc_state); +/* intel_combo_phy.c */ +void icl_combo_phys_init (struct drm_i915_private *dev_priv); +void icl_combo_phys_uninit (struct drm_i915_private *dev_priv); +void cnl_combo_phys_init (struct drm_i915_private *dev_priv); +void cnl_combo_phys_uninit (struct drm_i915_private *dev_priv); +int intel_gpu_freq (struct drm_i915_private *dev_priv,int val);int intel_freq_opcode (struct drm_i915_private *dev_priv,int val); u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
drivers/gpu/drm/i915/intel_combo_phy.c new file +141 -0
141 lines not on this page · raw message
drivers/gpu/drm/i915/intel_runtime_pm.c +8 -119
179 lines not on this page · raw message
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2.13.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [PATCH v2 2/5] drm/i915/cnl+: Move the combo PHY init/uninit code to a new file
Quoted 58 lines · Imre Deak
Similarly to the
GEN9_LPDPIO PHY code keep the CNL+ combo PHY code in a separate file.No functional change.
v2:
- Use SPDX license tag instead of boilerplate. (Rodrigo)Suggested-by Ville Syrjälä <[email protected]>Cc Paulo Zanoni <[email protected]>Cc Ville Syrjälä <[email protected]>Cc José Roberto de Souza <[email protected]>Cc Rodrigo Vivi <[email protected]>Signed-off-by Imre Deak <[email protected]>Reviewed-by Rodrigo Vivi <[email protected]>--- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/intel_combo_phy.c | 141 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 127 ++-------------------------- 4 files changed, 156 insertions(+), 119 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_combo_phy.cdrivers/gpu/drm/i915/Makefile +1
-0@@ -113,6 +113,7 @@ i915-y += intel_audio.o \ intel_bios.o \ intel_cdclk.o \ intel_color.o \ + intel_combo_phy.o \ intel_connector.o \ intel_display.o \ intel_dpio_phy.o \drivers/gpu/drm/i915/i915_drv.h +6
-0@@ -3571,6 +3571,12 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder,void vlv_phy_reset_lanes (struct intel_encoder *encoder,const struct intel_crtc_state *old_crtc_state); +/* intel_combo_phy.c */ +void icl_combo_phys_init (struct drm_i915_private *dev_priv); +void icl_combo_phys_uninit (struct drm_i915_private *dev_priv); +void cnl_combo_phys_init (struct drm_i915_private *dev_priv); +void cnl_combo_phys_uninit (struct drm_i915_private *dev_priv); +int intel_gpu_freq (struct drm_i915_private *dev_priv,int val);int intel_freq_opcode (struct drm_i915_private *dev_priv,int val); u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,drivers/gpu/drm/i915/intel_combo_phy.c new file +0
-0
drivers/gpu/drm/i915/intel_combo_phy.c line 1
Quoted 1 line
drivers/gpu/drm/i915/intel_combo_phy.c new file +1
-0@@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0
MIT
Quoted 4 lines
drivers/gpu/drm/i915/intel_combo_phy.c new file +4
-0+/* +* Copyright © 2018 Intel Corporation +*/ +
Signature · 6 lines
Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [PATCH v2 2/5] drm/i915/cnl+: Move the combo PHY init/uninit code to a new file
Quoted 54 lines · Ville Syrjälä
Quoted 53 lines · Imre Deak
Similarly to the
GEN9_LPDPIO PHY code keep the CNL+ combo PHY code in a separate file.No functional change.
v2:
- Use SPDX license tag instead of boilerplate. (Rodrigo)Suggested-by Ville Syrjälä <[email protected]>Cc Paulo Zanoni <[email protected]>Cc Ville Syrjälä <[email protected]>Cc José Roberto de Souza <[email protected]>Cc Rodrigo Vivi <[email protected]>Signed-off-by Imre Deak <[email protected]>Reviewed-by Rodrigo Vivi <[email protected]>--- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/intel_combo_phy.c | 141 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 127 ++-------------------------- 4 files changed, 156 insertions(+), 119 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_combo_phy.cdrivers/gpu/drm/i915/Makefile +1
-0@@ -113,6 +113,7 @@ i915-y += intel_audio.o \ intel_bios.o \ intel_cdclk.o \ intel_color.o \ + intel_combo_phy.o \ intel_connector.o \ intel_display.o \ intel_dpio_phy.o \drivers/gpu/drm/i915/i915_drv.h +6
-0@@ -3571,6 +3571,12 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder,void vlv_phy_reset_lanes (struct intel_encoder *encoder,const struct intel_crtc_state *old_crtc_state); +/* intel_combo_phy.c */ +void icl_combo_phys_init (struct drm_i915_private *dev_priv); +void icl_combo_phys_uninit (struct drm_i915_private *dev_priv); +void cnl_combo_phys_init (struct drm_i915_private *dev_priv); +void cnl_combo_phys_uninit (struct drm_i915_private *dev_priv); +int intel_gpu_freq (struct drm_i915_private *dev_priv,int val);int intel_freq_opcode (struct drm_i915_private *dev_priv,int val); u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,drivers/gpu/drm/i915/intel_combo_phy.c +0
-0
Quoted 8 lines
drivers/gpu/drm/i915/intel_combo_phy.c line 1
Quoted 6 lines
new file mode 100644
index 000000000000..8dd0a3c68f01drivers/gpu/drm/i915/intel_combo_phy.c new file +1
-0@@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 MIT
Err, will change that. So as you explained the driver in general is MIT licensed, and also the license text boilerplate I replaced is the MIT one.
Quoted 9 lines
Quoted 5 lines
drivers/gpu/drm/i915/intel_combo_phy.c new file +4
-0+/* +* Copyright © 2018 Intel Corporation +*/ +Signature · 2 lines
Ville Syrjälä Intel
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Re: [PATCH v2 2/5] drm/i915/cnl+: Move the combo PHY init/uninit code to a new file
In reply to Imre DeakQuoted 4 lines · Imre Deak
Similarly to the
GEN9_LPDPIO PHY code keep the CNL+ combo PHY code in a
separate file.
Quoted 8 lines
No functional change.
v2:
- Use SPDX license tag instead of boilerplate. (Rodrigo)Suggested-by Ville Syrjälä <[email protected]>Cc Paulo Zanoni <[email protected]>Cc Ville Syrjälä <[email protected]>
Quoted 415 lines
Cc José Roberto de Souza <[email protected]>Cc Rodrigo Vivi <[email protected]>Signed-off-by Imre Deak <[email protected]>Reviewed-by Rodrigo Vivi <[email protected]>--- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/intel_combo_phy.c | 141 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 127 ++------------------ -------- 4 files changed, 156 insertions(+), 119 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_combo_phy.cdrivers/gpu/drm/i915/Makefile +1
-0@@ -113,6 +113,7 @@ i915-y += intel_audio.o \ intel_bios.o \ intel_cdclk.o \ intel_color.o \ + intel_combo_phy.o \ intel_connector.o \ intel_display.o \ intel_dpio_phy.o \drivers/gpu/drm/i915/i915_drv.h +6
-0@@ -3571,6 +3571,12 @@ void vlv_phy_pre_encoder_enable(structintel_encoder *encoder, void vlv_phy_reset_lanes(struct intel_encoder *encoder,const struct intel_crtc_state *old_crtc_state); +/* intel_combo_phy.c */ +void icl_combo_phys_init (struct drm_i915_private *dev_priv); +void icl_combo_phys_uninit (struct drm_i915_private *dev_priv); +void cnl_combo_phys_init (struct drm_i915_private *dev_priv); +void cnl_combo_phys_uninit (struct drm_i915_private *dev_priv); +int intel_gpu_freq (struct drm_i915_private *dev_priv,int val);int
intel_freq_opcode(struct drm_i915_private *dev_priv, int val); u64 intel_rc6_residency_ns(structdrm_i915_private*dev_priv,drivers/gpu/drm/i915/intel_combo_phy.c new file +20
-0@@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* +* Copyright © 2018 Intel Corporation +*/ + +#include "intel_drv.h" + +enum { +PROCMON_0_85V_DOT_0 , +PROCMON_0_95V_DOT_0 , +PROCMON_0_95V_DOT_1 , +PROCMON_1_05V_DOT_0 , +PROCMON_1_05V_DOT_1 , +}; + +static const struct cnl_procmon { +u32 dw1, dw9, dw10; +} cnl_procmon_values[] = { + [PROCMON_0_85V_DOT_0 ] = + { .dw1 = 0x00000000, .dw9 = 0x62AB67BB, .dw10 =
0x51914F96, },drivers/gpu/drm/i915/intel_combo_phy.c new file +2
-0+ [PROCMON_0_95V_DOT_0 ] = + { .dw1 = 0x00000000, .dw9 = 0x86E172C7, .dw10 =
0x77CA5EAB, },drivers/gpu/drm/i915/intel_combo_phy.c new file +2
-0+ [PROCMON_0_95V_DOT_1 ] = + { .dw1 = 0x00000000, .dw9 = 0x93F87FE1, .dw10 =
0x8AE871C5, },drivers/gpu/drm/i915/intel_combo_phy.c new file +2
-0+ [PROCMON_1_05V_DOT_0 ] = + { .dw1 = 0x00000000, .dw9 = 0x98FA82DD, .dw10 =
0x89E46DC1, },drivers/gpu/drm/i915/intel_combo_phy.c new file +2
-0+ [PROCMON_1_05V_DOT_1 ] = + { .dw1 = 0x00440000, .dw9 = 0x9A00AB25, .dw10 =
0x8AE38FF1, },drivers/gpu/drm/i915/intel_combo_phy.c new file +4
-0+}; + +/* +* CNL has just one set of registers, while ICL has two sets: one for port A and
+ * the other for port B. The CNL registers are equivalent to the ICL port A
+ * registers, that's why we call the ICL macros even though the function has CNL
+ * on its name.
+ */
+static void cnl_set_procmon_ref_values(structdrm_i915_private*dev_priv,drivers/gpu/drm/i915/intel_combo_phy.c new file +45
-0+ enum port port) +{ +const struct cnl_procmon *procmon; +u32 val; + + val =I915_READ (ICL_PORT_COMP_DW3 (port)); +switch (val & (PROCESS_INFO_MASK |VOLTAGE_INFO_MASK )) { +default : +MISSING_CASE (val); +/* fall through */ +case VOLTAGE_INFO_0_85V |PROCESS_INFO_DOT_0 : + procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0 ]; +break ; +case VOLTAGE_INFO_0_95V |PROCESS_INFO_DOT_0 : + procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_0 ]; +break ; +case VOLTAGE_INFO_0_95V |PROCESS_INFO_DOT_1 : + procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_1 ]; +break ; +case VOLTAGE_INFO_1_05V |PROCESS_INFO_DOT_0 : + procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_0 ]; +break ; +case VOLTAGE_INFO_1_05V |PROCESS_INFO_DOT_1 : + procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_1 ]; +break ; + } + + val =I915_READ (ICL_PORT_COMP_DW1 (port)); + val &= ~((0xff <<16 ) |0xff ); + val |= procmon->dw1; +I915_WRITE (ICL_PORT_COMP_DW1 (port), val); + +I915_WRITE (ICL_PORT_COMP_DW9 (port), procmon->dw9); +I915_WRITE (ICL_PORT_COMP_DW10 (port), procmon->dw10); +} + +void cnl_combo_phys_init (struct drm_i915_private *dev_priv) +{ +u32 val; + + val =I915_READ (CHICKEN_MISC_2 ); + val &= ~CNL_COMP_PWR_DOWN ; +I915_WRITE (CHICKEN_MISC_2 , val); + +/* Dummy PORT_A to get the correct CNL register from the ICL macro */
drivers/gpu/drm/i915/intel_combo_phy.c new file +59
-0+cnl_set_procmon_ref_values (dev_priv,PORT_A ); + + val =I915_READ (CNL_PORT_COMP_DW0 ); + val |=COMP_INIT ; +I915_WRITE (CNL_PORT_COMP_DW0 , val); + + val =I915_READ (CNL_PORT_CL1CM_DW5 ); + val |=CL_POWER_DOWN_ENABLE ; +I915_WRITE (CNL_PORT_CL1CM_DW5 , val); +} + +void cnl_combo_phys_uninit (struct drm_i915_private *dev_priv) +{ +u32 val; + + val =I915_READ (CHICKEN_MISC_2 ); + val |=CNL_COMP_PWR_DOWN ; +I915_WRITE (CHICKEN_MISC_2 , val); +} + +void icl_combo_phys_init (struct drm_i915_private *dev_priv) +{ +enum port port; + +for (port =PORT_A ; port <=PORT_B ; port++) { +u32 val; + + val =I915_READ (ICL_PHY_MISC (port)); + val &= ~ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ; +I915_WRITE (ICL_PHY_MISC (port), val); + +cnl_set_procmon_ref_values (dev_priv, port); + + val =I915_READ (ICL_PORT_COMP_DW0 (port)); + val |=COMP_INIT ; +I915_WRITE (ICL_PORT_COMP_DW0 (port), val); + + val =I915_READ (ICL_PORT_CL_DW5 (port)); + val |=CL_POWER_DOWN_ENABLE ; +I915_WRITE (ICL_PORT_CL_DW5 (port), val); + } +} + +void icl_combo_phys_uninit (struct drm_i915_private *dev_priv) +{ +enum port port; + +for (port =PORT_A ; port <=PORT_B ; port++) { +u32 val; + + val =I915_READ (ICL_PHY_MISC (port)); + val |=ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ; +I915_WRITE (ICL_PHY_MISC (port), val); + + val =I915_READ (ICL_PORT_COMP_DW0 (port)); + val &= ~COMP_INIT ; +I915_WRITE (ICL_PORT_COMP_DW0 (port), val); + } +}drivers/gpu/drm/i915/intel_runtime_pm.c +0
-25@@ -3436,99 +3436,18 @@ void bxt_display_core_uninit(struct drm_i915_private *dev_priv) usleep_range(10, 30); /* 10 us delay per Bspec */ } -enum { -PROCMON_0_85V_DOT_0 , -PROCMON_0_95V_DOT_0 , -PROCMON_0_95V_DOT_1 , -PROCMON_1_05V_DOT_0 , -PROCMON_1_05V_DOT_1 , -}; - -static const struct cnl_procmon { -u32 dw1, dw9, dw10; -} cnl_procmon_values[] = { - [PROCMON_0_85V_DOT_0 ] = - { .dw1 =0x00000000 , .dw9 =0x62AB67BB , .dw10 = 0x51914F96, }, - [PROCMON_0_95V_DOT_0 ] = - { .dw1 =0x00000000 , .dw9 =0x86E172C7 , .dw10 = 0x77CA5EAB, }, - [PROCMON_0_95V_DOT_1 ] = - { .dw1 =0x00000000 , .dw9 =0x93F87FE1 , .dw10 = 0x8AE871C5, }, - [PROCMON_1_05V_DOT_0 ] = - { .dw1 =0x00000000 , .dw9 =0x98FA82DD , .dw10 = 0x89E46DC1, }, - [PROCMON_1_05V_DOT_1 ] = - { .dw1 =0x00440000 , .dw9 =0x9A00AB25 , .dw10 = 0x8AE38FF1, }, -}; - -/* -* CNL has just one set of registers, while ICL has two sets: one for port A and
- * the other for port B. The CNL registers are equivalent to the ICL port A
- * registers, that's why we call the ICL macros even though the function has CNL
- * on its name.
- */
-static void cnl_set_procmon_ref_values(structdrm_i915_private*dev_priv,drivers/gpu/drm/i915/intel_runtime_pm.c +0
-36- enum port port) -{ -const struct cnl_procmon *procmon; -u32 val; - - val =I915_READ (ICL_PORT_COMP_DW3 (port)); -switch (val & (PROCESS_INFO_MASK |VOLTAGE_INFO_MASK )) { -default : -MISSING_CASE (val); -/* fall through */ -case VOLTAGE_INFO_0_85V |PROCESS_INFO_DOT_0 : - procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0 ]; -break ; -case VOLTAGE_INFO_0_95V |PROCESS_INFO_DOT_0 : - procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_0 ]; -break ; -case VOLTAGE_INFO_0_95V |PROCESS_INFO_DOT_1 : - procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_1 ]; -break ; -case VOLTAGE_INFO_1_05V |PROCESS_INFO_DOT_0 : - procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_0 ]; -break ; -case VOLTAGE_INFO_1_05V |PROCESS_INFO_DOT_1 : - procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_1 ]; -break ; - } - - val =I915_READ (ICL_PORT_COMP_DW1 (port)); - val &= ~((0xff <<16 ) |0xff ); - val |= procmon->dw1; -I915_WRITE (ICL_PORT_COMP_DW1 (port), val); - -I915_WRITE (ICL_PORT_COMP_DW9 (port), procmon->dw9); -I915_WRITE (ICL_PORT_COMP_DW10 (port), procmon->dw10); -} - static void cnl_display_core_init(struct drm_i915_private *dev_priv,bool resume)
{
structi915_power_domains*power_domains= &dev_priv-Quoted 1 line
power_domains;drivers/gpu/drm/i915/intel_runtime_pm.c +0
-7struct i915_power_well *well; -u32 val;gen9_set_dc_state (dev_priv,DC_STATE_DISABLE );/* 1. Enable PCH Reset Handshake */ intel_pch_reset_handshake (dev_priv, !HAS_PCH_NOP (dev_priv)); -/* 2. Enable Comp */ - val =I915_READ (CHICKEN_MISC_2 ); - val &= ~CNL_COMP_PWR_DOWN ; -I915_WRITE (CHICKEN_MISC_2 , val); - -/* Dummy PORT_A to get the correct CNL register from the ICL macro */
drivers/gpu/drm/i915/intel_runtime_pm.c +2
-11-cnl_set_procmon_ref_values (dev_priv,PORT_A ); - - val =I915_READ (CNL_PORT_COMP_DW0 ); - val |=COMP_INIT ; -I915_WRITE (CNL_PORT_COMP_DW0 , val); - -/* 3. */ - val =I915_READ (CNL_PORT_CL1CM_DW5 ); - val |=CL_POWER_DOWN_ENABLE ; -I915_WRITE (CNL_PORT_CL1CM_DW5 , val); +/* 2-3. */ +cnl_combo_phys_init (dev_priv);/* * 4. Enable Power Well 1 (PG1). @@ -3553,7 +3472,6 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) {struct i915_power_domains *power_domains = &dev_priv- >power_domains;struct i915_power_well *well; -u32 val;drivers/gpu/drm/i915/intel_runtime_pm.c +2
-4gen9_set_dc_state (dev_priv,DC_STATE_DISABLE );@@ -3577,10 +3495,8 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) usleep_range(10, 30); /* 10 us delay per Bspec */ -/* 5. Disable Comp */ - val =I915_READ (CHICKEN_MISC_2 ); - val |=CNL_COMP_PWR_DOWN ; -I915_WRITE (CHICKEN_MISC_2 , val); +/* 5. */ +cnl_combo_phys_uninit (dev_priv); }void icl_display_core_init(struct
drm_i915_private*dev_priv,drivers/gpu/drm/i915/intel_runtime_pm.c +2
-19@@ -3588,31 +3504,14 @@ void icl_display_core_init(struct drm_i915_private *dev_priv, {struct i915_power_domains *power_domains = &dev_priv- >power_domains;struct i915_power_well *well; -enum port port; -u32 val;gen9_set_dc_state (dev_priv,DC_STATE_DISABLE );/* 1. Enable PCH reset handshake. */ intel_pch_reset_handshake (dev_priv, !HAS_PCH_NOP (dev_priv)); -for (port =PORT_A ; port <=PORT_B ; port++) { -/* 2. Enable DDI combo PHY comp. */ - val =I915_READ (ICL_PHY_MISC (port)); - val &= ~ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ; -I915_WRITE (ICL_PHY_MISC (port), val); - -cnl_set_procmon_ref_values (dev_priv, port); - - val =I915_READ (ICL_PORT_COMP_DW0 (port)); - val |=COMP_INIT ; -I915_WRITE (ICL_PORT_COMP_DW0 (port), val); - -/* 3. Set power down enable. */ - val =I915_READ (ICL_PORT_CL_DW5 (port)); - val |=CL_POWER_DOWN_ENABLE ; -I915_WRITE (ICL_PORT_CL_DW5 (port), val); - } +/* 2-3. */ +icl_combo_phys_init (dev_priv);drivers/gpu/drm/i915/intel_runtime_pm.c +0
-2/* * 4. Enable Power Well 1 (PG1). @@ -3640,8 +3539,6 @@ void icl_display_core_uninit(struct drm_i915_private *dev_priv) {struct i915_power_domains *power_domains = &dev_priv- >power_domains;struct i915_power_well *well; -enum port port; -u32 val;drivers/gpu/drm/i915/intel_runtime_pm.c +2
-10gen9_set_dc_state (dev_priv,DC_STATE_DISABLE );@@ -3663,16 +3560,8 @@ void icl_display_core_uninit(struct drm_i915_private *dev_priv)intel_power_well_disable (dev_priv ,well );mutex_unlock (&power_domains->lock); -/* 5. Disable Comp */ -for (port =PORT_A ; port <=PORT_B ; port++) { - val =I915_READ (ICL_PHY_MISC (port)); - val |=ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ; -I915_WRITE (ICL_PHY_MISC (port), val); - - val =I915_READ (ICL_PORT_COMP_DW0 (port)); - val &= ~COMP_INIT ; -I915_WRITE (ICL_PORT_COMP_DW0 (port), val); - } +/* 5. */ +icl_combo_phys_uninit (dev_priv); }
Quoted 1 line
static void
chv_phy_control_init(struct drm_i915_private *dev_priv)
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PATCH v2 3/5 drm/i915/cnl+: Verify combo PHY HW state during PHY uninit
In reply to Imre DeakVerify on CNL, ICL that the combo PHY HW state stayed intact after PHY initialization.
v2:
- Print 'Port X' as we do elsewhere instead of 'Port-X'. (Jose)
--- drivers/gpu/drm/i915/intel_combo_phy.c | 103 ++++++++++++++++++++++++++++++++- 1 file changed, 101 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/intel_combo_phy.c +101 -2
@@ -34,8 +34,8 @@ static const struct cnl_procmon {* registers, that's why we call the ICL macros even though the function has CNL * on its name. */ -static void cnl_set_procmon_ref_values (struct drm_i915_private *dev_priv, -enum port port) +static const struct cnl_procmon * +cnl_get_procmon_ref_values (struct drm_i915_private *dev_priv,enum port port) {const struct cnl_procmon *procmon;u32 val;
@@ -62,6 +62,17 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,break ; } +return procmon; +} + +static void cnl_set_procmon_ref_values (struct drm_i915_private *dev_priv, +enum port port) +{ +const struct cnl_procmon *procmon; +u32 val; + + procmon =cnl_get_procmon_ref_values (dev_priv, port); + val =I915_READ (ICL_PORT_COMP_DW1 (port)); val &= ~((0xff <<16 ) |0xff ); val |= procmon->dw1;
@@ -71,6 +82,63 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,I915_WRITE (ICL_PORT_COMP_DW10 (port), procmon->dw10); } +static bool check_phy_reg (struct drm_i915_private *dev_priv, +enum port port,i915_reg_t reg,u32 mask, +u32 expected_val) +{ +u32 val =I915_READ (reg); + +if ((val & mask) != expected_val) { +DRM_DEBUG_DRIVER ("Port %c combo PHY reg %08x state mismatch: " +"current %08x mask %08x expected %08x\n" , +port_name (port), + reg.reg, val, mask, expected_val); +return false; + } + +return true; +} + +static bool cnl_verify_procmon_ref_values (struct drm_i915_private *dev_priv, +enum port port) +{ +const struct cnl_procmon *procmon; +bool ret; + + procmon =cnl_get_procmon_ref_values (dev_priv, port); + + ret =check_phy_reg (dev_priv, port,ICL_PORT_COMP_DW1 (port), + (0xff <<16 ) |0xff , procmon->dw1); + ret &=check_phy_reg (dev_priv, port,ICL_PORT_COMP_DW9 (port), +-1U , procmon->dw9); + ret &=check_phy_reg (dev_priv, port,ICL_PORT_COMP_DW10 (port), +-1U , procmon->dw10); + +return ret; +} + +static bool cnl_combo_phy_enabled (struct drm_i915_private *dev_priv) +{ +return !(I915_READ (CHICKEN_MISC_2 ) &CNL_COMP_PWR_DOWN ) && + (I915_READ (CNL_PORT_COMP_DW0 ) &COMP_INIT ); +} + +static bool cnl_combo_phy_verify_state (struct drm_i915_private *dev_priv) +{ +enum port port =PORT_A ; +bool ret; + +if (!cnl_combo_phy_enabled (dev_priv)) +return false; + + ret =cnl_verify_procmon_ref_values (dev_priv, port); + + ret &=check_phy_reg (dev_priv, port,CNL_PORT_CL1CM_DW5 , +CL_POWER_DOWN_ENABLE ,CL_POWER_DOWN_ENABLE ); + +return ret; +} +void cnl_combo_phys_init (struct drm_i915_private *dev_priv) {u32 val;
@@ -95,11 +163,38 @@ void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv) {u32 val; +if (!cnl_combo_phy_verify_state (dev_priv)) +DRM_WARN ("Combo PHY HW state changed unexpectedly.\n" ); + val =I915_READ (CHICKEN_MISC_2 ); val |=CNL_COMP_PWR_DOWN ;I915_WRITE (CHICKEN_MISC_2 , val); } +static bool icl_combo_phy_enabled (struct drm_i915_private *dev_priv, +enum port port) +{ +return !(I915_READ (ICL_PHY_MISC (port)) & +ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ) && + (I915_READ (ICL_PORT_COMP_DW0 (port)) &COMP_INIT ); +} + +static bool icl_combo_phy_verify_state (struct drm_i915_private *dev_priv, +enum port port) +{ +bool ret; + +if (!icl_combo_phy_enabled (dev_priv, port)) +return false; + + ret =cnl_verify_procmon_ref_values (dev_priv, port); + + ret &=check_phy_reg (dev_priv, port,ICL_PORT_CL_DW5 (port), +CL_POWER_DOWN_ENABLE ,CL_POWER_DOWN_ENABLE ); + +return ret; +} +void icl_combo_phys_init (struct drm_i915_private *dev_priv) {enum port port;
@@ -130,6 +225,10 @@ void icl_combo_phys_uninit(struct drm_i915_private *dev_priv)for (port =PORT_A ; port <=PORT_B ; port++) {u32 val; +if (!icl_combo_phy_verify_state (dev_priv, port)) +DRM_WARN ("Port %c combo PHY HW state changed unexpectedly\n" , +port_name (port)); + val =I915_READ (ICL_PHY_MISC (port)); val |=ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ;I915_WRITE (ICL_PHY_MISC (port), val);
Signature · 6 lines
2.13.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [PATCH v2 3/5] drm/i915/cnl+: Verify combo PHY HW state during PHY uninit
Quoted 9 lines · Imre Deak
Verify on CNL, ICL that the combo PHY HW state stayed intact after PHY
initialization.v2:
- Print 'Port X' as we do elsewhere instead of 'Port-X'. (Jose)Cc Paulo Zanoni <[email protected]>Cc Ville Syrjälä <[email protected]>
Quoted 170 lines
Cc José Roberto de Souza <[email protected]>Cc Rodrigo Vivi <[email protected]>Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/intel_combo_phy.c | 103 ++++++++++++++++++++++++++++++++- 1 file changed, 101 insertions(+), 2 deletions(-)drivers/gpu/drm/i915/intel_combo_phy.c +0
-0@@ -34,8 +34,8 @@ static const struct cnl_procmon {* registers, that's why we call the ICL macros even though the function has CNL
* on its name.
*/
-static void cnl_set_procmon_ref_values(structdrm_i915_private*dev_priv,drivers/gpu/drm/i915/intel_combo_phy.c +2
-1- enum port port) +static const struct cnl_procmon * +cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enumport port)
{drivers/gpu/drm/i915/intel_combo_phy.c +11
-0const struct cnl_procmon *procmon;u32 val;@@ -62,6 +62,17 @@ static void cnl_set_procmon_ref_values(structdrm_i915_private *dev_priv, break; } +return procmon; +} + +static void cnl_set_procmon_ref_values (struct drm_i915_private *dev_priv, +enum port port) +{ +const struct cnl_procmon *procmon; +u32 val; + + procmon =cnl_get_procmon_ref_values (dev_priv, port); + val =I915_READ (ICL_PORT_COMP_DW1 (port));drivers/gpu/drm/i915/intel_combo_phy.c +8
-0val &= ~((0xff <<16 ) |0xff ); val |= procmon->dw1;@@ -71,6 +82,63 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,I915_WRITE (ICL_PORT_COMP_DW10 (port), procmon->dw10); } +static bool check_phy_reg (struct drm_i915_private *dev_priv, +enum port port,i915_reg_t reg,u32 mask, +u32 expected_val) +{ +u32 val =I915_READ (reg); + +if ((val & mask) != expected_val) { + DRM_DEBUG_DRIVER("Port %c combo PHY reg %08x statemismatch: "
drivers/gpu/drm/i915/intel_combo_phy.c +1
-0+ "current %08x mask %08x expected%08x\n",
drivers/gpu/drm/i915/intel_combo_phy.c +9
-0+port_name (port), + reg.reg, val, mask, expected_val); +return false; + } + +return true; +} + +static bool cnl_verify_procmon_ref_values(struct drm_i915_private
*dev_priv,drivers/gpu/drm/i915/intel_combo_phy.c +24
-0+ enum port port) +{ +const struct cnl_procmon *procmon; +bool ret; + + procmon =cnl_get_procmon_ref_values (dev_priv, port); + + ret =check_phy_reg (dev_priv, port,ICL_PORT_COMP_DW1 (port), + (0xff <<16 ) |0xff , procmon->dw1); + ret &=check_phy_reg (dev_priv, port,ICL_PORT_COMP_DW9 (port), +-1U , procmon->dw9); + ret &=check_phy_reg (dev_priv, port,ICL_PORT_COMP_DW10 (port), +-1U , procmon->dw10); + +return ret; +} + +static bool cnl_combo_phy_enabled (struct drm_i915_private *dev_priv) +{ +return !(I915_READ (CHICKEN_MISC_2 ) &CNL_COMP_PWR_DOWN ) && + (I915_READ (CNL_PORT_COMP_DW0 ) &COMP_INIT ); +} + +static bool cnl_combo_phy_verify_state(struct drm_i915_private
*dev_priv)drivers/gpu/drm/i915/intel_combo_phy.c +11
-0+{ +enum port port =PORT_A ; +bool ret; + +if (!cnl_combo_phy_enabled (dev_priv)) +return false; + + ret =cnl_verify_procmon_ref_values (dev_priv, port); + + ret &= check_phy_reg(dev_priv, port, CNL_PORT_CL1CM_DW5, + CL_POWER_DOWN_ENABLE,
CL_POWER_DOWN_ENABLE);drivers/gpu/drm/i915/intel_combo_phy.c +31
-0+ +return ret; +} +void cnl_combo_phys_init (struct drm_i915_private *dev_priv) {u32 val;@@ -95,11 +163,38 @@ void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv) {u32 val; +if (!cnl_combo_phy_verify_state (dev_priv)) +DRM_WARN ("Combo PHY HW state changed unexpectedly.\n" ); + val =I915_READ (CHICKEN_MISC_2 ); val |=CNL_COMP_PWR_DOWN ;I915_WRITE (CHICKEN_MISC_2 , val); } +static bool icl_combo_phy_enabled (struct drm_i915_private *dev_priv, +enum port port) +{ +return !(I915_READ (ICL_PHY_MISC (port)) & +ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ) && + (I915_READ (ICL_PORT_COMP_DW0 (port)) &COMP_INIT ); +} + +static bool icl_combo_phy_verify_state (struct drm_i915_private *dev_priv, +enum port port) +{ +bool ret; + +if (!icl_combo_phy_enabled (dev_priv, port)) +return false; + + ret =cnl_verify_procmon_ref_values (dev_priv, port); + + ret &=check_phy_reg (dev_priv, port,ICL_PORT_CL_DW5 (port), +CL_POWER_DOWN_ENABLE ,CL_POWER_DOWN_ENABLE ); + +return ret; +} +void
icl_combo_phys_init(struct drm_i915_private *dev_priv){drivers/gpu/drm/i915/intel_combo_phy.c +4
-0enum port port;@@ -130,6 +225,10 @@ void icl_combo_phys_uninit(struct drm_i915_private *dev_priv)for (port =PORT_A ; port <=PORT_B ; port++) {u32 val; +if (!icl_combo_phy_verify_state (dev_priv, port)) +DRM_WARN ("Port %c combo PHY HW state changed unexpectedly\n", +port_name (port)); + val =I915_READ (ICL_PHY_MISC (port));
drivers/gpu/drm/i915/intel_combo_phy.c void icl_combo_phys_uninit(struct drm_i915_private *dev_priv) · line 234
Quoted 2 lines
drivers/gpu/drm/i915/intel_combo_phy.c +0
-0val |=ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ;I915_WRITE (ICL_PHY_MISC (port), val);
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PATCH v2 4/5 drm/i915/icl: Skip init for an already enabled combo PHY
In reply to Imre DeakBspec says we should skip the initialization of combo PHYs that are already initialized. We'll need to reinit the PHYs more frequently when exiting from DC6 (after the next patch), so let's make sure the uninit sequence complies with the spec. For safety skip the init only if all the PHY register fields have their expected values.
v2:
- Print 'Port X' as we do elsewhere instead of 'Port-X'. (Jose)
Bspec: 21257
--- drivers/gpu/drm/i915/intel_combo_phy.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/gpu/drm/i915/intel_combo_phy.c +6 -0
@@ -202,6 +202,12 @@ void icl_combo_phys_init(struct drm_i915_private *dev_priv)for (port =PORT_A ; port <=PORT_B ; port++) {u32 val; +if (icl_combo_phy_verify_state (dev_priv, port)) { +DRM_DEBUG_DRIVER ("Port %c combo PHY already enabled, won't reprogram it.\n" , +port_name (port)); +continue ; + } + val =I915_READ (ICL_PHY_MISC (port)); val &= ~ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN ;I915_WRITE (ICL_PHY_MISC (port), val);
Signature · 6 lines
2.13.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH v2 5/5 drm/i915/icl: Fix port B combo PHY context loss after DC transitions
In reply to Imre DeakOn ICL DMC/PCODE retains the HW context only for port A across DC transitions, for the other port B combo PHY, it doesn't. So we need to do this manually after exiting from DC6. Do the reinit even after exiting from DC5, it won't hurt since we only reinit the PHY in case it's needed (in case it was disabled to begin with).
As can be guessed from the bugzilla report leaving the PHY uninited will lead to a later timeout during the port B specific AUX and DDI_IO power well enabling.
v2:
- Apply the fix on all GEN>=11 platforms. (Rodrigo)
Bspec: 21257
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070
--- drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++ 1 file changed, 8 insertions(+)
drivers/gpu/drm/i915/intel_runtime_pm.c +8 -0
@@ -843,6 +843,14 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,if (IS_GEN9_LP (dev_priv))bxt_verify_ddi_phy_power_wells (dev_priv); + +if (INTEL_GEN (dev_priv) >=11 ) +/* +* DMC retains HW context only for port A, the other combo +* PHY's HW context for port B is lost after DC transitions, +* so we need to restore it manually. +*/ +icl_combo_phys_init (dev_priv); } static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
Signature · 6 lines
2.13.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [PATCH v2 5/5] drm/i915/icl: Fix port B combo PHY context loss after DC transitions
Quoted 13 lines · Imre Deak
On ICL DMC/PCODE retains the HW context only for port A across DC transitions, for the other port B combo PHY, it doesn't. So we need to
do this manually after exiting from DC6. Do the reinit even after exiting from DC5, it won't hurt since we only reinit the PHY in case it's needed (in case it was disabled to begin with).As can be guessed from the bugzilla report leaving the PHY uninited will
lead to a later timeout during the port B specific AUX andDDI_IOpower
well enabling.
Quoted 7 lines
v2:
- Apply the fix on all GEN>=11 platforms. (Rodrigo)Bspec: 21257
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070
Cc: Paulo Zanoni <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Quoted 31 lines
Cc José Roberto de Souza <[email protected]>Cc Rodrigo Vivi <[email protected]>Signed-off-by Imre Deak <[email protected]>Reviewed-by Rodrigo Vivi <[email protected]>--- drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++ 1 file changed, 8 insertions(+)drivers/gpu/drm/i915/intel_runtime_pm.c +4
-0@@ -843,6 +843,14 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, if (IS_GEN9_LP(dev_priv)) bxt_verify_ddi_phy_power_wells(dev_priv); + +if (INTEL_GEN (dev_priv) >=11 ) +/* +* DMC retains HW context only for port A, the other combo
drivers/gpu/drm/i915/intel_runtime_pm.c +1
-0+* PHY's HW context for port B is lost after DC transitions,
drivers/gpu/drm/i915/intel_runtime_pm.c +3
-0+* so we need to restore it manually. +*/ +icl_combo_phys_init (dev_priv); } static void gen9_dc_off_power_well_disable(struct drm_i915_private
Quoted 1 line
*dev_priv,
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Patchwork
CI✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Fix combo PHY HW context loss (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip 8da27d26559f drm/i915/icl: Fix combo PHY uninit -:19: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'Rodrigo Vivi <[email protected]' #19: Cc: Rodrigo Vivi <[email protected]
total: 1 errors, 0 warnings, 0 checks, 10 lines checked8994b0680dd9 drm/i915/cnl+: Move the combo PHY init/uninit code to a new file -:56: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #56:
new file mode 100644
-:80: ERROR:OPEN_BRACE: that open brace { should be on the previous line #80: FILE: drivers/gpu/drm/i915/intel_combo_phy.c:20:
+ [PROCMON_0_85V_DOT_0] =
+ { .dw1 = 0x00000000, .dw9 = 0x62AB67BB, .dw10 = 0x51914F96, },
-:82: ERROR:OPEN_BRACE: that open brace { should be on the previous line #82: FILE: drivers/gpu/drm/i915/intel_combo_phy.c:22:
+ [PROCMON_0_95V_DOT_0] =
+ { .dw1 = 0x00000000, .dw9 = 0x86E172C7, .dw10 = 0x77CA5EAB, },
-:84: ERROR:OPEN_BRACE: that open brace { should be on the previous line #84: FILE: drivers/gpu/drm/i915/intel_combo_phy.c:24:
+ [PROCMON_0_95V_DOT_1] =
+ { .dw1 = 0x00000000, .dw9 = 0x93F87FE1, .dw10 = 0x8AE871C5, },
-:86: ERROR:OPEN_BRACE: that open brace { should be on the previous line #86: FILE: drivers/gpu/drm/i915/intel_combo_phy.c:26:
+ [PROCMON_1_05V_DOT_0] =
+ { .dw1 = 0x00000000, .dw9 = 0x98FA82DD, .dw10 = 0x89E46DC1, },
-:88: ERROR:OPEN_BRACE: that open brace { should be on the previous line #88: FILE: drivers/gpu/drm/i915/intel_combo_phy.c:28:
+ [PROCMON_1_05V_DOT_1] =
+ { .dw1 = 0x00440000, .dw9 = 0x9A00AB25, .dw10 = 0x8AE38FF1, },
total: 5 errors, 1 warnings, 0 checks, 339 lines checked 63f195491d16 drm/i915/cnl+: Verify combo PHY HW state during PHY uninit f8a27234d85e drm/i915/icl: Skip init for an already enabled combo PHY b07aa5a2f1dd drm/i915/icl: Fix port B combo PHY context loss after DC transitions
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Patchwork
CI✗ Fi.CI.SPARSE: warning for drm/i915/icl: Fix combo PHY HW context loss (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : warning
== Summary ==
$ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/icl: Fix combo PHY uninit Okay!
Commit: drm/i915/cnl+: Move the combo PHY init/uninit code to a new file -drivers/gpu/drm/i915/selftests/../i915_drv.h:3705:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3711:16: warning: expression using sizeof(void) +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
Commit: drm/i915/cnl+: Verify combo PHY HW state during PHY uninit Okay!
Commit: drm/i915/icl: Skip init for an already enabled combo PHY Okay!
Commit: drm/i915/icl: Fix port B combo PHY context loss after DC transitions Okay!
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Patchwork
CI✗ Fi.CI.BAT: failure for drm/i915/icl: Fix combo PHY HW context loss (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5096 -> Patchwork_10739 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10739 absolutely need to be verified manually.
If you think the reported changes have nothing to do with the changes introduced in Patchwork_10739, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/51970/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10739:
=== IGT changes ===
==== Possible regressions ====
igt@drv_module_reload@basic-no-display:
fi-byt-clapper: PASS -> WARN== Known issues ==
Here are the changes found in Patchwork_10739 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-reload:
fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718)
igt@drv_module_reload@basic-reload-inject:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-skl-6600u: PASS -> INCOMPLETE (fdo#104108)
==== Possible fixes ====
igt@drv_module_reload@basic-reload:
fi-glk-j4005: DMESG-WARN (fdo#106248, fdo#106725) -> PASS
igt@drv_module_reload@basic-reload-inject:
fi-byt-clapper: WARN (fdo#108688) -> PASS
igt@drv_selftest@live_contexts:
fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@pm_rpm@module-reload:
fi-byt-clapper: FAIL (fdo#108675) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626
fdo#108675 https://bugs.freedesktop.org/show_bug.cgi?id=108675
fdo#108688 https://bugs.freedesktop.org/show_bug.cgi?id=108688
== Participating hosts (51 -> 45) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5096 -> Patchwork_10739
CI_DRM_5096: 9dd45e92a3e9b238d044adde1061a8ee0ce24b73 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4711: cc41f4c921e56c62c85ec5349c47022ae9b5f008 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10739: b07aa5a2f1dde979ce2efcad860219eacff17618 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b07aa5a2f1dd drm/i915/icl: Fix port B combo PHY context loss after DC transitions f8a27234d85e drm/i915/icl: Skip init for an already enabled combo PHY 63f195491d16 drm/i915/cnl+: Verify combo PHY HW state during PHY uninit 8994b0680dd9 drm/i915/cnl+: Move the combo PHY init/uninit code to a new file 8da27d26559f drm/i915/icl: Fix combo PHY uninit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10739/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✗ Fi.CI.BAT: failure for drm/i915/icl: Fix combo PHY HW context loss (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5096 -> Patchwork_10739 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10739 absolutely need to be verified manually.
If you think the reported changes have nothing to do with the changes introduced in Patchwork_10739, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/51970/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10739:
=== IGT changes ===
==== Possible regressions ====
igt@drv_module_reload@basic-no-display:
fi-byt-clapper: PASS -> WARN== Known issues ==
Here are the changes found in Patchwork_10739 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-reload:
fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718)
igt@drv_module_reload@basic-reload-inject:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-skl-6600u: PASS -> INCOMPLETE (fdo#104108)
==== Possible fixes ====
igt@drv_module_reload@basic-reload:
fi-glk-j4005: DMESG-WARN (fdo#106725, fdo#106248) -> PASS
igt@drv_module_reload@basic-reload-inject:
fi-byt-clapper: WARN (fdo#108688) -> PASS
igt@drv_selftest@live_contexts:
fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@pm_rpm@module-reload:
fi-byt-clapper: FAIL (fdo#108675) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626
fdo#108675 https://bugs.freedesktop.org/show_bug.cgi?id=108675
fdo#108688 https://bugs.freedesktop.org/show_bug.cgi?id=108688
== Participating hosts (51 -> 45) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5096 -> Patchwork_10739
CI_DRM_5096: 9dd45e92a3e9b238d044adde1061a8ee0ce24b73 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4711: cc41f4c921e56c62c85ec5349c47022ae9b5f008 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10739: b07aa5a2f1dde979ce2efcad860219eacff17618 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b07aa5a2f1dd drm/i915/icl: Fix port B combo PHY context loss after DC transitions f8a27234d85e drm/i915/icl: Skip init for an already enabled combo PHY 63f195491d16 drm/i915/cnl+: Verify combo PHY HW state during PHY uninit 8994b0680dd9 drm/i915/cnl+: Move the combo PHY init/uninit code to a new file 8da27d26559f drm/i915/icl: Fix combo PHY uninit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10739/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for drm/i915/icl: Fix combo PHY HW context loss (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5096 -> Patchwork_10739 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/51970/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_10739 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-no-display:
fi-byt-clapper: PASS -> WARN (fdo#108688)
igt@drv_module_reload@basic-reload:
fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718)
igt@drv_module_reload@basic-reload-inject:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-skl-6600u: PASS -> INCOMPLETE (fdo#104108)
==== Possible fixes ====
igt@drv_module_reload@basic-reload:
fi-glk-j4005: DMESG-WARN (fdo#106725, fdo#106248) -> PASS
igt@drv_module_reload@basic-reload-inject:
fi-byt-clapper: WARN (fdo#108688) -> PASS
igt@drv_selftest@live_contexts:
fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@pm_rpm@module-reload:
fi-byt-clapper: FAIL (fdo#108675) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626
fdo#108675 https://bugs.freedesktop.org/show_bug.cgi?id=108675
fdo#108688 https://bugs.freedesktop.org/show_bug.cgi?id=108688
== Participating hosts (51 -> 45) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5096 -> Patchwork_10739
CI_DRM_5096: 9dd45e92a3e9b238d044adde1061a8ee0ce24b73 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4711: cc41f4c921e56c62c85ec5349c47022ae9b5f008 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10739: b07aa5a2f1dde979ce2efcad860219eacff17618 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b07aa5a2f1dd drm/i915/icl: Fix port B combo PHY context loss after DC transitions f8a27234d85e drm/i915/icl: Skip init for an already enabled combo PHY 63f195491d16 drm/i915/cnl+: Verify combo PHY HW state during PHY uninit 8994b0680dd9 drm/i915/cnl+: Move the combo PHY init/uninit code to a new file 8da27d26559f drm/i915/icl: Fix combo PHY uninit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10739/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for drm/i915/icl: Fix combo PHY HW context loss (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5096 -> Patchwork_10739 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/51970/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_10739 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-no-display:
fi-byt-clapper: PASS -> WARN (fdo#108688)
igt@drv_module_reload@basic-reload:
fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718)
igt@drv_module_reload@basic-reload-inject:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-skl-6600u: PASS -> INCOMPLETE (fdo#104108)
==== Possible fixes ====
igt@drv_module_reload@basic-reload:
fi-glk-j4005: DMESG-WARN (fdo#106248, fdo#106725) -> PASS
igt@drv_module_reload@basic-reload-inject:
fi-byt-clapper: WARN (fdo#108688) -> PASS
igt@drv_selftest@live_contexts:
fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@pm_rpm@module-reload:
fi-byt-clapper: FAIL (fdo#108675) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626
fdo#108675 https://bugs.freedesktop.org/show_bug.cgi?id=108675
fdo#108688 https://bugs.freedesktop.org/show_bug.cgi?id=108688
== Participating hosts (51 -> 45) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5096 -> Patchwork_10739
CI_DRM_5096: 9dd45e92a3e9b238d044adde1061a8ee0ce24b73 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4711: cc41f4c921e56c62c85ec5349c47022ae9b5f008 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10739: b07aa5a2f1dde979ce2efcad860219eacff17618 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b07aa5a2f1dd drm/i915/icl: Fix port B combo PHY context loss after DC transitions f8a27234d85e drm/i915/icl: Skip init for an already enabled combo PHY 63f195491d16 drm/i915/cnl+: Verify combo PHY HW state during PHY uninit 8994b0680dd9 drm/i915/cnl+: Move the combo PHY init/uninit code to a new file 8da27d26559f drm/i915/icl: Fix combo PHY uninit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10739/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: ✓ Fi.CI.BAT: success for drm/i915/icl: Fix combo PHY HW context loss (rev2)
Quoted 7 lines · Patchwork
== Series Details ==
Series: drm/i915/icl: Fix combo PHY HW context loss (rev2)
URL : https://patchwork.freedesktop.org/series/51970/
State : success== Summary ==
Thanks for the reviews, pushed to -dinq with the s/GPL-2.0/MIT/ change.
Quoted 84 lines
= CI Bug Log - changes from
CI_DRM_5096->Patchwork_10739=== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/51970/revisions/2/mbox/
== Known issues ==
Here are the changes found in
Patchwork_10739that come from known issues:=== IGT changes ===
==== Issues hit ==== igt@drv_module_reload@basic-no-display: fi-byt-clapper: PASS -> WARN (fdo#108688) igt@drv_module_reload@basic-reload: fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718) igt@drv_module_reload@basic-reload-inject: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-skl-6600u: PASS -> INCOMPLETE (fdo#104108) ==== Possible fixes ==== igt@drv_module_reload@basic-reload: fi-glk-j4005: DMESG-WARN (fdo#106248, fdo#106725) -> PASS igt@drv_module_reload@basic-reload-inject: fi-byt-clapper: WARN (fdo#108688) -> PASS igt@drv_selftest@live_contexts: fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS igt@gem_exec_suspend@basic-s3: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@pm_rpm@module-reload: fi-byt-clapper: FAIL (fdo#108675) -> PASSfdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626
fdo#108675 https://bugs.freedesktop.org/show_bug.cgi?id=108675
fdo#108688 https://bugs.freedesktop.org/show_bug.cgi?id=108688== Participating hosts (51 -> 45) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510
== Build changes ==
* Linux:
CI_DRM_5096->Patchwork_10739
CI_DRM_5096:9dd45e92a3e9b238d044adde1061a8ee0ce24b73@git://anongit.freedesktop.org/gfx-ci/linux
IGT_4711:cc41f4c921e56c62c85ec5349c47022ae9b5f008@git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10739:b07aa5a2f1dde979ce2efcad860219eacff17618@git://anongit.freedesktop.org/gfx-ci/linux== Linux commits ==
b07aa5a2f1dddrm/i915/icl: Fix port B combo PHY context loss after DC transitionsf8a27234d85edrm/i915/icl: Skip init for an already enabled combo PHY63f195491d16drm/i915/cnl+: Verify combo PHY HW state during PHY uninit8994b0680dd9drm/i915/cnl+: Move the combo PHY init/uninit code to a new file8da27d26559fdrm/i915/icl: Fix combo PHY uninit
Quoted 3 lines
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10739/issues.html
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx