ARM: dts: Kill off skeleton{64}.dtsi
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PATCH 1/1 ARM: dts: Kill off skeleton{64}.dtsi
Remove the usage of skeleton.dtsi in the remaining dts files. It was deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). This will make adding a unit-address to memory nodes easier.
The main tricky part to removing skeleton.dtsi is we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.
Signed-off-by Rob Herring <[email protected]>
---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies on skeleton.dtsi. So please apply directly to arm-soc.
Rob
arch/arm/boot/dts/alphascale-asm9260.dtsi | 3 ++- arch/arm/boot/dts/alpine.dtsi | 8 +++++++- arch/arm/boot/dts/arm-realview-eb.dtsi | 4 +++- arch/arm/boot/dts/arm-realview-pb1176.dts | 4 +++- arch/arm/boot/dts/arm-realview-pb11mp.dts | 4 +++- arch/arm/boot/dts/arm-realview-pbx.dtsi | 4 +++- arch/arm/boot/dts/armada-38x.dtsi | 4 +++- arch/arm/boot/dts/armada-39x.dtsi | 3 ++- arch/arm/boot/dts/artpec6.dtsi | 3 ++- arch/arm/boot/dts/at91rm9200.dtsi | 4 +++- arch/arm/boot/dts/at91sam9260.dtsi | 4 +++- arch/arm/boot/dts/at91sam9261.dtsi | 4 +++- arch/arm/boot/dts/at91sam9263.dtsi | 4 +++- arch/arm/boot/dts/at91sam9g45.dtsi | 4 +++- arch/arm/boot/dts/at91sam9n12.dtsi | 4 +++- arch/arm/boot/dts/at91sam9rl.dtsi | 4 +++- arch/arm/boot/dts/at91sam9x5.dtsi | 4 +++- arch/arm/boot/dts/atlas6-evb.dts | 1 + arch/arm/boot/dts/atlas6.dtsi | 1 - arch/arm/boot/dts/atlas7.dtsi | 1 - arch/arm/boot/dts/axm55xx.dtsi | 4 ++-- arch/arm/boot/dts/bcm-cygnus.dtsi | 9 +++++++-- arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++-- arch/arm/boot/dts/bcm11351.dtsi | 4 ++-- arch/arm/boot/dts/bcm21664-garnet.dts | 1 + arch/arm/boot/dts/bcm21664.dtsi | 4 ++-- arch/arm/boot/dts/bcm23550-sparrow.dts | 1 + arch/arm/boot/dts/bcm23550.dtsi | 4 ++-- arch/arm/boot/dts/bcm28155-ap.dts | 1 + arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 1 + .../boot/dts/bcm47081-tplink-archer-c5-v2.dts | 1 + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 + .../arm/boot/dts/bcm47094-linksys-panamera.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 1 + .../boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 1 + arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 1 + arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 1 + arch/arm/boot/dts/bcm5301x.dtsi | 3 ++- .../boot/dts/bcm53340-ubnt-unifi-switch8.dts | 1 + arch/arm/boot/dts/bcm53573.dtsi | 3 ++- arch/arm/boot/dts/bcm63138.dtsi | 4 ++-- arch/arm/boot/dts/bcm7445.dtsi | 2 -- arch/arm/boot/dts/bcm947189acdbmr.dts | 1 + arch/arm/boot/dts/bcm953012er.dts | 1 + arch/arm/boot/dts/bcm953012hr.dts | 1 + arch/arm/boot/dts/bcm953012k.dts | 1 + arch/arm/boot/dts/cx92755.dtsi | 4 ++-- arch/arm/boot/dts/dove.dtsi | 4 ++-- arch/arm/boot/dts/ep7209.dtsi | 4 ++-- arch/arm/boot/dts/ep7211-edb7211.dts | 1 + arch/arm/boot/dts/integrator.dtsi | 10 ++++++++-- arch/arm/boot/dts/kirkwood.dtsi | 3 ++- arch/arm/boot/dts/lpc32xx.dtsi | 4 ++-- arch/arm/boot/dts/ls1021a.dtsi | 8 +++++++- arch/arm/boot/dts/meson.dtsi | 3 ++- arch/arm/boot/dts/meson6-atv1200.dts | 1 + arch/arm/boot/dts/meson8-minix-neo-x8.dts | 1 + arch/arm/boot/dts/meson8b-ec100.dts | 1 + arch/arm/boot/dts/meson8b-mxq.dts | 1 + arch/arm/boot/dts/meson8b-odroidc1.dts | 1 + arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 1 + arch/arm/boot/dts/mmp2-brownstone.dts | 1 + arch/arm/boot/dts/mmp2.dtsi | 4 +++- arch/arm/boot/dts/moxart.dtsi | 3 ++- arch/arm/boot/dts/mt2701-evb.dts | 1 + arch/arm/boot/dts/mt2701.dtsi | 3 ++- arch/arm/boot/dts/mt6580-evbp1.dts | 1 + arch/arm/boot/dts/mt6580.dtsi | 1 - arch/arm/boot/dts/mt6589-aquaris5.dts | 1 + arch/arm/boot/dts/mt6589.dtsi | 3 ++- arch/arm/boot/dts/mt6592-evb.dts | 2 +- arch/arm/boot/dts/mt6592.dtsi | 3 ++- arch/arm/boot/dts/mt8127-moose.dts | 1 + arch/arm/boot/dts/mt8127.dtsi | 3 ++- arch/arm/boot/dts/mt8135-evbp1.dts | 1 + arch/arm/boot/dts/mt8135.dtsi | 3 ++- arch/arm/boot/dts/nspire.dtsi | 4 ++-- arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 1 + .../orion5x-lacie-ethernet-disk-mini-v2.dts | 1 + arch/arm/boot/dts/orion5x-lswsgl.dts | 1 + .../dts/orion5x-maxtor-shared-storage-2.dts | 1 + arch/arm/boot/dts/orion5x-netgear-wnr854t.dts | 1 + arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 1 + arch/arm/boot/dts/orion5x.dtsi | 4 ++-- arch/arm/boot/dts/ox810se.dtsi | 4 +++- arch/arm/boot/dts/ox820.dtsi | 4 +++- arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 1 - arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 1 - arch/arm/boot/dts/prima2-evb.dts | 1 + arch/arm/boot/dts/prima2.dtsi | 1 - arch/arm/boot/dts/pxa168.dtsi | 4 +++- arch/arm/boot/dts/pxa2xx.dtsi | 3 ++- arch/arm/boot/dts/pxa910.dtsi | 4 +++- arch/arm/boot/dts/qcom-apq8064.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-apq8084.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 1 + arch/arm/boot/dts/qcom-mdm9615.dtsi | 4 ++-- arch/arm/boot/dts/qcom-msm8660.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-msm8960.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-msm8974.dtsi | 8 +++++++- arch/arm/boot/dts/sama5d2.dtsi | 4 +++- arch/arm/boot/dts/sama5d3.dtsi | 4 +++- arch/arm/boot/dts/sama5d4.dtsi | 4 +++- arch/arm/boot/dts/skeleton.dtsi | 18 ------------------ arch/arm/boot/dts/skeleton64.dtsi | 14 -------------- arch/arm/boot/dts/spear13xx.dtsi | 4 ++-- arch/arm/boot/dts/spear3xx.dtsi | 4 ++-- arch/arm/boot/dts/spear600.dtsi | 4 ++-- arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 2 +- arch/arm/boot/dts/ste-u300.dts | 2 +- arch/arm/boot/dts/stm32429i-eval.dts | 1 + arch/arm/boot/dts/stm32746g-eval.dts | 1 + arch/arm/boot/dts/stm32f429-disco.dts | 1 + arch/arm/boot/dts/stm32f429.dtsi | 4 +++- arch/arm/boot/dts/stm32f469-disco.dts | 1 + arch/arm/boot/dts/stm32f746-disco.dts | 1 + arch/arm/boot/dts/stm32f746.dtsi | 4 +++- arch/arm/boot/dts/stm32f769-disco.dts | 1 + arch/arm/boot/dts/stm32h743.dtsi | 4 +++- arch/arm/boot/dts/stm32h743i-disco.dts | 1 + arch/arm/boot/dts/stm32h743i-eval.dts | 1 + arch/arm/boot/dts/stm32mp157c-ed1.dts | 1 + arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++-- arch/arm/boot/dts/sun5i-a13.dtsi | 4 ++-- arch/arm/boot/dts/sun5i.dtsi | 9 +++++++-- arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++-- arch/arm/boot/dts/sun7i-a20.dtsi | 5 +++-- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++-- arch/arm/boot/dts/sun8i-a23.dtsi | 1 + arch/arm/boot/dts/sun8i-a33.dtsi | 1 + arch/arm/boot/dts/versatile-ab.dts | 2 +- arch/arm/boot/dts/vt8500.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8505.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8650.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8750.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8850.dtsi | 9 +++++++-- arch/arm/boot/dts/zx296702-ad1.dts | 1 + arch/arm/boot/dts/zx296702.dtsi | 4 +++- 149 files changed, 330 insertions(+), 153 deletions(-) delete mode 100644 arch/arm/boot/dts/skeleton.dtsi delete mode 100644 arch/arm/boot/dts/skeleton64.dtsi
arch/arm/boot/dts/alphascale-asm9260.dtsi +2 -1
@@ -4,10 +4,11 @@ * Licensed under the X11 license or the GPL v2 (or later) */ -#include "skeleton.dtsi" #include <dt-bindings/clock/alphascale,asm9260.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&icoll>; memory {
arch/arm/boot/dts/alpine.dtsi +7 -1
@@ -25,12 +25,18 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton64.dtsi" / { + #address-cells = <2>; + #size-cells = <2>; /* SOC compatibility */ compatible = "al,alpine"; + memory { + device_type = "memory"; + reg = <0 0 0 0>; + }; + /* CPU Configuration */ cpus { #address-cells = <1>;
arch/arm/boot/dts/arm-realview-eb.dtsi +3 -1
@@ -22,9 +22,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "arm,realview-eb"; chosen { };
@@ -38,6 +39,7 @@ }; memory { + device_type = "memory"; /* 128 MiB memory @ 0x0 */ reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/arm-realview-pb1176.dts +3 -1
@@ -23,9 +23,10 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; model = "ARM RealView PB1176"; compatible = "arm,realview-pb1176";
@@ -40,6 +41,7 @@ }; memory { + device_type = "memory"; /* 128 MiB memory @ 0x0 */ reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/arm-realview-pb11mp.dts +3 -1
@@ -23,9 +23,10 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; model = "ARM RealView PB11MPcore"; compatible = "arm,realview-pb11mp";
@@ -39,6 +40,7 @@ }; memory { + device_type = "memory"; /* * The PB11MPCore has 512 MiB memory @ 0x70000000 * and the first 256 are also remapped @ 0x00000000
arch/arm/boot/dts/arm-realview-pbx.dtsi +3 -1
@@ -22,9 +22,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "arm,realview-pbx"; chosen { };
@@ -39,6 +40,7 @@ }; memory { + device_type = "memory"; /* 128 MiB memory @ 0x0 */ reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/armada-38x.dtsi +3 -1
@@ -9,13 +9,15 @@ * Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/[email protected]> */ -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; + model = "Marvell Armada 38x family SoC"; compatible = "marvell,armada380";
arch/arm/boot/dts/armada-39x.dtsi +2 -1
@@ -7,13 +7,14 @@ * Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/[email protected]> */ -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; model = "Marvell Armada 39x family SoC"; compatible = "marvell,armada390";
arch/arm/boot/dts/artpec6.dtsi +2 -1
@@ -43,9 +43,10 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/dma/nbpfaxi.h> #include <dt-bindings/clock/axis,artpec6-clkctrl.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "axis,artpec6"; interrupt-parent = <&intc>;
arch/arm/boot/dts/at91rm9200.dtsi +3 -1
@@ -10,13 +10,14 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91RM9200 family SoC"; compatible = "atmel,at91rm9200"; interrupt-parent = <&aic>;
@@ -49,6 +50,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x04000000>; };
arch/arm/boot/dts/at91sam9260.dtsi +3 -1
@@ -8,13 +8,14 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9260 family SoC"; compatible = "atmel,at91sam9260"; interrupt-parent = <&aic>;
@@ -46,6 +47,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x04000000>; };
arch/arm/boot/dts/at91sam9261.dtsi +3 -1
@@ -6,13 +6,14 @@ * Licensed under GPLv2 only. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9261 family SoC"; compatible = "atmel,at91sam9261"; interrupt-parent = <&aic>;
@@ -43,6 +44,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x08000000>; };
arch/arm/boot/dts/at91sam9263.dtsi +3 -1
@@ -6,13 +6,14 @@ * Licensed under GPLv2 only. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9263 family SoC"; compatible = "atmel,at91sam9263"; interrupt-parent = <&aic>;
@@ -45,6 +46,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x08000000>; };
arch/arm/boot/dts/at91sam9g45.dtsi +3 -1
@@ -9,7 +9,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>
@@ -17,6 +16,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9G45 family SoC"; compatible = "atmel,at91sam9g45"; interrupt-parent = <&aic>;
@@ -51,6 +52,7 @@ }; memory { + device_type = "memory"; reg = <0x70000000 0x10000000>; };
arch/arm/boot/dts/at91sam9n12.dtsi +3 -1
@@ -7,7 +7,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>
@@ -15,6 +14,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9N12 SoC"; compatible = "atmel,at91sam9n12"; interrupt-parent = <&aic>;
@@ -47,6 +48,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x10000000>; };
arch/arm/boot/dts/at91sam9rl.dtsi +3 -1
@@ -7,7 +7,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/clock/at91.h> #include <dt-bindings/interrupt-controller/irq.h>
@@ -15,6 +14,8 @@ #include <dt-bindings/pwm/pwm.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9RL family SoC"; compatible = "atmel,at91sam9rl", "atmel,at91sam9"; interrupt-parent = <&aic>;
@@ -48,6 +49,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x04000000>; };
arch/arm/boot/dts/at91sam9x5.dtsi +3 -1
@@ -9,7 +9,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>
@@ -17,6 +16,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9x5 family SoC"; compatible = "atmel,at91sam9x5"; interrupt-parent = <&aic>;
@@ -49,6 +50,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x10000000>; };
arch/arm/boot/dts/atlas6-evb.dts +1 -0
@@ -15,6 +15,7 @@ compatible = "sirf,atlas6-cb", "sirf,atlas6"; memory { + device_type = "memory"; reg = <0x00000000 0x20000000>; };
arch/arm/boot/dts/atlas6.dtsi +0 -1
@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" / { compatible = "sirf,atlas6"; #address-cells = <1>;
arch/arm/boot/dts/atlas7.dtsi +0 -1
@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" / { compatible = "sirf,atlas7"; #address-cells = <1>;
arch/arm/boot/dts/axm55xx.dtsi +2 -2
@@ -12,9 +12,9 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/lsi,axm5516-clks.h> -#include "skeleton64.dtsi" - / { + #address-cells = <2>; + #size-cells = <2>; interrupt-parent = <&gic>; aliases {
arch/arm/boot/dts/bcm-cygnus.dtsi +7 -2
@@ -34,9 +34,9 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/bcm-cygnus.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "brcm,cygnus"; model = "Broadcom Cygnus SoC"; interrupt-parent = <&gic>;
@@ -45,6 +45,11 @@ ethernet0 = ð0; }; + memory { + device_type = "memory"; + reg = <0 0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>;
arch/arm/boot/dts/bcm-nsp.dtsi +2 -2
@@ -34,9 +34,9 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/bcm-nsp.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "brcm,nsp"; model = "Broadcom Northstar Plus SoC"; interrupt-parent = <&gic>;
arch/arm/boot/dts/bcm11351.dtsi +2 -2
@@ -16,9 +16,9 @@ #include "dt-bindings/clock/bcm281xx.h" -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; model = "BCM11351 SoC"; compatible = "brcm,bcm11351"; interrupt-parent = <&gic>;
arch/arm/boot/dts/bcm21664-garnet.dts +1 -0
@@ -22,6 +22,7 @@ compatible = "brcm,bcm21664-garnet", "brcm,bcm21664"; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1 GB */ };
arch/arm/boot/dts/bcm21664.dtsi +2 -2
@@ -16,9 +16,9 @@ #include "dt-bindings/clock/bcm21664.h" -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; model = "BCM21664 SoC"; compatible = "brcm,bcm21664"; interrupt-parent = <&gic>;
arch/arm/boot/dts/bcm23550-sparrow.dts +1 -0
@@ -46,6 +46,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ }; };
arch/arm/boot/dts/bcm23550.dtsi +2 -2
@@ -36,9 +36,9 @@ /* BCM23550 and BCM21664 have almost identical clocks */ #include "dt-bindings/clock/bcm21664.h" -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; model = "BCM23550 SoC"; compatible = "brcm,bcm23550"; interrupt-parent = <&gic>;
arch/arm/boot/dts/bcm28155-ap.dts +1 -0
@@ -22,6 +22,7 @@ compatible = "brcm,bcm28155-ap", "brcm,bcm11351"; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1 GB */ };
arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts +1 -0
@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts +1 -0
@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };
arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts +1 -0
@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts +1 -0
@@ -16,6 +16,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +1 -0
@@ -16,6 +16,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +1 -0
@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };
arch/arm/boot/dts/bcm47094-linksys-panamera.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };
arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts +1 -0
@@ -16,6 +16,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };
arch/arm/boot/dts/bcm47094-netgear-r8500.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm47189-tenda-ac9.dts +1 -0
@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm5301x.dtsi +2 -1
@@ -13,9 +13,10 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; chipcommonA {
arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts +1 -0
@@ -20,6 +20,7 @@ }; memory@0 { + device_type = "memory"; reg = <0x00000000 0x08000000>, <0x68000000 0x08000000>; };
arch/arm/boot/dts/bcm53573.dtsi +2 -1
@@ -8,9 +8,10 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; aliases {
arch/arm/boot/dts/bcm63138.dtsi +2 -2
@@ -6,9 +6,9 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "brcm,bcm63138"; model = "Broadcom BCM63138 DSL SoC"; interrupt-parent = <&gic>;
arch/arm/boot/dts/bcm7445.dtsi +0 -2
@@ -1,8 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" - / { #address-cells = <2>; #size-cells = <2>;
arch/arm/boot/dts/bcm947189acdbmr.dts +1 -0
@@ -18,6 +18,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/bcm953012er.dts +1 -0
@@ -40,6 +40,7 @@ compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708"; memory { + device_type = "memory"; reg = <0x00000000 0x8000000>; };
arch/arm/boot/dts/bcm953012hr.dts +1 -0
@@ -46,6 +46,7 @@ }; memory@80000000 { + device_type = "memory"; reg = <0x80000000 0x10000000>; }; };
arch/arm/boot/dts/bcm953012k.dts +1 -0
@@ -44,6 +44,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x10000000>; }; };
arch/arm/boot/dts/cx92755.dtsi +2 -2
@@ -44,9 +44,9 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "cnxt,cx92755"; interrupt-parent = <&intc>;
arch/arm/boot/dts/dove.dtsi +2 -2
@@ -1,12 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -/include/ "skeleton.dtsi" - #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; compatible = "marvell,dove"; model = "Marvell Armada 88AP510 SoC"; interrupt-parent = <&intc>;
arch/arm/boot/dts/ep7209.dtsi +2 -2
@@ -6,11 +6,11 @@ /dts-v1/; -#include "skeleton.dtsi" - #include <dt-bindings/clock/clps711x-clock.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Cirrus Logic EP7209"; compatible = "cirrus,ep7209";
arch/arm/boot/dts/ep7211-edb7211.dts +1 -0
@@ -12,6 +12,7 @@ compatible = "cirrus,edb7211", "cirrus,ep7211", "cirrus,ep7209"; memory { + device_type = "memory"; reg = <0xc0000000 0x02000000>; };
arch/arm/boot/dts/integrator.dtsi +8 -2
@@ -3,9 +3,15 @@ * SoC core Device Tree for the ARM Integrator platforms */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; + + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + core-module@10000000 { compatible = "arm,core-module-integrator", "syscon", "simple-mfd"; reg = <0x10000000 0x200>;
arch/arm/boot/dts/kirkwood.dtsi +2 -1
@@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -/include/ "skeleton.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; compatible = "marvell,kirkwood"; interrupt-parent = <&intc>;
arch/arm/boot/dts/lpc32xx.dtsi +2 -2
@@ -11,12 +11,12 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include "skeleton.dtsi" - #include <dt-bindings/clock/lpc32xx-clock.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "nxp,lpc3220"; interrupt-parent = <&mic>;
arch/arm/boot/dts/ls1021a.dtsi +7 -1
@@ -45,11 +45,12 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton64.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> / { + #address-cells = <2>; + #size-cells = <2>; compatible = "fsl,ls1021a"; interrupt-parent = <&gic>;
@@ -88,6 +89,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x0>; + }; + sysclk: sysclk { compatible = "fixed-clock"; #clock-cells = <0>;
arch/arm/boot/dts/meson.dtsi +2 -1
@@ -47,9 +47,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -/include/ "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; L2: l2-cache-controller@c4200000 {
arch/arm/boot/dts/meson6-atv1200.dts +1 -0
@@ -57,6 +57,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; }; };
arch/arm/boot/dts/meson8-minix-neo-x8.dts +1 -0
@@ -53,6 +53,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };
arch/arm/boot/dts/meson8b-ec100.dts +1 -0
@@ -23,6 +23,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; };
arch/arm/boot/dts/meson8b-mxq.dts +1 -0
@@ -56,6 +56,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; }; };
arch/arm/boot/dts/meson8b-odroidc1.dts +1 -0
@@ -62,6 +62,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; };
arch/arm/boot/dts/meson8m2-mxiii-plus.dts +1 -0
@@ -28,6 +28,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };
arch/arm/boot/dts/mmp2-brownstone.dts +1 -0
@@ -19,6 +19,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };
arch/arm/boot/dts/mmp2.dtsi +3 -1
@@ -7,10 +7,12 @@ * publishhed by the Free Software Foundation. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/marvell,mmp2.h> / { + #address-cells = <1>; + #size-cells = <1>; + aliases { serial0 = &uart1; serial1 = &uart2;
arch/arm/boot/dts/moxart.dtsi +2 -1
@@ -5,10 +5,11 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "moxa,moxart"; model = "MOXART"; interrupt-parent = <&intc>;
arch/arm/boot/dts/mt2701-evb.dts +1 -0
@@ -13,6 +13,7 @@ compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; memory { + device_type = "memory"; reg = <0 0x80000000 0 0x40000000>; };
arch/arm/boot/dts/mt2701.dtsi +2 -1
@@ -12,10 +12,11 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/memory/mt2701-larb-port.h> #include <dt-bindings/reset/mt2701-resets.h> -#include "skeleton64.dtsi" #include "mt2701-pinfunc.h" / { + #address-cells = <2>; + #size-cells = <2>; compatible = "mediatek,mt2701"; interrupt-parent = <&cirq>;
arch/arm/boot/dts/mt6580-evbp1.dts +1 -0
@@ -22,6 +22,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x20000000>; }; };
arch/arm/boot/dts/mt6580.dtsi +0 -1
@@ -7,7 +7,6 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { compatible = "mediatek,mt6580";
arch/arm/boot/dts/mt6589-aquaris5.dts +1 -0
@@ -18,6 +18,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; };
arch/arm/boot/dts/mt6589.dtsi +2 -1
@@ -7,9 +7,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "mediatek,mt6589"; interrupt-parent = <&sysirq>;
arch/arm/boot/dts/mt6592-evb.dts +1 -1
@@ -13,7 +13,7 @@ compatible = "mediatek,mt6592-evb", "mediatek,mt6592"; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; }; }; -
arch/arm/boot/dts/mt6592.dtsi +2 -1
@@ -7,9 +7,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "mediatek,mt6592"; interrupt-parent = <&sysirq>;
arch/arm/boot/dts/mt8127-moose.dts +1 -0
@@ -13,6 +13,7 @@ compatible = "mediatek,mt8127-moose", "mediatek,mt8127"; memory { + device_type = "memory"; reg = <0 0x80000000 0 0x40000000>; }; };
arch/arm/boot/dts/mt8127.dtsi +2 -1
@@ -7,9 +7,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton64.dtsi" / { + #address-cells = <2>; + #size-cells = <2>; compatible = "mediatek,mt8127"; interrupt-parent = <&sysirq>;
arch/arm/boot/dts/mt8135-evbp1.dts +1 -0
@@ -13,6 +13,7 @@ compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135"; memory { + device_type = "memory"; reg = <0 0x80000000 0 0x40000000>; }; };
arch/arm/boot/dts/mt8135.dtsi +2 -1
@@ -9,10 +9,11 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/mt8135-resets.h> -#include "skeleton64.dtsi" #include "mt8135-pinfunc.h" / { + #address-cells = <2>; + #size-cells = <2>; compatible = "mediatek,mt8135"; interrupt-parent = <&sysirq>;
arch/arm/boot/dts/nspire.dtsi +2 -2
@@ -9,9 +9,9 @@ * */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; cpus {
arch/arm/boot/dts/orion5x-lacie-d2-network.dts +1 -0
@@ -19,6 +19,7 @@ compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts +1 -0
@@ -25,6 +25,7 @@ compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };
arch/arm/boot/dts/orion5x-lswsgl.dts +1 -0
@@ -55,6 +55,7 @@ compatible = "buffalo,lswsgl", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x8000000>; /* 128 MB */ };
arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts +1 -0
@@ -19,6 +19,7 @@ compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };
arch/arm/boot/dts/orion5x-netgear-wnr854t.dts +1 -0
@@ -21,6 +21,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x2000000>; /* 32 MB */ };
arch/arm/boot/dts/orion5x-rd88f5182-nas.dts +1 -0
@@ -16,6 +16,7 @@ compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };
arch/arm/boot/dts/orion5x.dtsi +2 -2
@@ -6,11 +6,11 @@ * warranty of any kind, whether express or implied. */ -#include "skeleton.dtsi" - #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; model = "Marvell Orion5x SoC"; compatible = "marvell,orion5x"; interrupt-parent = <&intc>;
arch/arm/boot/dts/ox810se.dtsi +3 -1
@@ -6,11 +6,12 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" #include <dt-bindings/clock/oxsemi,ox810se.h> #include <dt-bindings/reset/oxsemi,ox810se.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "oxsemi,ox810se"; cpus {
@@ -25,6 +26,7 @@ }; memory { + device_type = "memory"; /* Max 256MB @ 0x48000000 */ reg = <0x48000000 0x10000000>; };
arch/arm/boot/dts/ox820.dtsi +3 -1
@@ -6,12 +6,13 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/oxsemi,ox820.h> #include <dt-bindings/reset/oxsemi,ox820.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "oxsemi,ox820"; cpus {
@@ -35,6 +36,7 @@ }; memory { + device_type = "memory"; /* Max 512MB @ 0x60000000 */ reg = <0x60000000 0x20000000>; };
arch/arm/boot/dts/picoxcell-pc3x2.dtsi +0 -1
@@ -10,7 +10,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -/include/ "skeleton.dtsi" / { model = "Picochip picoXcell PC3X2"; compatible = "picochip,pc3x2";
arch/arm/boot/dts/picoxcell-pc3x3.dtsi +0 -1
@@ -10,7 +10,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -/include/ "skeleton.dtsi" / { model = "Picochip picoXcell PC3X3"; compatible = "picochip,pc3x3";
arch/arm/boot/dts/prima2-evb.dts +1 -0
@@ -15,6 +15,7 @@ compatible = "sirf,prima2", "sirf,prima2-cb"; memory { + device_type = "memory"; reg = <0x00000000 0x20000000>; };
arch/arm/boot/dts/prima2.dtsi +0 -1
@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" / { compatible = "sirf,prima2"; #address-cells = <1>;
arch/arm/boot/dts/pxa168.dtsi +3 -1
@@ -7,10 +7,12 @@ * publishhed by the Free Software Foundation. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/marvell,pxa168.h> / { + #address-cells = <1>; + #size-cells = <1>; + aliases { serial0 = &uart1; serial1 = &uart2;
arch/arm/boot/dts/pxa2xx.dtsi +2 -1
@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include "dt-bindings/clock/pxa-clock.h" #define PMGROUP(pin) #pin
@@ -29,6 +28,8 @@ } / { + #address-cells = <1>; + #size-cells = <1>; model = "Marvell PXA2xx family SoC"; compatible = "marvell,pxa2xx"; interrupt-parent = <&pxairq>;
arch/arm/boot/dts/pxa910.dtsi +3 -1
@@ -7,10 +7,12 @@ * publishhed by the Free Software Foundation. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/marvell,pxa910.h> / { + #address-cells = <1>; + #size-cells = <1>; + aliases { serial0 = &uart1; serial1 = &uart2;
arch/arm/boot/dts/qcom-apq8064.dtsi +7 -1
@@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-msm8960.h> #include <dt-bindings/reset/qcom,gcc-msm8960.h> #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
@@ -10,6 +9,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm APQ8064"; compatible = "qcom,apq8064"; interrupt-parent = <&intc>;
@@ -94,6 +95,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + thermal-zones { cpu-thermal0 { polling-delay-passive = <250>;
arch/arm/boot/dts/qcom-apq8084.dtsi +7 -2
@@ -1,12 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "skeleton.dtsi" - #include <dt-bindings/clock/qcom,gcc-apq8084.h> #include <dt-bindings/gpio/gpio.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm APQ 8084"; compatible = "qcom,apq8084"; interrupt-parent = <&intc>;
@@ -87,6 +87,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + firmware { scm { compatible = "qcom,scm";
arch/arm/boot/dts/qcom-ipq4019.dtsi +7 -1
@@ -13,12 +13,13 @@ /dts-v1/; -#include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-ipq4019.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm Technologies, Inc. IPQ4019"; compatible = "qcom,ipq4019"; interrupt-parent = <&intc>;
@@ -133,6 +134,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + pmu { compatible = "arm,cortex-a7-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
arch/arm/boot/dts/qcom-ipq8064.dtsi +7 -1
@@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-ipq806x.h> #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
@@ -11,6 +10,8 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm IPQ8064"; compatible = "qcom,ipq8064"; interrupt-parent = <&intc>;
@@ -45,6 +46,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +1 -0
@@ -50,6 +50,7 @@ compatible = "swir,wp8548", "qcom,mdm9615"; memory { + device_type = "memory"; reg = <0x48000000 0x7F00000>; }; };
arch/arm/boot/dts/qcom-mdm9615.dtsi +2 -2
@@ -45,8 +45,6 @@ /dts-v1/; -/include/ "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-mdm9615.h> #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
@@ -54,6 +52,8 @@ #include <dt-bindings/soc/qcom,gsbi.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MDM9615"; compatible = "qcom,mdm9615"; interrupt-parent = <&intc>;
arch/arm/boot/dts/qcom-msm8660.dtsi +7 -2
@@ -1,14 +1,14 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -/include/ "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8660.h> #include <dt-bindings/soc/qcom,gsbi.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MSM8660"; compatible = "qcom,msm8660"; interrupt-parent = <&intc>;
@@ -39,6 +39,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + cpu-pmu { compatible = "qcom,scorpion-mp-pmu"; interrupts = <1 9 0x304>;
arch/arm/boot/dts/qcom-msm8960.dtsi +7 -2
@@ -1,14 +1,14 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -/include/ "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8960.h> #include <dt-bindings/mfd/qcom-rpm.h> #include <dt-bindings/soc/qcom,gsbi.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MSM8960"; compatible = "qcom,msm8960"; interrupt-parent = <&intc>;
@@ -44,6 +44,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 10 0x304>;
arch/arm/boot/dts/qcom-msm8974.dtsi +7 -1
@@ -6,9 +6,10 @@ #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/reset/qcom,gcc-msm8974.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MSM8974"; compatible = "qcom,msm8974"; interrupt-parent = <&intc>;
@@ -130,6 +131,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + thermal-zones { cpu-thermal0 { polling-delay-passive = <250>;
arch/arm/boot/dts/sama5d2.dtsi +3 -1
@@ -43,13 +43,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/at91.h> #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel SAMA5D2 family SoC"; compatible = "atmel,sama5d2"; interrupt-parent = <&aic>;
@@ -113,6 +114,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x20000000>; };
arch/arm/boot/dts/sama5d3.dtsi +3 -1
@@ -8,7 +8,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>
@@ -16,6 +15,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel SAMA5D3 family SoC"; compatible = "atmel,sama5d3", "atmel,sama5"; interrupt-parent = <&aic>;
@@ -56,6 +57,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x8000000>; };
arch/arm/boot/dts/sama5d4.dtsi +3 -1
@@ -43,7 +43,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/at91.h> #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h>
@@ -51,6 +50,8 @@ #include <dt-bindings/gpio/gpio.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel SAMA5D4 family SoC"; compatible = "atmel,sama5d4"; interrupt-parent = <&aic>;
@@ -90,6 +91,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x20000000>; };
arch/arm/boot/dts/skeleton.dtsi deleted +0 -18
@@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * This file is deprecated, and will be removed once existing users have been - * updated. New dts{,i} files should *not* include skeleton.dtsi, and should - * instead explicitly provide the below nodes only as required. - * - * Skeleton device tree; the bare minimum needed to boot; just include and - * add a compatible value. The bootloader will typically populate the memory - * node. - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - chosen { }; - aliases { }; - memory { device_type = "memory"; reg = <0 0>; }; -};
arch/arm/boot/dts/skeleton64.dtsi deleted +0 -14
@@ -1,14 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Skeleton device tree in the 64 bits version; the bare minimum - * needed to boot; just include and add a compatible value. The - * bootloader will typically populate the memory node. - */ - -/ { - #address-cells = <2>; - #size-cells = <2>; - chosen { }; - aliases { }; - memory { device_type = "memory"; reg = <0 0 0 0>; }; -};
arch/arm/boot/dts/spear13xx.dtsi +2 -2
@@ -11,9 +11,9 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; cpus {
arch/arm/boot/dts/spear3xx.dtsi +2 -2
@@ -11,9 +11,9 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&vic>; cpus {
arch/arm/boot/dts/spear600.dtsi +2 -2
@@ -9,9 +9,9 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "st,spear600"; cpus {
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +1 -1
@@ -4,13 +4,13 @@ */ #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { #address-cells = <1>; #size-cells = <1>; memory { + device_type = "memory"; reg = <0x00000000 0x04000000>, <0x08000000 0x04000000>; };
arch/arm/boot/dts/ste-u300.dts +1 -1
@@ -4,7 +4,6 @@ */ /dts-v1/; -/include/ "skeleton.dtsi" / { model = "ST-Ericsson U300";
@@ -22,6 +21,7 @@ }; memory { + device_type = "memory"; reg = <0x48000000 0x03c00000>; };
arch/arm/boot/dts/stm32429i-eval.dts +1 -0
@@ -61,6 +61,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x2000000>; };
arch/arm/boot/dts/stm32746g-eval.dts +1 -0
@@ -55,6 +55,7 @@ }; memory { + device_type = "memory"; reg = <0xc0000000 0x2000000>; };
arch/arm/boot/dts/stm32f429-disco.dts +1 -0
@@ -60,6 +60,7 @@ }; memory { + device_type = "memory"; reg = <0x90000000 0x800000>; };
arch/arm/boot/dts/stm32f429.dtsi +3 -1
@@ -45,12 +45,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32fx-clock.h> #include <dt-bindings/mfd/stm32f4-rcc.h> / { + #address-cells = <1>; + #size-cells = <1>; + clocks { clk_hse: clk-hse { #clock-cells = <0>;
arch/arm/boot/dts/stm32f469-disco.dts +1 -0
@@ -61,6 +61,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x1000000>; };
arch/arm/boot/dts/stm32f746-disco.dts +1 -0
@@ -56,6 +56,7 @@ }; memory { + device_type = "memory"; reg = <0xC0000000 0x800000>; };
arch/arm/boot/dts/stm32f746.dtsi +3 -1
@@ -40,12 +40,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32fx-clock.h> #include <dt-bindings/mfd/stm32f7-rcc.h> / { + #address-cells = <1>; + #size-cells = <1>; + clocks { clk_hse: clk-hse { #clock-cells = <0>;
arch/arm/boot/dts/stm32f769-disco.dts +1 -0
@@ -56,6 +56,7 @@ }; memory { + device_type = "memory"; reg = <0xC0000000 0x1000000>; };
arch/arm/boot/dts/stm32h743.dtsi +3 -1
@@ -40,13 +40,15 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32h7-clks.h> #include <dt-bindings/mfd/stm32h7-rcc.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; + clocks { clk_hse: clk-hse { #clock-cells = <0>;
arch/arm/boot/dts/stm32h743i-disco.dts +1 -0
@@ -54,6 +54,7 @@ }; memory { + device_type = "memory"; reg = <0xd0000000 0x2000000>; };
arch/arm/boot/dts/stm32h743i-eval.dts +1 -0
@@ -54,6 +54,7 @@ }; memory { + device_type = "memory"; reg = <0xd0000000 0x2000000>; };
arch/arm/boot/dts/stm32mp157c-ed1.dts +1 -0
@@ -17,6 +17,7 @@ }; memory@c0000000 { + device_type = "memory"; reg = <0xC0000000 0x40000000>; };
arch/arm/boot/dts/sun5i-a10s.dtsi +2 -2
@@ -42,13 +42,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include "sun5i.dtsi" #include <dt-bindings/dma/sun4i-a10.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; aliases {
arch/arm/boot/dts/sun5i-a13.dtsi +2 -2
@@ -42,13 +42,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include "sun5i.dtsi" #include <dt-bindings/thermal/thermal.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; thermal-zones {
arch/arm/boot/dts/sun5i.dtsi +7 -2
@@ -42,13 +42,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/clock/sun5i-ccu.h> #include <dt-bindings/dma/sun4i-a10.h> #include <dt-bindings/reset/sun5i-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; cpus {
@@ -88,6 +88,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + clocks { #address-cells = <1>; #size-cells = <1>;
arch/arm/boot/dts/sun6i-a31.dtsi +3 -2
@@ -42,8 +42,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h>
@@ -51,6 +49,8 @@ #include <dt-bindings/reset/sun6i-a31-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; aliases {
@@ -197,6 +197,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };
arch/arm/boot/dts/sun7i-a20.dtsi +3 -2
@@ -42,8 +42,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> #include <dt-bindings/dma/sun4i-a10.h>
@@ -51,6 +49,8 @@ #include <dt-bindings/reset/sun4i-a10-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; aliases {
@@ -171,6 +171,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };
arch/arm/boot/dts/sun8i-a23-a33.dtsi +2 -2
@@ -42,14 +42,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; chosen {
arch/arm/boot/dts/sun8i-a23.dtsi +1 -0
@@ -46,6 +46,7 @@ / { memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; };
arch/arm/boot/dts/sun8i-a33.dtsi +1 -0
@@ -187,6 +187,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };
arch/arm/boot/dts/versatile-ab.dts +1 -1
@@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -/include/ "skeleton.dtsi" / { model = "ARM Versatile AB";
@@ -21,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x0 0x08000000>; };
arch/arm/boot/dts/vt8500.dtsi +7 -2
@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "via,vt8500"; cpus {
@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;
arch/arm/boot/dts/wm8505.dtsi +7 -2
@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8505"; cpus {
@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;
arch/arm/boot/dts/wm8650.dtsi +7 -2
@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8650"; cpus {
@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;
arch/arm/boot/dts/wm8750.dtsi +7 -2
@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8750"; cpus {
@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;
arch/arm/boot/dts/wm8850.dtsi +7 -2
@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8850"; cpus {
@@ -22,6 +22,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;
arch/arm/boot/dts/zx296702-ad1.dts +1 -0
@@ -14,6 +14,7 @@ }; memory { + device_type = "memory"; reg = <0x50000000 0x20000000>; }; };
arch/arm/boot/dts/zx296702.dtsi +3 -1
@@ -1,10 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -#include "skeleton.dtsi" #include <dt-bindings/clock/zx296702-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { + #address-cells = <1>; + #size-cells = <1>; + cpus { #address-cells = <1>; #size-cells = <0>;
Signature · 1 line
2.19.1
A message that is not in the archive (sent off-list or not yet received): 20181130170634.9467-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Linus Walleij
Acked-byQuoted 10 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>
Acked-by Linus Walleij <[email protected]>
Good riddance.
Quoted 3 lines
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies on
skeleton.dtsi. So please apply directly to arm-soc.
A patch should be "one technical step" and this is one technical step.
I don't think the compulsive requests to split patches up gives us anything in cases like this, it just cost us valuable development time.
So this is the right approach.
Linus Walleij
Quoted 38 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>---
arch/arm/boot/dts/bcm-cygnus.dtsi | 9 +++++++-- arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++-- arch/arm/boot/dts/bcm11351.dtsi | 4 ++-- arch/arm/boot/dts/bcm21664-garnet.dts | 1 + arch/arm/boot/dts/bcm21664.dtsi | 4 ++-- arch/arm/boot/dts/bcm23550-sparrow.dts | 1 + arch/arm/boot/dts/bcm23550.dtsi | 4 ++-- arch/arm/boot/dts/bcm28155-ap.dts | 1 + arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 1 + .../boot/dts/bcm47081-tplink-archer-c5-v2.dts | 1 + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 + .../arm/boot/dts/bcm47094-linksys-panamera.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 1 + .../boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 1 + arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 1 + arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 1 + arch/arm/boot/dts/bcm5301x.dtsi | 3 ++-
Quoted 8 lines
.../boot/dts/bcm53340-ubnt-unifi-switch8.dts | 1 + arch/arm/boot/dts/bcm53573.dtsi | 3 ++- arch/arm/boot/dts/bcm63138.dtsi | 4 ++-- arch/arm/boot/dts/bcm7445.dtsi | 2 -- arch/arm/boot/dts/bcm947189acdbmr.dts | 1 + arch/arm/boot/dts/bcm953012er.dts | 1 + arch/arm/boot/dts/bcm953012hr.dts | 1 + arch/arm/boot/dts/bcm953012k.dts | 1 +
For these files above (Broadcom):
Reviewed-by Florian Fainelli <[email protected]>
Thanks!
--
Florian
Quoted 18 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.Rob
arch/arm/boot/dts/alphascale-asm9260.dtsi | 3 ++-
[...]
Quoted 4 lines
arch/arm/boot/dts/mt2701-evb.dts | 1 + arch/arm/boot/dts/mt2701.dtsi | 3 ++- arch/arm/boot/dts/mt6580-evbp1.dts | 1 + arch/arm/boot/dts/mt6580.dtsi | 1 -
Quoted 8 lines
arch/arm/boot/dts/mt6589-aquaris5.dts | 1 + arch/arm/boot/dts/mt6589.dtsi | 3 ++- arch/arm/boot/dts/mt6592-evb.dts | 2 +- arch/arm/boot/dts/mt6592.dtsi | 3 ++- arch/arm/boot/dts/mt8127-moose.dts | 1 + arch/arm/boot/dts/mt8127.dtsi | 3 ++- arch/arm/boot/dts/mt8135-evbp1.dts | 1 + arch/arm/boot/dts/mt8135.dtsi | 3 ++-
For the MediaTek part:
Reviewed-by Matthias Brugger <[email protected]>
Quoted 18 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.Rob
[...]
Quoted 8 lines
arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++-- arch/arm/boot/dts/sun5i-a13.dtsi | 4 ++-- arch/arm/boot/dts/sun5i.dtsi | 9 +++++++-- arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++-- arch/arm/boot/dts/sun7i-a20.dtsi | 5 +++-- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++-- arch/arm/boot/dts/sun8i-a23.dtsi | 1 + arch/arm/boot/dts/sun8i-a33.dtsi | 1 +
Maxime recently took care of this for Allwinner/sunxi. It should already be in linux-next now.
ChenYu
Quoted 16 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.
Quoted 3 lines
arch/arm/boot/dts/spear13xx.dtsi | 4 ++-- arch/arm/boot/dts/spear3xx.dtsi | 4 ++-- arch/arm/boot/dts/spear600.dtsi | 4 ++--
Acked-by Viresh Kumar <[email protected]>
Signature · 1 line
viresh
Quoted 9 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.
Quoted 5 lines
Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.
It will conflict for the sunxi DTSIs. We merged a similar patch last week that is in linux-next now.
Maxime
Signature · 3 lines
Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
_______________________________________________
Linux-mediatek mailing list [email protected]
http://lists.infradead.org/mailman/listinfo/linux-mediatek
Quoted 10 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>
Quoted 2,818 lines
---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.Rob
arch/arm/boot/dts/alphascale-asm9260.dtsi | 3 ++- arch/arm/boot/dts/alpine.dtsi | 8 +++++++- arch/arm/boot/dts/arm-realview-eb.dtsi | 4 +++- arch/arm/boot/dts/arm-realview-pb1176.dts | 4 +++- arch/arm/boot/dts/arm-realview-pb11mp.dts | 4 +++- arch/arm/boot/dts/arm-realview-pbx.dtsi | 4 +++- arch/arm/boot/dts/armada-38x.dtsi | 4 +++- arch/arm/boot/dts/armada-39x.dtsi | 3 ++- arch/arm/boot/dts/artpec6.dtsi | 3 ++- arch/arm/boot/dts/at91rm9200.dtsi | 4 +++- arch/arm/boot/dts/at91sam9260.dtsi | 4 +++- arch/arm/boot/dts/at91sam9261.dtsi | 4 +++- arch/arm/boot/dts/at91sam9263.dtsi | 4 +++- arch/arm/boot/dts/at91sam9g45.dtsi | 4 +++- arch/arm/boot/dts/at91sam9n12.dtsi | 4 +++- arch/arm/boot/dts/at91sam9rl.dtsi | 4 +++- arch/arm/boot/dts/at91sam9x5.dtsi | 4 +++- arch/arm/boot/dts/atlas6-evb.dts | 1 + arch/arm/boot/dts/atlas6.dtsi | 1 - arch/arm/boot/dts/atlas7.dtsi | 1 - arch/arm/boot/dts/axm55xx.dtsi | 4 ++-- arch/arm/boot/dts/bcm-cygnus.dtsi | 9 +++++++-- arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++-- arch/arm/boot/dts/bcm11351.dtsi | 4 ++-- arch/arm/boot/dts/bcm21664-garnet.dts | 1 + arch/arm/boot/dts/bcm21664.dtsi | 4 ++-- arch/arm/boot/dts/bcm23550-sparrow.dts | 1 + arch/arm/boot/dts/bcm23550.dtsi | 4 ++-- arch/arm/boot/dts/bcm28155-ap.dts | 1 + arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 1 + .../boot/dts/bcm47081-tplink-archer-c5-v2.dts | 1 + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 + .../arm/boot/dts/bcm47094-linksys-panamera.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 1 + .../boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 1 + arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 1 + arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 1 + arch/arm/boot/dts/bcm5301x.dtsi | 3 ++- .../boot/dts/bcm53340-ubnt-unifi-switch8.dts | 1 + arch/arm/boot/dts/bcm53573.dtsi | 3 ++- arch/arm/boot/dts/bcm63138.dtsi | 4 ++-- arch/arm/boot/dts/bcm7445.dtsi | 2 -- arch/arm/boot/dts/bcm947189acdbmr.dts | 1 + arch/arm/boot/dts/bcm953012er.dts | 1 + arch/arm/boot/dts/bcm953012hr.dts | 1 + arch/arm/boot/dts/bcm953012k.dts | 1 + arch/arm/boot/dts/cx92755.dtsi | 4 ++-- arch/arm/boot/dts/dove.dtsi | 4 ++-- arch/arm/boot/dts/ep7209.dtsi | 4 ++-- arch/arm/boot/dts/ep7211-edb7211.dts | 1 + arch/arm/boot/dts/integrator.dtsi | 10 ++++++++-- arch/arm/boot/dts/kirkwood.dtsi | 3 ++- arch/arm/boot/dts/lpc32xx.dtsi | 4 ++-- arch/arm/boot/dts/ls1021a.dtsi | 8 +++++++- arch/arm/boot/dts/meson.dtsi | 3 ++- arch/arm/boot/dts/meson6-atv1200.dts | 1 + arch/arm/boot/dts/meson8-minix-neo-x8.dts | 1 + arch/arm/boot/dts/meson8b-ec100.dts | 1 + arch/arm/boot/dts/meson8b-mxq.dts | 1 + arch/arm/boot/dts/meson8b-odroidc1.dts | 1 + arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 1 + arch/arm/boot/dts/mmp2-brownstone.dts | 1 + arch/arm/boot/dts/mmp2.dtsi | 4 +++- arch/arm/boot/dts/moxart.dtsi | 3 ++- arch/arm/boot/dts/mt2701-evb.dts | 1 + arch/arm/boot/dts/mt2701.dtsi | 3 ++- arch/arm/boot/dts/mt6580-evbp1.dts | 1 + arch/arm/boot/dts/mt6580.dtsi | 1 - arch/arm/boot/dts/mt6589-aquaris5.dts | 1 + arch/arm/boot/dts/mt6589.dtsi | 3 ++- arch/arm/boot/dts/mt6592-evb.dts | 2 +- arch/arm/boot/dts/mt6592.dtsi | 3 ++- arch/arm/boot/dts/mt8127-moose.dts | 1 + arch/arm/boot/dts/mt8127.dtsi | 3 ++- arch/arm/boot/dts/mt8135-evbp1.dts | 1 + arch/arm/boot/dts/mt8135.dtsi | 3 ++- arch/arm/boot/dts/nspire.dtsi | 4 ++-- arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 1 + .../orion5x-lacie-ethernet-disk-mini-v2.dts | 1 + arch/arm/boot/dts/orion5x-lswsgl.dts | 1 + .../dts/orion5x-maxtor-shared-storage-2.dts | 1 + arch/arm/boot/dts/orion5x-netgear-wnr854t.dts | 1 + arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 1 + arch/arm/boot/dts/orion5x.dtsi | 4 ++-- arch/arm/boot/dts/ox810se.dtsi | 4 +++- arch/arm/boot/dts/ox820.dtsi | 4 +++- arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 1 - arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 1 - arch/arm/boot/dts/prima2-evb.dts | 1 + arch/arm/boot/dts/prima2.dtsi | 1 - arch/arm/boot/dts/pxa168.dtsi | 4 +++- arch/arm/boot/dts/pxa2xx.dtsi | 3 ++- arch/arm/boot/dts/pxa910.dtsi | 4 +++- arch/arm/boot/dts/qcom-apq8064.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-apq8084.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 1 + arch/arm/boot/dts/qcom-mdm9615.dtsi | 4 ++-- arch/arm/boot/dts/qcom-msm8660.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-msm8960.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-msm8974.dtsi | 8 +++++++- arch/arm/boot/dts/sama5d2.dtsi | 4 +++- arch/arm/boot/dts/sama5d3.dtsi | 4 +++- arch/arm/boot/dts/sama5d4.dtsi | 4 +++- arch/arm/boot/dts/skeleton.dtsi | 18 ------------------ arch/arm/boot/dts/skeleton64.dtsi | 14 -------------- arch/arm/boot/dts/spear13xx.dtsi | 4 ++-- arch/arm/boot/dts/spear3xx.dtsi | 4 ++-- arch/arm/boot/dts/spear600.dtsi | 4 ++-- arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 2 +- arch/arm/boot/dts/ste-u300.dts | 2 +- arch/arm/boot/dts/stm32429i-eval.dts | 1 + arch/arm/boot/dts/stm32746g-eval.dts | 1 + arch/arm/boot/dts/stm32f429-disco.dts | 1 + arch/arm/boot/dts/stm32f429.dtsi | 4 +++- arch/arm/boot/dts/stm32f469-disco.dts | 1 + arch/arm/boot/dts/stm32f746-disco.dts | 1 + arch/arm/boot/dts/stm32f746.dtsi | 4 +++- arch/arm/boot/dts/stm32f769-disco.dts | 1 + arch/arm/boot/dts/stm32h743.dtsi | 4 +++- arch/arm/boot/dts/stm32h743i-disco.dts | 1 + arch/arm/boot/dts/stm32h743i-eval.dts | 1 + arch/arm/boot/dts/stm32mp157c-ed1.dts | 1 + arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++-- arch/arm/boot/dts/sun5i-a13.dtsi | 4 ++-- arch/arm/boot/dts/sun5i.dtsi | 9 +++++++-- arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++-- arch/arm/boot/dts/sun7i-a20.dtsi | 5 +++-- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++-- arch/arm/boot/dts/sun8i-a23.dtsi | 1 + arch/arm/boot/dts/sun8i-a33.dtsi | 1 + arch/arm/boot/dts/versatile-ab.dts | 2 +- arch/arm/boot/dts/vt8500.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8505.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8650.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8750.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8850.dtsi | 9 +++++++-- arch/arm/boot/dts/zx296702-ad1.dts | 1 + arch/arm/boot/dts/zx296702.dtsi | 4 +++- 149 files changed, 330 insertions(+), 153 deletions(-) delete mode 100644 arch/arm/boot/dts/skeleton.dtsi delete mode 100644 arch/arm/boot/dts/skeleton64.dtsiarch/arm/boot/dts/alphascale-asm9260.dtsi +2
-1@@ -4,10 +4,11 @@ * Licensed under the X11 license or the GPL v2 (or later) */ -#include "skeleton.dtsi" #include <dt-bindings/clock/alphascale,asm9260.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&icoll>; memory {arch/arm/boot/dts/alpine.dtsi +7
-1@@ -25,12 +25,18 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton64.dtsi" / { + #address-cells = <2>; + #size-cells = <2>; /* SOC compatibility */ compatible = "al,alpine"; + memory { + device_type = "memory"; + reg = <0 0 0 0>; + }; + /* CPU Configuration */ cpus { #address-cells = <1>;arch/arm/boot/dts/arm-realview-eb.dtsi +3
-1@@ -22,9 +22,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "arm,realview-eb"; chosen { };@@ -38,6 +39,7 @@ }; memory { + device_type = "memory"; /* 128 MiB memory @ 0x0 */ reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/arm-realview-pb1176.dts +3
-1@@ -23,9 +23,10 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; model = "ARM RealView PB1176"; compatible = "arm,realview-pb1176";@@ -40,6 +41,7 @@ }; memory { + device_type = "memory"; /* 128 MiB memory @ 0x0 */ reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/arm-realview-pb11mp.dts +3
-1@@ -23,9 +23,10 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; model = "ARM RealView PB11MPcore"; compatible = "arm,realview-pb11mp";@@ -39,6 +40,7 @@ }; memory { + device_type = "memory"; /* * The PB11MPCore has 512 MiB memory @ 0x70000000 * and the first 256 are also remapped @ 0x00000000arch/arm/boot/dts/arm-realview-pbx.dtsi +3
-1@@ -22,9 +22,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "arm,realview-pbx"; chosen { };@@ -39,6 +40,7 @@ }; memory { + device_type = "memory"; /* 128 MiB memory @ 0x0 */ reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/armada-38x.dtsi +3
-1@@ -9,13 +9,15 @@ * Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/[email protected]> */ -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; + model = "Marvell Armada 38x family SoC"; compatible = "marvell,armada380";arch/arm/boot/dts/armada-39x.dtsi +2
-1@@ -7,13 +7,14 @@ * Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/[email protected]> */ -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; model = "Marvell Armada 39x family SoC"; compatible = "marvell,armada390";arch/arm/boot/dts/artpec6.dtsi +2
-1@@ -43,9 +43,10 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/dma/nbpfaxi.h> #include <dt-bindings/clock/axis,artpec6-clkctrl.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "axis,artpec6"; interrupt-parent = <&intc>;arch/arm/boot/dts/at91rm9200.dtsi +3
-1@@ -10,13 +10,14 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91RM9200 family SoC"; compatible = "atmel,at91rm9200"; interrupt-parent = <&aic>;@@ -49,6 +50,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x04000000>; };arch/arm/boot/dts/at91sam9260.dtsi +3
-1@@ -8,13 +8,14 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9260 family SoC"; compatible = "atmel,at91sam9260"; interrupt-parent = <&aic>;@@ -46,6 +47,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x04000000>; };arch/arm/boot/dts/at91sam9261.dtsi +3
-1@@ -6,13 +6,14 @@ * Licensed under GPLv2 only. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9261 family SoC"; compatible = "atmel,at91sam9261"; interrupt-parent = <&aic>;@@ -43,6 +44,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x08000000>; };arch/arm/boot/dts/at91sam9263.dtsi +3
-1@@ -6,13 +6,14 @@ * Licensed under GPLv2 only. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9263 family SoC"; compatible = "atmel,at91sam9263"; interrupt-parent = <&aic>;@@ -45,6 +46,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x08000000>; };arch/arm/boot/dts/at91sam9g45.dtsi +3
-1@@ -9,7 +9,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>@@ -17,6 +16,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9G45 family SoC"; compatible = "atmel,at91sam9g45"; interrupt-parent = <&aic>;@@ -51,6 +52,7 @@ }; memory { + device_type = "memory"; reg = <0x70000000 0x10000000>; };arch/arm/boot/dts/at91sam9n12.dtsi +3
-1@@ -7,7 +7,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>@@ -15,6 +14,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9N12 SoC"; compatible = "atmel,at91sam9n12"; interrupt-parent = <&aic>;@@ -47,6 +48,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x10000000>; };arch/arm/boot/dts/at91sam9rl.dtsi +3
-1@@ -7,7 +7,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/clock/at91.h> #include <dt-bindings/interrupt-controller/irq.h>@@ -15,6 +14,8 @@ #include <dt-bindings/pwm/pwm.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9RL family SoC"; compatible = "atmel,at91sam9rl", "atmel,at91sam9"; interrupt-parent = <&aic>;@@ -48,6 +49,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x04000000>; };arch/arm/boot/dts/at91sam9x5.dtsi +3
-1@@ -9,7 +9,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>@@ -17,6 +16,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel AT91SAM9x5 family SoC"; compatible = "atmel,at91sam9x5"; interrupt-parent = <&aic>;@@ -49,6 +50,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x10000000>; };arch/arm/boot/dts/atlas6-evb.dts +1
-0@@ -15,6 +15,7 @@ compatible = "sirf,atlas6-cb", "sirf,atlas6"; memory { + device_type = "memory"; reg = <0x00000000 0x20000000>; };arch/arm/boot/dts/atlas6.dtsi +0
-1@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" / { compatible = "sirf,atlas6"; #address-cells = <1>;arch/arm/boot/dts/atlas7.dtsi +0
-1@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" / { compatible = "sirf,atlas7"; #address-cells = <1>;arch/arm/boot/dts/axm55xx.dtsi +2
-2@@ -12,9 +12,9 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/lsi,axm5516-clks.h> -#include "skeleton64.dtsi" - / { + #address-cells = <2>; + #size-cells = <2>; interrupt-parent = <&gic>; aliases {arch/arm/boot/dts/bcm-cygnus.dtsi +7
-2@@ -34,9 +34,9 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/bcm-cygnus.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "brcm,cygnus"; model = "Broadcom Cygnus SoC"; interrupt-parent = <&gic>;@@ -45,6 +45,11 @@ ethernet0 = ð0; }; + memory { + device_type = "memory"; + reg = <0 0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>;arch/arm/boot/dts/bcm-nsp.dtsi +2
-2@@ -34,9 +34,9 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/bcm-nsp.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "brcm,nsp"; model = "Broadcom Northstar Plus SoC"; interrupt-parent = <&gic>;arch/arm/boot/dts/bcm11351.dtsi +2
-2@@ -16,9 +16,9 @@ #include "dt-bindings/clock/bcm281xx.h" -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; model = "BCM11351 SoC"; compatible = "brcm,bcm11351"; interrupt-parent = <&gic>;arch/arm/boot/dts/bcm21664-garnet.dts +1
-0@@ -22,6 +22,7 @@ compatible = "brcm,bcm21664-garnet", "brcm,bcm21664"; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1 GB */ };arch/arm/boot/dts/bcm21664.dtsi +2
-2@@ -16,9 +16,9 @@ #include "dt-bindings/clock/bcm21664.h" -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; model = "BCM21664 SoC"; compatible = "brcm,bcm21664"; interrupt-parent = <&gic>;arch/arm/boot/dts/bcm23550-sparrow.dts +1
-0@@ -46,6 +46,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ }; };arch/arm/boot/dts/bcm23550.dtsi +2
-2@@ -36,9 +36,9 @@ /* BCM23550 and BCM21664 have almost identical clocks */ #include "dt-bindings/clock/bcm21664.h" -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; model = "BCM23550 SoC"; compatible = "brcm,bcm23550"; interrupt-parent = <&gic>;arch/arm/boot/dts/bcm28155-ap.dts +1
-0@@ -22,6 +22,7 @@ compatible = "brcm,bcm28155-ap", "brcm,bcm11351"; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1 GB */ };arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts +1
-0@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts +1
-0@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts +1
-0@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts +1
-0@@ -16,6 +16,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +1
-0@@ -16,6 +16,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +1
-0@@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };arch/arm/boot/dts/bcm47094-linksys-panamera.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts +1
-0@@ -16,6 +16,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x08000000>; };arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };arch/arm/boot/dts/bcm47094-netgear-r8500.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000 0x88000000 0x18000000>; };arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm47189-luxul-xap-810.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm47189-tenda-ac9.dts +1
-0@@ -17,6 +17,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm5301x.dtsi +2
-1@@ -13,9 +13,10 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; chipcommonA {arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts +1
-0@@ -20,6 +20,7 @@ }; memory@0 { + device_type = "memory"; reg = <0x00000000 0x08000000>, <0x68000000 0x08000000>; };arch/arm/boot/dts/bcm53573.dtsi +2
-1@@ -8,9 +8,10 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; aliases {arch/arm/boot/dts/bcm63138.dtsi +2
-2@@ -6,9 +6,9 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "brcm,bcm63138"; model = "Broadcom BCM63138 DSL SoC"; interrupt-parent = <&gic>;arch/arm/boot/dts/bcm7445.dtsi +0
-2@@ -1,8 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" - / { #address-cells = <2>; #size-cells = <2>;arch/arm/boot/dts/bcm947189acdbmr.dts +1
-0@@ -18,6 +18,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/bcm953012er.dts +1
-0@@ -40,6 +40,7 @@ compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708"; memory { + device_type = "memory"; reg = <0x00000000 0x8000000>; };arch/arm/boot/dts/bcm953012hr.dts +1
-0@@ -46,6 +46,7 @@ }; memory@80000000 { + device_type = "memory"; reg = <0x80000000 0x10000000>; }; };arch/arm/boot/dts/bcm953012k.dts +1
-0@@ -44,6 +44,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x10000000>; }; };arch/arm/boot/dts/cx92755.dtsi +2
-2@@ -44,9 +44,9 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "cnxt,cx92755"; interrupt-parent = <&intc>;arch/arm/boot/dts/dove.dtsi +2
-2@@ -1,12 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -/include/ "skeleton.dtsi" - #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; compatible = "marvell,dove"; model = "Marvell Armada 88AP510 SoC"; interrupt-parent = <&intc>;arch/arm/boot/dts/ep7209.dtsi +2
-2@@ -6,11 +6,11 @@ /dts-v1/; -#include "skeleton.dtsi" - #include <dt-bindings/clock/clps711x-clock.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Cirrus Logic EP7209"; compatible = "cirrus,ep7209";arch/arm/boot/dts/ep7211-edb7211.dts +1
-0@@ -12,6 +12,7 @@ compatible = "cirrus,edb7211", "cirrus,ep7211", "cirrus,ep7209"; memory { + device_type = "memory"; reg = <0xc0000000 0x02000000>; };arch/arm/boot/dts/integrator.dtsi +8
-2@@ -3,9 +3,15 @@ * SoC core Device Tree for the ARM Integrator platforms */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; + + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + core-module@10000000 { compatible = "arm,core-module-integrator", "syscon", "simple-mfd"; reg = <0x10000000 0x200>;arch/arm/boot/dts/kirkwood.dtsi +2
-1@@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -/include/ "skeleton.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; compatible = "marvell,kirkwood"; interrupt-parent = <&intc>;arch/arm/boot/dts/lpc32xx.dtsi +2
-2@@ -11,12 +11,12 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include "skeleton.dtsi" - #include <dt-bindings/clock/lpc32xx-clock.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "nxp,lpc3220"; interrupt-parent = <&mic>;arch/arm/boot/dts/ls1021a.dtsi +7
-1@@ -45,11 +45,12 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton64.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> / { + #address-cells = <2>; + #size-cells = <2>; compatible = "fsl,ls1021a"; interrupt-parent = <&gic>;@@ -88,6 +89,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x0>; + }; + sysclk: sysclk { compatible = "fixed-clock"; #clock-cells = <0>;arch/arm/boot/dts/meson.dtsi +2
-1@@ -47,9 +47,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -/include/ "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; L2: l2-cache-controller@c4200000 {arch/arm/boot/dts/meson6-atv1200.dts +1
-0@@ -57,6 +57,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; }; };arch/arm/boot/dts/meson8-minix-neo-x8.dts +1
-0@@ -53,6 +53,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };arch/arm/boot/dts/meson8b-ec100.dts +1
-0@@ -23,6 +23,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; };arch/arm/boot/dts/meson8b-mxq.dts +1
-0@@ -56,6 +56,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; }; };arch/arm/boot/dts/meson8b-odroidc1.dts +1
-0@@ -62,6 +62,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; };arch/arm/boot/dts/meson8m2-mxiii-plus.dts +1
-0@@ -28,6 +28,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };arch/arm/boot/dts/mmp2-brownstone.dts +1
-0@@ -19,6 +19,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x08000000>; };arch/arm/boot/dts/mmp2.dtsi +3
-1@@ -7,10 +7,12 @@ * publishhed by the Free Software Foundation. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/marvell,mmp2.h> / { + #address-cells = <1>; + #size-cells = <1>; + aliases { serial0 = &uart1; serial1 = &uart2;arch/arm/boot/dts/moxart.dtsi +2
-1@@ -5,10 +5,11 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "moxa,moxart"; model = "MOXART"; interrupt-parent = <&intc>;arch/arm/boot/dts/mt2701-evb.dts +1
-0@@ -13,6 +13,7 @@ compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; memory { + device_type = "memory"; reg = <0 0x80000000 0 0x40000000>; };arch/arm/boot/dts/mt2701.dtsi +2
-1@@ -12,10 +12,11 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/memory/mt2701-larb-port.h> #include <dt-bindings/reset/mt2701-resets.h> -#include "skeleton64.dtsi" #include "mt2701-pinfunc.h" / { + #address-cells = <2>; + #size-cells = <2>; compatible = "mediatek,mt2701"; interrupt-parent = <&cirq>;arch/arm/boot/dts/mt6580-evbp1.dts +1
-0@@ -22,6 +22,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x20000000>; }; };arch/arm/boot/dts/mt6580.dtsi +0
-1@@ -7,7 +7,6 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { compatible = "mediatek,mt6580";arch/arm/boot/dts/mt6589-aquaris5.dts +1
-0@@ -18,6 +18,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; };arch/arm/boot/dts/mt6589.dtsi +2
-1@@ -7,9 +7,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "mediatek,mt6589"; interrupt-parent = <&sysirq>;arch/arm/boot/dts/mt6592-evb.dts +1
-1@@ -13,7 +13,7 @@ compatible = "mediatek,mt6592-evb", "mediatek,mt6592"; memory { + device_type = "memory"; reg = <0x80000000 0x40000000>; }; }; -arch/arm/boot/dts/mt6592.dtsi +2
-1@@ -7,9 +7,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; compatible = "mediatek,mt6592"; interrupt-parent = <&sysirq>;arch/arm/boot/dts/mt8127-moose.dts +1
-0@@ -13,6 +13,7 @@ compatible = "mediatek,mt8127-moose", "mediatek,mt8127"; memory { + device_type = "memory"; reg = <0 0x80000000 0 0x40000000>; }; };arch/arm/boot/dts/mt8127.dtsi +2
-1@@ -7,9 +7,10 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton64.dtsi" / { + #address-cells = <2>; + #size-cells = <2>; compatible = "mediatek,mt8127"; interrupt-parent = <&sysirq>;arch/arm/boot/dts/mt8135-evbp1.dts +1
-0@@ -13,6 +13,7 @@ compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135"; memory { + device_type = "memory"; reg = <0 0x80000000 0 0x40000000>; }; };arch/arm/boot/dts/mt8135.dtsi +2
-1@@ -9,10 +9,11 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/mt8135-resets.h> -#include "skeleton64.dtsi" #include "mt8135-pinfunc.h" / { + #address-cells = <2>; + #size-cells = <2>; compatible = "mediatek,mt8135"; interrupt-parent = <&sysirq>;arch/arm/boot/dts/nspire.dtsi +2
-2@@ -9,9 +9,9 @@ * */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; cpus {arch/arm/boot/dts/orion5x-lacie-d2-network.dts +1
-0@@ -19,6 +19,7 @@ compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts +1
-0@@ -25,6 +25,7 @@ compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };arch/arm/boot/dts/orion5x-lswsgl.dts +1
-0@@ -55,6 +55,7 @@ compatible = "buffalo,lswsgl", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x8000000>; /* 128 MB */ };arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts +1
-0@@ -19,6 +19,7 @@ compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };arch/arm/boot/dts/orion5x-netgear-wnr854t.dts +1
-0@@ -21,6 +21,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x2000000>; /* 32 MB */ };arch/arm/boot/dts/orion5x-rd88f5182-nas.dts +1
-0@@ -16,6 +16,7 @@ compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { + device_type = "memory"; reg = <0x00000000 0x4000000>; /* 64 MB */ };arch/arm/boot/dts/orion5x.dtsi +2
-2@@ -6,11 +6,11 @@ * warranty of any kind, whether express or implied. */ -#include "skeleton.dtsi" - #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) / { + #address-cells = <1>; + #size-cells = <1>; model = "Marvell Orion5x SoC"; compatible = "marvell,orion5x"; interrupt-parent = <&intc>;arch/arm/boot/dts/ox810se.dtsi +3
-1@@ -6,11 +6,12 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" #include <dt-bindings/clock/oxsemi,ox810se.h> #include <dt-bindings/reset/oxsemi,ox810se.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "oxsemi,ox810se"; cpus {@@ -25,6 +26,7 @@ }; memory { + device_type = "memory"; /* Max 256MB @ 0x48000000 */ reg = <0x48000000 0x10000000>; };arch/arm/boot/dts/ox820.dtsi +3
-1@@ -6,12 +6,13 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/oxsemi,ox820.h> #include <dt-bindings/reset/oxsemi,ox820.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "oxsemi,ox820"; cpus {@@ -35,6 +36,7 @@ }; memory { + device_type = "memory"; /* Max 512MB @ 0x60000000 */ reg = <0x60000000 0x20000000>; };arch/arm/boot/dts/picoxcell-pc3x2.dtsi +0
-1@@ -10,7 +10,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -/include/ "skeleton.dtsi" / { model = "Picochip picoXcell PC3X2"; compatible = "picochip,pc3x2";arch/arm/boot/dts/picoxcell-pc3x3.dtsi +0
-1@@ -10,7 +10,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -/include/ "skeleton.dtsi" / { model = "Picochip picoXcell PC3X3"; compatible = "picochip,pc3x3";arch/arm/boot/dts/prima2-evb.dts +1
-0@@ -15,6 +15,7 @@ compatible = "sirf,prima2", "sirf,prima2-cb"; memory { + device_type = "memory"; reg = <0x00000000 0x20000000>; };arch/arm/boot/dts/prima2.dtsi +0
-1@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" / { compatible = "sirf,prima2"; #address-cells = <1>;arch/arm/boot/dts/pxa168.dtsi +3
-1@@ -7,10 +7,12 @@ * publishhed by the Free Software Foundation. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/marvell,pxa168.h> / { + #address-cells = <1>; + #size-cells = <1>; + aliases { serial0 = &uart1; serial1 = &uart2;arch/arm/boot/dts/pxa2xx.dtsi +2
-1@@ -6,7 +6,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include "dt-bindings/clock/pxa-clock.h" #define PMGROUP(pin) #pin@@ -29,6 +28,8 @@ } / { + #address-cells = <1>; + #size-cells = <1>; model = "Marvell PXA2xx family SoC"; compatible = "marvell,pxa2xx"; interrupt-parent = <&pxairq>;arch/arm/boot/dts/pxa910.dtsi +3
-1@@ -7,10 +7,12 @@ * publishhed by the Free Software Foundation. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/marvell,pxa910.h> / { + #address-cells = <1>; + #size-cells = <1>; + aliases { serial0 = &uart1; serial1 = &uart2;arch/arm/boot/dts/qcom-apq8064.dtsi +7
-1@@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-msm8960.h> #include <dt-bindings/reset/qcom,gcc-msm8960.h> #include <dt-bindings/clock/qcom,mmcc-msm8960.h>@@ -10,6 +9,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm APQ8064"; compatible = "qcom,apq8064"; interrupt-parent = <&intc>;@@ -94,6 +95,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + thermal-zones { cpu-thermal0 { polling-delay-passive = <250>;arch/arm/boot/dts/qcom-apq8084.dtsi +7
-2@@ -1,12 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "skeleton.dtsi" - #include <dt-bindings/clock/qcom,gcc-apq8084.h> #include <dt-bindings/gpio/gpio.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm APQ 8084"; compatible = "qcom,apq8084"; interrupt-parent = <&intc>;@@ -87,6 +87,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + firmware { scm { compatible = "qcom,scm";arch/arm/boot/dts/qcom-ipq4019.dtsi +7
-1@@ -13,12 +13,13 @@ /dts-v1/; -#include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-ipq4019.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm Technologies, Inc. IPQ4019"; compatible = "qcom,ipq4019"; interrupt-parent = <&intc>;@@ -133,6 +134,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + pmu { compatible = "arm,cortex-a7-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |arch/arm/boot/dts/qcom-ipq8064.dtsi +7
-1@@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-ipq806x.h> #include <dt-bindings/clock/qcom,lcc-ipq806x.h>@@ -11,6 +10,8 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm IPQ8064"; compatible = "qcom,ipq8064"; interrupt-parent = <&intc>;@@ -45,6 +46,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +1
-0@@ -50,6 +50,7 @@ compatible = "swir,wp8548", "qcom,mdm9615"; memory { + device_type = "memory"; reg = <0x48000000 0x7F00000>; }; };arch/arm/boot/dts/qcom-mdm9615.dtsi +2
-2@@ -45,8 +45,6 @@ /dts-v1/; -/include/ "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-mdm9615.h> #include <dt-bindings/reset/qcom,gcc-mdm9615.h>@@ -54,6 +52,8 @@ #include <dt-bindings/soc/qcom,gsbi.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MDM9615"; compatible = "qcom,mdm9615"; interrupt-parent = <&intc>;arch/arm/boot/dts/qcom-msm8660.dtsi +7
-2@@ -1,14 +1,14 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -/include/ "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8660.h> #include <dt-bindings/soc/qcom,gsbi.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MSM8660"; compatible = "qcom,msm8660"; interrupt-parent = <&intc>;@@ -39,6 +39,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + cpu-pmu { compatible = "qcom,scorpion-mp-pmu"; interrupts = <1 9 0x304>;arch/arm/boot/dts/qcom-msm8960.dtsi +7
-2@@ -1,14 +1,14 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -/include/ "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8960.h> #include <dt-bindings/mfd/qcom-rpm.h> #include <dt-bindings/soc/qcom,gsbi.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MSM8960"; compatible = "qcom,msm8960"; interrupt-parent = <&intc>;@@ -44,6 +44,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 10 0x304>;arch/arm/boot/dts/qcom-msm8974.dtsi +7
-1@@ -6,9 +6,10 @@ #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/reset/qcom,gcc-msm8974.h> #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; model = "Qualcomm MSM8974"; compatible = "qcom,msm8974"; interrupt-parent = <&intc>;@@ -130,6 +131,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + thermal-zones { cpu-thermal0 { polling-delay-passive = <250>;arch/arm/boot/dts/sama5d2.dtsi +3
-1@@ -43,13 +43,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/at91.h> #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel SAMA5D2 family SoC"; compatible = "atmel,sama5d2"; interrupt-parent = <&aic>;@@ -113,6 +114,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x20000000>; };arch/arm/boot/dts/sama5d3.dtsi +3
-1@@ -8,7 +8,6 @@ * Licensed under GPLv2 or later. */ -#include "skeleton.dtsi" #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h>@@ -16,6 +15,8 @@ #include <dt-bindings/clock/at91.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel SAMA5D3 family SoC"; compatible = "atmel,sama5d3", "atmel,sama5"; interrupt-parent = <&aic>;@@ -56,6 +57,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x8000000>; };arch/arm/boot/dts/sama5d4.dtsi +3
-1@@ -43,7 +43,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include <dt-bindings/clock/at91.h> #include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h>@@ -51,6 +50,8 @@ #include <dt-bindings/gpio/gpio.h> / { + #address-cells = <1>; + #size-cells = <1>; model = "Atmel SAMA5D4 family SoC"; compatible = "atmel,sama5d4"; interrupt-parent = <&aic>;@@ -90,6 +91,7 @@ }; memory { + device_type = "memory"; reg = <0x20000000 0x20000000>; };arch/arm/boot/dts/skeleton.dtsi deleted +0
-18@@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * This file is deprecated, and will be removed once existing users have been - * updated. New dts{,i} files should *not* include skeleton.dtsi, and should - * instead explicitly provide the below nodes only as required. - * - * Skeleton device tree; the bare minimum needed to boot; just include and - * add a compatible value. The bootloader will typically populate the memory - * node. - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - chosen { }; - aliases { }; - memory { device_type = "memory"; reg = <0 0>; }; -};arch/arm/boot/dts/skeleton64.dtsi deleted +0
-14@@ -1,14 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Skeleton device tree in the 64 bits version; the bare minimum - * needed to boot; just include and add a compatible value. The - * bootloader will typically populate the memory node. - */ - -/ { - #address-cells = <2>; - #size-cells = <2>; - chosen { }; - aliases { }; - memory { device_type = "memory"; reg = <0 0 0 0>; }; -};arch/arm/boot/dts/spear13xx.dtsi +2
-2@@ -11,9 +11,9 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; cpus {arch/arm/boot/dts/spear3xx.dtsi +2
-2@@ -11,9 +11,9 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&vic>; cpus {arch/arm/boot/dts/spear600.dtsi +2
-2@@ -9,9 +9,9 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "st,spear600"; cpus {arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +1
-1@@ -4,13 +4,13 @@ */ #include <dt-bindings/gpio/gpio.h> -#include "skeleton.dtsi" / { #address-cells = <1>; #size-cells = <1>; memory { + device_type = "memory"; reg = <0x00000000 0x04000000>, <0x08000000 0x04000000>; };arch/arm/boot/dts/ste-u300.dts +1
-1@@ -4,7 +4,6 @@ */ /dts-v1/; -/include/ "skeleton.dtsi" / { model = "ST-Ericsson U300";@@ -22,6 +21,7 @@ }; memory { + device_type = "memory"; reg = <0x48000000 0x03c00000>; };arch/arm/boot/dts/stm32429i-eval.dts +1
-0@@ -61,6 +61,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x2000000>; };arch/arm/boot/dts/stm32746g-eval.dts +1
-0@@ -55,6 +55,7 @@ }; memory { + device_type = "memory"; reg = <0xc0000000 0x2000000>; };arch/arm/boot/dts/stm32f429-disco.dts +1
-0@@ -60,6 +60,7 @@ }; memory { + device_type = "memory"; reg = <0x90000000 0x800000>; };arch/arm/boot/dts/stm32f429.dtsi +3
-1@@ -45,12 +45,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32fx-clock.h> #include <dt-bindings/mfd/stm32f4-rcc.h> / { + #address-cells = <1>; + #size-cells = <1>; + clocks { clk_hse: clk-hse { #clock-cells = <0>;arch/arm/boot/dts/stm32f469-disco.dts +1
-0@@ -61,6 +61,7 @@ }; memory { + device_type = "memory"; reg = <0x00000000 0x1000000>; };arch/arm/boot/dts/stm32f746-disco.dts +1
-0@@ -56,6 +56,7 @@ }; memory { + device_type = "memory"; reg = <0xC0000000 0x800000>; };arch/arm/boot/dts/stm32f746.dtsi +3
-1@@ -40,12 +40,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32fx-clock.h> #include <dt-bindings/mfd/stm32f7-rcc.h> / { + #address-cells = <1>; + #size-cells = <1>; + clocks { clk_hse: clk-hse { #clock-cells = <0>;arch/arm/boot/dts/stm32f769-disco.dts +1
-0@@ -56,6 +56,7 @@ }; memory { + device_type = "memory"; reg = <0xC0000000 0x1000000>; };arch/arm/boot/dts/stm32h743.dtsi +3
-1@@ -40,13 +40,15 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32h7-clks.h> #include <dt-bindings/mfd/stm32h7-rcc.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; + clocks { clk_hse: clk-hse { #clock-cells = <0>;arch/arm/boot/dts/stm32h743i-disco.dts +1
-0@@ -54,6 +54,7 @@ }; memory { + device_type = "memory"; reg = <0xd0000000 0x2000000>; };arch/arm/boot/dts/stm32h743i-eval.dts +1
-0@@ -54,6 +54,7 @@ }; memory { + device_type = "memory"; reg = <0xd0000000 0x2000000>; };arch/arm/boot/dts/stm32mp157c-ed1.dts +1
-0@@ -17,6 +17,7 @@ }; memory@c0000000 { + device_type = "memory"; reg = <0xC0000000 0x40000000>; };arch/arm/boot/dts/sun5i-a10s.dtsi +2
-2@@ -42,13 +42,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include "sun5i.dtsi" #include <dt-bindings/dma/sun4i-a10.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; aliases {arch/arm/boot/dts/sun5i-a13.dtsi +2
-2@@ -42,13 +42,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include "sun5i.dtsi" #include <dt-bindings/thermal/thermal.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; thermal-zones {arch/arm/boot/dts/sun5i.dtsi +7
-2@@ -42,13 +42,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/clock/sun5i-ccu.h> #include <dt-bindings/dma/sun4i-a10.h> #include <dt-bindings/reset/sun5i-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&intc>; cpus {@@ -88,6 +88,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + clocks { #address-cells = <1>; #size-cells = <1>;arch/arm/boot/dts/sun6i-a31.dtsi +3
-2@@ -42,8 +42,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h>@@ -51,6 +49,8 @@ #include <dt-bindings/reset/sun6i-a31-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; aliases {@@ -197,6 +197,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };arch/arm/boot/dts/sun7i-a20.dtsi +3
-2@@ -42,8 +42,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> #include <dt-bindings/dma/sun4i-a10.h>@@ -51,6 +49,8 @@ #include <dt-bindings/reset/sun4i-a10-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; aliases {@@ -171,6 +171,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };arch/arm/boot/dts/sun8i-a23-a33.dtsi +2
-2@@ -42,14 +42,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> / { + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; chosen {arch/arm/boot/dts/sun8i-a23.dtsi +1
-0@@ -46,6 +46,7 @@ / { memory { + device_type = "memory"; reg = <0x40000000 0x40000000>; };arch/arm/boot/dts/sun8i-a33.dtsi +1
-0@@ -187,6 +187,7 @@ }; memory { + device_type = "memory"; reg = <0x40000000 0x80000000>; };arch/arm/boot/dts/versatile-ab.dts +1
-1@@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -/include/ "skeleton.dtsi" / { model = "ARM Versatile AB";@@ -21,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x0 0x08000000>; };arch/arm/boot/dts/vt8500.dtsi +7
-2@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "via,vt8500"; cpus {@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;arch/arm/boot/dts/wm8505.dtsi +7
-2@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8505"; cpus {@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;arch/arm/boot/dts/wm8650.dtsi +7
-2@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8650"; cpus {@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;arch/arm/boot/dts/wm8750.dtsi +7
-2@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8750"; cpus {@@ -21,6 +21,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;arch/arm/boot/dts/wm8850.dtsi +7
-2@@ -6,9 +6,9 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; compatible = "wm,wm8850"; cpus {@@ -22,6 +22,11 @@ }; }; + memory { + device_type = "memory"; + reg = <0x0 0x0>; + }; + aliases { serial0 = &uart0; serial1 = &uart1;arch/arm/boot/dts/zx296702-ad1.dts +1
-0@@ -14,6 +14,7 @@ }; memory { + device_type = "memory"; reg = <0x50000000 0x20000000>; }; };arch/arm/boot/dts/zx296702.dtsi +3
-1@@ -1,10 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -#include "skeleton.dtsi" #include <dt-bindings/clock/zx296702-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { + #address-cells = <1>; + #size-cells = <1>; + cpus { #address-cells = <1>; #size-cells = <0>;Signature · 1 line
2.19.1
Signature · 3 lines
Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Quoted 170 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.Rob
arch/arm/boot/dts/alphascale-asm9260.dtsi | 3 ++- arch/arm/boot/dts/alpine.dtsi | 8 +++++++- arch/arm/boot/dts/arm-realview-eb.dtsi | 4 +++- arch/arm/boot/dts/arm-realview-pb1176.dts | 4 +++- arch/arm/boot/dts/arm-realview-pb11mp.dts | 4 +++- arch/arm/boot/dts/arm-realview-pbx.dtsi | 4 +++- arch/arm/boot/dts/armada-38x.dtsi | 4 +++- arch/arm/boot/dts/armada-39x.dtsi | 3 ++- arch/arm/boot/dts/artpec6.dtsi | 3 ++- arch/arm/boot/dts/at91rm9200.dtsi | 4 +++- arch/arm/boot/dts/at91sam9260.dtsi | 4 +++- arch/arm/boot/dts/at91sam9261.dtsi | 4 +++- arch/arm/boot/dts/at91sam9263.dtsi | 4 +++- arch/arm/boot/dts/at91sam9g45.dtsi | 4 +++- arch/arm/boot/dts/at91sam9n12.dtsi | 4 +++- arch/arm/boot/dts/at91sam9rl.dtsi | 4 +++- arch/arm/boot/dts/at91sam9x5.dtsi | 4 +++- arch/arm/boot/dts/atlas6-evb.dts | 1 + arch/arm/boot/dts/atlas6.dtsi | 1 - arch/arm/boot/dts/atlas7.dtsi | 1 - arch/arm/boot/dts/axm55xx.dtsi | 4 ++-- arch/arm/boot/dts/bcm-cygnus.dtsi | 9 +++++++-- arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++-- arch/arm/boot/dts/bcm11351.dtsi | 4 ++-- arch/arm/boot/dts/bcm21664-garnet.dts | 1 + arch/arm/boot/dts/bcm21664.dtsi | 4 ++-- arch/arm/boot/dts/bcm23550-sparrow.dts | 1 + arch/arm/boot/dts/bcm23550.dtsi | 4 ++-- arch/arm/boot/dts/bcm28155-ap.dts | 1 + arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 1 + .../boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 1 + arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 1 + .../boot/dts/bcm47081-tplink-archer-c5-v2.dts | 1 + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 + .../arm/boot/dts/bcm47094-linksys-panamera.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 1 + arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 1 + .../boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 1 + arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 1 + arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 1 + arch/arm/boot/dts/bcm5301x.dtsi | 3 ++- .../boot/dts/bcm53340-ubnt-unifi-switch8.dts | 1 + arch/arm/boot/dts/bcm53573.dtsi | 3 ++- arch/arm/boot/dts/bcm63138.dtsi | 4 ++-- arch/arm/boot/dts/bcm7445.dtsi | 2 -- arch/arm/boot/dts/bcm947189acdbmr.dts | 1 + arch/arm/boot/dts/bcm953012er.dts | 1 + arch/arm/boot/dts/bcm953012hr.dts | 1 + arch/arm/boot/dts/bcm953012k.dts | 1 + arch/arm/boot/dts/cx92755.dtsi | 4 ++-- arch/arm/boot/dts/dove.dtsi | 4 ++-- arch/arm/boot/dts/ep7209.dtsi | 4 ++-- arch/arm/boot/dts/ep7211-edb7211.dts | 1 + arch/arm/boot/dts/integrator.dtsi | 10 ++++++++-- arch/arm/boot/dts/kirkwood.dtsi | 3 ++- arch/arm/boot/dts/lpc32xx.dtsi | 4 ++-- arch/arm/boot/dts/ls1021a.dtsi | 8 +++++++- arch/arm/boot/dts/meson.dtsi | 3 ++- arch/arm/boot/dts/meson6-atv1200.dts | 1 + arch/arm/boot/dts/meson8-minix-neo-x8.dts | 1 + arch/arm/boot/dts/meson8b-ec100.dts | 1 + arch/arm/boot/dts/meson8b-mxq.dts | 1 + arch/arm/boot/dts/meson8b-odroidc1.dts | 1 + arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 1 + arch/arm/boot/dts/mmp2-brownstone.dts | 1 + arch/arm/boot/dts/mmp2.dtsi | 4 +++- arch/arm/boot/dts/moxart.dtsi | 3 ++- arch/arm/boot/dts/mt2701-evb.dts | 1 + arch/arm/boot/dts/mt2701.dtsi | 3 ++- arch/arm/boot/dts/mt6580-evbp1.dts | 1 + arch/arm/boot/dts/mt6580.dtsi | 1 - arch/arm/boot/dts/mt6589-aquaris5.dts | 1 + arch/arm/boot/dts/mt6589.dtsi | 3 ++- arch/arm/boot/dts/mt6592-evb.dts | 2 +- arch/arm/boot/dts/mt6592.dtsi | 3 ++- arch/arm/boot/dts/mt8127-moose.dts | 1 + arch/arm/boot/dts/mt8127.dtsi | 3 ++- arch/arm/boot/dts/mt8135-evbp1.dts | 1 + arch/arm/boot/dts/mt8135.dtsi | 3 ++- arch/arm/boot/dts/nspire.dtsi | 4 ++-- arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 1 + .../orion5x-lacie-ethernet-disk-mini-v2.dts | 1 + arch/arm/boot/dts/orion5x-lswsgl.dts | 1 + .../dts/orion5x-maxtor-shared-storage-2.dts | 1 + arch/arm/boot/dts/orion5x-netgear-wnr854t.dts | 1 + arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 1 + arch/arm/boot/dts/orion5x.dtsi | 4 ++-- arch/arm/boot/dts/ox810se.dtsi | 4 +++- arch/arm/boot/dts/ox820.dtsi | 4 +++- arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 1 - arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 1 - arch/arm/boot/dts/prima2-evb.dts | 1 + arch/arm/boot/dts/prima2.dtsi | 1 - arch/arm/boot/dts/pxa168.dtsi | 4 +++- arch/arm/boot/dts/pxa2xx.dtsi | 3 ++- arch/arm/boot/dts/pxa910.dtsi | 4 +++- arch/arm/boot/dts/qcom-apq8064.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-apq8084.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 +++++++- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 1 + arch/arm/boot/dts/qcom-mdm9615.dtsi | 4 ++-- arch/arm/boot/dts/qcom-msm8660.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-msm8960.dtsi | 9 +++++++-- arch/arm/boot/dts/qcom-msm8974.dtsi | 8 +++++++- arch/arm/boot/dts/sama5d2.dtsi | 4 +++- arch/arm/boot/dts/sama5d3.dtsi | 4 +++- arch/arm/boot/dts/sama5d4.dtsi | 4 +++- arch/arm/boot/dts/skeleton.dtsi | 18 ------------------ arch/arm/boot/dts/skeleton64.dtsi | 14 -------------- arch/arm/boot/dts/spear13xx.dtsi | 4 ++-- arch/arm/boot/dts/spear3xx.dtsi | 4 ++-- arch/arm/boot/dts/spear600.dtsi | 4 ++-- arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 2 +- arch/arm/boot/dts/ste-u300.dts | 2 +- arch/arm/boot/dts/stm32429i-eval.dts | 1 + arch/arm/boot/dts/stm32746g-eval.dts | 1 + arch/arm/boot/dts/stm32f429-disco.dts | 1 + arch/arm/boot/dts/stm32f429.dtsi | 4 +++- arch/arm/boot/dts/stm32f469-disco.dts | 1 + arch/arm/boot/dts/stm32f746-disco.dts | 1 + arch/arm/boot/dts/stm32f746.dtsi | 4 +++- arch/arm/boot/dts/stm32f769-disco.dts | 1 + arch/arm/boot/dts/stm32h743.dtsi | 4 +++- arch/arm/boot/dts/stm32h743i-disco.dts | 1 + arch/arm/boot/dts/stm32h743i-eval.dts | 1 + arch/arm/boot/dts/stm32mp157c-ed1.dts | 1 + arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++-- arch/arm/boot/dts/sun5i-a13.dtsi | 4 ++-- arch/arm/boot/dts/sun5i.dtsi | 9 +++++++-- arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++-- arch/arm/boot/dts/sun7i-a20.dtsi | 5 +++-- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++-- arch/arm/boot/dts/sun8i-a23.dtsi | 1 + arch/arm/boot/dts/sun8i-a33.dtsi | 1 + arch/arm/boot/dts/versatile-ab.dts | 2 +- arch/arm/boot/dts/vt8500.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8505.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8650.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8750.dtsi | 9 +++++++-- arch/arm/boot/dts/wm8850.dtsi | 9 +++++++-- arch/arm/boot/dts/zx296702-ad1.dts | 1 + arch/arm/boot/dts/zx296702.dtsi | 4 +++- 149 files changed, 330 insertions(+), 153 deletions(-) delete mode 100644 arch/arm/boot/dts/skeleton.dtsi delete mode 100644 arch/arm/boot/dts/skeleton64.dtsi
[...]
Quoted 46 lines
arch/arm/boot/dts/ox810se.dtsi +3
-1@@ -6,11 +6,12 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" #include <dt-bindings/clock/oxsemi,ox810se.h> #include <dt-bindings/reset/oxsemi,ox810se.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "oxsemi,ox810se"; cpus {@@ -25,6 +26,7 @@ }; memory { + device_type = "memory"; /* Max 256MB @ 0x48000000 */ reg = <0x48000000 0x10000000>; };arch/arm/boot/dts/ox820.dtsi +2
-1@@ -6,12 +6,13 @@ * Licensed under GPLv2 or later */ -/include/ "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/oxsemi,ox820.h> #include <dt-bindings/reset/oxsemi,ox820.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "oxsemi,ox820"; cpus {
arch/arm/boot/dts/ox820.dtsi line 42
Quoted 7 lines
arch/arm/boot/dts/ox820.dtsi +1
-0@@ -35,6 +36,7 @@ }; memory { + device_type = "memory"; /* Max 512MB @ 0x60000000 */ reg = <0x60000000 0x20000000>; };
[...]
For Oxnas,
Thanks,
Neil
Hi Rob,
Quoted 9 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.
Quoted 7 lines
Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.arch/arm/boot/dts/alpine.dtsi | 8 +++++++-
For the above file,
Acked-by Antoine Tenart <[email protected]>
Thanks!
Antoine
Signature · 3 lines
Antoine Ténart, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hi Rob
Quoted 16 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>---
Yes, I'm being lazy and not splitting this up into dozens of sub-arch patches. I don't think this should conflict nor should we be getting new dependencies onskeleton.dtsi. So please apply directly to arm-soc.Rob
...
Quoted 4 lines
arch/arm/boot/dts/stm32429i-eval.dts | 1 + arch/arm/boot/dts/stm32746g-eval.dts | 1 + arch/arm/boot/dts/stm32f429-disco.dts | 1 + arch/arm/boot/dts/stm32f429.dtsi | 4 +++-
Quoted 8 lines
arch/arm/boot/dts/stm32f469-disco.dts | 1 + arch/arm/boot/dts/stm32f746-disco.dts | 1 + arch/arm/boot/dts/stm32f746.dtsi | 4 +++- arch/arm/boot/dts/stm32f769-disco.dts | 1 + arch/arm/boot/dts/stm32h743.dtsi | 4 +++- arch/arm/boot/dts/stm32h743i-disco.dts | 1 + arch/arm/boot/dts/stm32h743i-eval.dts | 1 + arch/arm/boot/dts/stm32mp157c-ed1.dts | 1 +
For STM32 files:
Acked-by Alexandre TORGUE <[email protected]>
Regards
Alex
Quoted 1 line · Rob Herring
arch/arm/boot/dts/pxa2xx.dtsi | 3 ++-
Acked-by Robert Jarzmik <[email protected]>
Cheers.
Signature · 1 line
Robert
Quoted 10 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>
[snip]
Quoted 9 lines
arch/arm/boot/dts/lpc32xx.dtsi +0
-1@@ -11,12 +11,12 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include "skeleton.dtsi"
arch/arm/boot/dts/lpc32xx.dtsi line 22
Quoted 10 lines
arch/arm/boot/dts/lpc32xx.dtsi +2
-1- #include <dt-bindings/clock/lpc32xx-clock.h> #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; compatible = "nxp,lpc3220"; interrupt-parent = <&mic>;
For lpc32xx:
--
Best wishes,
Vladimir
Quoted 8 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.
[...]
I gave this a spin through the kernelCI on multiple SoCs, and builds and no new regressions for build or boot that I spotted.
Quoted 7 lines
arch/arm/boot/dts/meson.dtsi | 3 ++- arch/arm/boot/dts/meson6-atv1200.dts | 1 + arch/arm/boot/dts/meson8-minix-neo-x8.dts | 1 + arch/arm/boot/dts/meson8b-ec100.dts | 1 + arch/arm/boot/dts/meson8b-mxq.dts | 1 + arch/arm/boot/dts/meson8b-odroidc1.dts | 1 + arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 1 +
also for the amlogic/meson platforms,
Kevin
Hi Rob,
Quoted 5 lines · Rob Herring
Remove the usage of
skeleton.dtsiin the remaining dts files. It was deprecated since commit9c0da3cc61f1("ARM: dts: explicitly markskeleton.dtsias deprecated"). This will make adding a unit-address to memory nodes easier.
thank you for cleaning this up!
Quoted 5 lines
The main tricky part to removing
skeleton.dtsiis we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition.Signed-off-by Rob Herring <[email protected]>
on Meson8b Odroid-C1:
Quoted 7 lines
arch/arm/boot/dts/meson.dtsi | 3 ++- arch/arm/boot/dts/meson6-atv1200.dts | 1 + arch/arm/boot/dts/meson8-minix-neo-x8.dts | 1 + arch/arm/boot/dts/meson8b-ec100.dts | 1 + arch/arm/boot/dts/meson8b-mxq.dts | 1 + arch/arm/boot/dts/meson8b-odroidc1.dts | 1 + arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 1 +
for the Meson changes:
Regards
Martin