dma-buf: add new dma_fence_chain container v4
Subsystems (5)
PATCH 1/10 dma-buf: add new dma_fence_chain container v4
From: Christian König <[email protected]>
Lockless container implementation similar to a dma_fence_array, but with only two elements per node and automatic garbage collection.
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev reference during garbage collection if it's not a chain fence.
v3: use head and iterator for dma_fence_chain_for_each
v4: fix reference count in dma_fence_chain_enable_signaling
--- drivers/dma-buf/Makefile | 3 +- drivers/dma-buf/dma-fence-chain.c | 241 ++++++++++++++++++++++++++++++ include/linux/dma-fence-chain.h | 81 ++++++++++ 3 files changed, 324 insertions(+), 1 deletion(-) create mode 100644 drivers/dma-buf/dma-fence-chain.c create mode 100644 include/linux/dma-fence-chain.h
drivers/dma-buf/Makefile +2 -1
@@ -1,4 +1,5 @@ -obj-y := dma-buf.o dma-fence.o dma-fence-array.o reservation.o seqno-fence.o +obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \ + reservation.o seqno-fence.o obj-$(CONFIG_SYNC_FILE) += sync_file.o obj-$(CONFIG_SW_SYNC) += sw_sync.o sync_debug.o obj-$(CONFIG_UDMABUF) += udmabuf.o
drivers/dma-buf/dma-fence-chain.c new file +241 -0
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include/linux/dma-fence-chain.h new file +81 -0
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PATCH 2/10 drm/syncobj: remove drm_syncobj_cb and cleanup
From: Christian König <[email protected]>
This completes "drm/syncobj: Drop add/remove_callback from driver interface" and cleans up the implementation a bit.
--- drivers/gpu/drm/drm_syncobj.c | 91 ++++++++++++----------------------- include/drm/drm_syncobj.h | 21 -------- 2 files changed, 30 insertions(+), 82 deletions(-)
drivers/gpu/drm/drm_syncobj.c +30 -61
@@ -56,6 +56,16 @@#include "drm_internal.h" #include <drm/drm_syncobj.h> +struct syncobj_wait_entry { +struct list_head node; +struct task_struct *task; +struct dma_fence *fence; +struct dma_fence_cb fence_cb; +}; + +static void syncobj_wait_syncobj_func (struct drm_syncobj *syncobj, +struct syncobj_wait_entry *wait); +/** * drm_syncobj_find - lookup and reference a sync object. * @file_private: drm file private pointer
@@ -82,58 +92,33 @@ struct drm_syncobj *drm_syncobj_find(struct drm_file *file_private, }EXPORT_SYMBOL (drm_syncobj_find); -static void drm_syncobj_add_callback_locked (struct drm_syncobj *syncobj, -struct drm_syncobj_cb *cb, -drm_syncobj_func_t func) +static void drm_syncobj_fence_add_wait (struct drm_syncobj *syncobj, +struct syncobj_wait_entry *wait) { - cb->func = func; -list_add_tail (&cb->node, &syncobj->cb_list); -} - -static int drm_syncobj_fence_get_or_add_callback (struct drm_syncobj *syncobj, -struct dma_fence **fence, -struct drm_syncobj_cb *cb, -drm_syncobj_func_t func) -{ -int ret; - - *fence =drm_syncobj_fence_get (syncobj); -if (*fence) -return 1 ; +if (wait->fence) +return ;spin_lock (&syncobj->lock);/* We've already tried once to get a fence and failed. Now that we * have the lock, try one more time just to be sure we don't add a * callback when a fence has already been set. */ -if (syncobj->fence) { - *fence =dma_fence_get (rcu_dereference_protected (syncobj->fence, -lockdep_is_held (&syncobj->lock))); - ret =1 ; - }else { - *fence =NULL ; -drm_syncobj_add_callback_locked (syncobj, cb, func); - ret =0 ; - } +if (syncobj->fence) + wait->fence =dma_fence_get ( +rcu_dereference_protected (syncobj->fence,1 )); +else +list_add_tail (&wait->node, &syncobj->cb_list);spin_unlock (&syncobj->lock); - -return ret; } -void drm_syncobj_add_callback (struct drm_syncobj *syncobj, -struct drm_syncobj_cb *cb, -drm_syncobj_func_t func) +static void drm_syncobj_remove_wait (struct drm_syncobj *syncobj, +struct syncobj_wait_entry *wait) { -spin_lock (&syncobj->lock); -drm_syncobj_add_callback_locked (syncobj, cb, func); -spin_unlock (&syncobj->lock); -} +if (!wait->node.next) +return ; -void drm_syncobj_remove_callback (struct drm_syncobj *syncobj, -struct drm_syncobj_cb *cb) -{spin_lock (&syncobj->lock); -list_del_init (&cb->node); +list_del_init (&wait->node);spin_unlock (&syncobj->lock); }
@@ -148,7 +133,7 @@ void drm_syncobj_replace_fence(struct drm_syncobj *syncobj, struct dma_fence *fence) {struct dma_fence *old_fence; -struct drm_syncobj_cb *cur, *tmp; +struct syncobj_wait_entry *cur, *tmp;if (fence)dma_fence_get (fence);
@@ -162,7 +147,7 @@ void drm_syncobj_replace_fence(struct drm_syncobj *syncobj,if (fence != old_fence) {list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) {list_del_init (&cur->node); - cur->func (syncobj, cur); +syncobj_wait_syncobj_func (syncobj, cur); } }
@@ -608,13 +593,6 @@ drm_syncobj_fd_to_handle_ioctl(struct drm_device *dev, void *data, &args->handle); } -struct syncobj_wait_entry { -struct task_struct *task; -struct dma_fence *fence; -struct dma_fence_cb fence_cb; -struct drm_syncobj_cb syncobj_cb; -}; -static void syncobj_wait_fence_func (struct dma_fence *fence,struct dma_fence_cb *cb) {
@@ -625,11 +603,8 @@ static void syncobj_wait_fence_func(struct dma_fence *fence, }static void syncobj_wait_syncobj_func (struct drm_syncobj *syncobj, -struct drm_syncobj_cb *cb) +struct syncobj_wait_entry *wait) { -struct syncobj_wait_entry *wait = - container_of(cb, struct syncobj_wait_entry, syncobj_cb); -/* This happens inside the syncobj lock */ wait->fence =dma_fence_get (rcu_dereference_protected (syncobj->fence,lockdep_is_held (&syncobj->lock)));
@@ -688,12 +663,8 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs,*/ if (flags &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT ) { -for (i =0 ; i < count; ++i) { -drm_syncobj_fence_get_or_add_callback (syncobjs[i], - &entries[i].fence, - &entries[i].syncobj_cb, - syncobj_wait_syncobj_func); - } +for (i =0 ; i < count; ++i) +drm_syncobj_fence_add_wait (syncobjs[i], &entries[i]); } do {
@@ -742,9 +713,7 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, cleanup_entries:for (i =0 ; i < count; ++i) { -if (entries[i].syncobj_cb.func) -drm_syncobj_remove_callback (syncobjs[i], - &entries[i].syncobj_cb); +drm_syncobj_remove_wait (syncobjs[i], &entries[i]);if (entries[i].fence_cb.func)dma_fence_remove_callback (entries[i].fence, &entries[i].fence_cb);
include/drm/drm_syncobj.h +0 -21
@@ -28,8 +28,6 @@#include "linux/dma-fence.h" -struct drm_syncobj_cb ; -/** * struct drm_syncobj - sync object. *
@@ -62,25 +60,6 @@ struct drm_syncobj {struct file *file; }; -typedef void (*drm_syncobj_func_t )(struct drm_syncobj *syncobj, -struct drm_syncobj_cb *cb); - -/** -* struct drm_syncobj_cb - callback for drm_syncobj_add_callback -* @node: used by drm_syncob_add_callback to append this struct to -* &drm_syncobj.cb_list -* @func: drm_syncobj_func_t to call -* -* This struct will be initialized by drm_syncobj_add_callback, additional -* data can be passed along by embedding drm_syncobj_cb in another struct. -* The callback will get called the next time drm_syncobj_replace_fence is -* called. -*/ -struct drm_syncobj_cb { -struct list_head node; -drm_syncobj_func_t func; -}; -void drm_syncobj_free (struct kref *kref);/**
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PATCH 4/10 drm/syncobj: add support for timeline point wait v8
In reply to a message not in the archivepoints array is one-to-one match with syncobjs array. v2:
add seperate ioctl for timeline point wait, otherwise break uapi. v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
v4:
rebase
v5:
add comment for xxx_WAIT_AVAILABLE
v6: rebase and rework on new container
v7: drop _WAIT_COMPLETED, it is the default anyway
v8: correctly handle garbage collected fences
--- drivers/gpu/drm/drm_internal.h | 2 + drivers/gpu/drm/drm_ioctl.c | 2 + drivers/gpu/drm/drm_syncobj.c | 153 ++++++++++++++++++++++++++------- include/uapi/drm/drm.h | 15 ++++ 4 files changed, 143 insertions(+), 29 deletions(-)
drivers/gpu/drm/drm_internal.h +2 -0
@@ -178,6 +178,8 @@ int drm_syncobj_fd_to_handle_ioctl(struct drm_device *dev, void *data, struct drm_file *file_private);int drm_syncobj_wait_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private); +int drm_syncobj_timeline_wait_ioctl (struct drm_device *dev,void *data, +struct drm_file *file_private);int drm_syncobj_reset_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private); int drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
drivers/gpu/drm/drm_ioctl.c +2 -0
@@ -675,6 +675,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = { DRM_UNLOCKED|DRM_RENDER_ALLOW),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_WAIT , drm_syncobj_wait_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), +DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT , drm_syncobj_timeline_wait_ioctl, +DRM_UNLOCKED |DRM_RENDER_ALLOW ),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_RESET , drm_syncobj_reset_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_SIGNAL, drm_syncobj_signal_ioctl,
drivers/gpu/drm/drm_syncobj.c +124 -29
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include/uapi/drm/drm.h +15 -0
@@ -737,6 +737,7 @@ struct drm_syncobj_handle {#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1) +#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2)struct drm_syncobj_wait {__u64 handles;/* absolute timeout */
@@ -747,6 +748,19 @@ struct drm_syncobj_wait {__u32 pad; }; +struct drm_syncobj_timeline_wait { +__u64 handles; +/* wait on specific timeline point for every handles*/ +__u64 points; +/* absolute timeout */ +__s64 timeout_nsec; +__u32 count_handles; +__u32 flags; +__u32 first_signaled;/* only valid when not waiting all */ +__u32 pad; +}; + +struct drm_syncobj_array {__u64 handles;__u32 count_handles;
@@ -909,6 +923,7 @@ extern "C" {#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease)#define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease) +#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)/** * Device specific ioctls should only be in their respective headers * The device specific ioctl range is from 0x40 to 0x9f.
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PATCH 8/10 drm/syncobj: add transition iotcls between binary and timeline v2
In reply to a message not in the archivewe need to import/export timeline point.
v2: unify to one transfer ioctl
--- drivers/gpu/drm/drm_internal.h | 2 + drivers/gpu/drm/drm_ioctl.c | 2 + drivers/gpu/drm/drm_syncobj.c | 79 ++++++++++++++++++++++++++++++++++ include/uapi/drm/drm.h | 10 +++++ 4 files changed, 93 insertions(+)
drivers/gpu/drm/drm_internal.h +2 -0
@@ -176,6 +176,8 @@ int drm_syncobj_handle_to_fd_ioctl(struct drm_device *dev, void *data, struct drm_file *file_private);int drm_syncobj_fd_to_handle_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private); +int drm_syncobj_transfer_ioctl (struct drm_device *dev,void *data, +struct drm_file *file_private);int drm_syncobj_wait_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private); int drm_syncobj_timeline_wait_ioctl(struct drm_device *dev, void *data,
drivers/gpu/drm/drm_ioctl.c +2 -0
@@ -673,6 +673,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = { DRM_UNLOCKED|DRM_RENDER_ALLOW),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE , drm_syncobj_fd_to_handle_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), +DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_TRANSFER , drm_syncobj_transfer_ioctl, +DRM_UNLOCKED |DRM_RENDER_ALLOW ),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_WAIT , drm_syncobj_wait_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, drm_syncobj_timeline_wait_ioctl,
drivers/gpu/drm/drm_syncobj.c +79 -0
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include/uapi/drm/drm.h +10 -0
@@ -735,6 +735,15 @@ struct drm_syncobj_handle {__u32 pad; }; +struct drm_syncobj_transfer { +__u32 src_handle; +__u32 dst_handle; +__u64 src_point; +__u64 dst_point; +__u32 flags; +__u32 pad; +}; +#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2)
@@ -933,6 +942,7 @@ extern "C" {#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array) +#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer)/** * Device specific ioctls should only be in their respective headers
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PATCH 9/10 drm/syncobj: add timeline signal ioctl for syncobj v2
In reply to a message not in the archivev2: individually allocate chain array, since chain node is free independently.
--- drivers/gpu/drm/drm_internal.h | 2 + drivers/gpu/drm/drm_ioctl.c | 2 + drivers/gpu/drm/drm_syncobj.c | 81 ++++++++++++++++++++++++++++++++++ include/uapi/drm/drm.h | 1 + 4 files changed, 86 insertions(+)
drivers/gpu/drm/drm_internal.h +2 -0
@@ -186,6 +186,8 @@ int drm_syncobj_reset_ioctl(struct drm_device *dev, void *data, struct drm_file *file_private);int drm_syncobj_signal_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private); +int drm_syncobj_timeline_signal_ioctl (struct drm_device *dev,void *data, +struct drm_file *file_private);int drm_syncobj_query_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private);
drivers/gpu/drm/drm_ioctl.c +2 -0
@@ -683,6 +683,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = { DRM_UNLOCKED|DRM_RENDER_ALLOW),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_SIGNAL , drm_syncobj_signal_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), +DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL , drm_syncobj_timeline_signal_ioctl, +DRM_UNLOCKED |DRM_RENDER_ALLOW ),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_QUERY , drm_syncobj_query_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), DRM_IOCTL_DEF(DRM_IOCTL_CRTC_GET_SEQUENCE, drm_crtc_get_sequence_ioctl, DRM_UNLOCKED),
drivers/gpu/drm/drm_syncobj.c +81 -0
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include/uapi/drm/drm.h +1 -0
@@ -943,6 +943,7 @@ extern "C" {#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array)#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer) +#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array)/** * Device specific ioctls should only be in their respective headers
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PATCH 10/10 drm/amdgpu: update version for timeline syncobj support in amdgpu
In reply to a message not in the archive--- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1
@@ -71,9 +71,10 @@* - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk). * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE. * - 3.27.0 - Add new chunk to to AMDGPU_CS to enable BO_LIST creation. +* - 3.28.0 - Add syncobj timeline support to AMDGPU_CS. */ #define KMS_DRIVER_MAJOR 3 -#define KMS_DRIVER_MINOR 27 +#define KMS_DRIVER_MINOR 28#define KMS_DRIVER_PATCHLEVEL 0int amdgpu_vram_limit =0 ;
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PATCH 3/10 drm/syncobj: add new drm_syncobj_add_point interface v2
In reply to Chunming ZhouFrom: Christian König <[email protected]>
Use the dma_fence_chain object to create a timeline of fence objects instead of just replacing the existing fence.
v2: rebase and cleanup
--- drivers/gpu/drm/drm_syncobj.c | 37 +++++++++++++++++++++++++++++++++++ include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)
drivers/gpu/drm/drm_syncobj.c +37 -0
@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct drm_syncobj *syncobj,spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) +{ +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); +} +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in
include/drm/drm_syncobj.h +5 -0
@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object.
@@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence); int drm_syncobj_find_fence(struct drm_file *file_private,
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Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
Quoted 8 lines · Chunming Zhou
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>
Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the timeline:
- The timeline stuff is modelled after the WDDM2 monitored fences. Which really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management entirely separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences never leak into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they run batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure that deadlocks don't leak into the memory manager. But as long as we block until the underlying dma_fence has materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.
Essentially I think we can look at timeline syncobj as a dma_fence container indexed through an integer, and there's no need to enforce that the timline works like a real dma_fence timeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelated dma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.
tldr; I think we can drop the dma_fence_chain complexity completely. Or at least I'm not really understanding why it's needed.
Of course that means drivers cannot treat a drm_syncobj timeline as a dma_fence timeline. But given the future fences stuff and all that, that's already out of the window anyway.
What am I missing?
-Daniel
Quoted 83 lines
--- drivers/gpu/drm/drm_syncobj.c | 37 +++++++++++++++++++++++++++++++++++ include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)drivers/gpu/drm/drm_syncobj.c +37
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct drm_syncobj *syncobj,spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) +{ +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); +} +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence); int drm_syncobj_find_fence(struct drm_file *file_private,Signature · 6 lines
2.17.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Signature · 7 lines
Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Koenig, Christian
maintainerRe: [Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 42 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the timeline:
- The timeline stuff is modelled after the WDDM2 monitored fences. Which really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management entirely separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences never leak into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they run batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure that deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.
Quoted 8 lines
tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
Christian.
Quoted 81 lines
-Daniel
Quoted 79 lines
--- drivers/gpu/drm/drm_syncobj.c | 37 +++++++++++++++++++++++++++++++++++ include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)drivers/gpu/drm/drm_syncobj.c +37
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct drm_syncobj *syncobj,spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) +{ +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); +} +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence); int drm_syncobj_find_fence(struct drm_file *file_private,Signature · 1 line
2.17.1
Quoted 4 lines
Quoted 4 lines
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Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
Quoted 51 lines · Christian
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 49 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the timeline:
- The timeline stuff is modelled after the WDDM2 monitored fences. Which really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management entirely separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences never leak into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they run batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure that deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.
Quoted 6 lines
Quoted 1 line
What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Quoted 9 lines
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
-Daniel
Quoted 88 lines
Christian.
Quoted 85 lines
-Daniel
Quoted 83 lines
--- drivers/gpu/drm/drm_syncobj.c | 37 +++++++++++++++++++++++++++++++++++ include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)drivers/gpu/drm/drm_syncobj.c +37
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct drm_syncobj *syncobj,spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) +{ +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); +} +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in include/drm/drm_syncobj.h +5
-1@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence); int drm_syncobj_find_fence(struct drm_file *file_private, --2.17.1
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Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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RE: [Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
+ Daniel Rakos and Jason Ekstrand.
Below is the background, which is from Daniel R should be able to explain that's why:
" ISVs, especially those coming from D3D12, are unsatisfied with the behavior of the Vulkan semaphores as they are unhappy with the fact that for every single dependency they need to use separate semaphores due to their binary nature.
Compared to that a synchronization primitive like D3D12 monitored fences enable one of those to be used to track a sequence of operations by simply associating timeline values to the completion of individual operations. This allows them to track the lifetime and usage of resources and the ordered completion of sequences.
Besides that, they also want to use a single synchronization primitive to be able to handle GPU-to-GPU and GPU-to-CPU dependencies, compared to using semaphores for the former and fences for the latter.
In addition, compared to legacy semaphores, timeline semaphores are proposed to support wait-before-signal, i.e. allow enqueueing a semaphore wait operation with a wait value that is larger than any of the already enqueued signal values. This seems to be a hard requirement for ISVs. Without UMD-side queue batching, and even UMD-side queue batching doesn’t help the situation when such a semaphore is externally shared with another API. Thus in order to properly support wait-before-signal the KMD implementation has to also be able to support such dependencies. "
Btw, we already add test case to igt, and tested by many existing test, like libdrm unit test, igt related test, vulkan cts, and steam games.
-David
Quoted 203 lines
-----Original Message-----
From: Daniel Vetter <[email protected]>
Sent: Wednesday, December 12, 2018 7:15 PM
To: Koenig, Christian <[email protected]>
Cc: Zhou, David(ChunMing) <[email protected]>; dri-devel <dri- [email protected]>; amd-gfx list <[email protected]>; intel-gfx <[email protected]>; Christian König <[email protected]>
Subject: Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add newdrm_syncobj_add_pointinterface v2Quoted 13 lines · Christian
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 11 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the
timeline:
Quoted 2 lines
Quoted 2 lines
- The timeline stuff is modelled after the WDDM2 monitored fences.
Which
Quoted 2 lines
Quoted 2 lines
really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management
entirely
Quoted 3 lines
Quoted 3 lines
separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences
never leak
Quoted 5 lines
Quoted 5 lines
into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they
run
Quoted 4 lines
Quoted 4 lines
batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure
that
Quoted 22 lines
Quoted 22 lines
deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.Quoted 6 lines
Quoted 1 line
What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Quoted 9 lines
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
-DanielQuoted 6 lines
Christian.
Quoted 4 lines
-Daniel
Quoted 2 lines
--- drivers/gpu/drm/drm_syncobj.c | 37+++++++++++++++++++++++++++++++++++
Quoted 9 lines
Quoted 9 lines
drivers/gpu/drm/drm_syncobj.c static void drm_syncobj_remove_wait(struct
Quoted 9 lines
include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)(quoted diff) +0
-0
b/drivers/gpu/drm/drm_syncobj.cindexe19525af0cce..51f798e2194f100644drivers/gpu/drm/drm_syncobj.c +0
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct
drm_syncobj*syncobj,Quoted 68 lines
Quoted 68 lines
Quoted 68 lines
drivers/gpu/drm/drm_syncobj.c +35
-0spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) { +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); } +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in diff --git
a/include/drm/drm_syncobj.hb/include/drm/drm_syncobj.hindex7c6ed845c70d..8acb4ae4f311100644include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence);int drm_syncobj_find_fence(struct
drm_file*file_private,
--
2.17.1Quoted 5 lines
Quoted 4 lines
Quoted 4 lines
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Quoted 4 lines
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
Quoted 4 lines
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why. Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
Yes, that's why I made it mandatory that David provides an igt test case along the ones in libdrm.
Quoted 5 lines
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
Correct and that's also how we have implemented it.
Quoted 5 lines
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Yeah, well chicken and egg problem. Amdvlk probably won't make the code to support this public until the kernel has accepted it and the kernel doesn't accept it until the amdvlk patches are public.
David can you take care of this and release the userspace patches as well?
Additional to that except for a bit polishing the UAPI stayed the same from the very beginning while being reviewed multiple times now. So that seems to be rather sane.
Quoted 6 lines
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
Well I'm repeating myself, but while this seems to be a good idea for an userspace API it is not necessary for a kernel API.
In other words userspace can do all the mess it wants in as long as it stays inside the same process, but when it starts to mess with inter-process communication (e.g. X or Wayland) the stuff should be water prove and not allow for mess to leak between processes.
And what we can always do is to make the restriction more lose, but tightening it when userspace already depends on a behavior is not possible any more.
Regards,
Christian.
Am 12.12.18 um 12:39 schrieb Zhou, David(ChunMing):
Quoted 9 lines
+ Daniel Rakos and Jason Ekstrand.
Below is the background, which is from Daniel R should be able to explain that's why:
" ISVs, especially those coming from D3D12, are unsatisfied with the behavior of the Vulkan semaphores as they are unhappy with the fact that for every single dependency they need to use separate semaphores due to their binary nature.
Compared to that a synchronization primitive like D3D12 monitored fences enable one of those to be used to track a sequence of operations by simply associating timeline values to the completion of individual operations. This allows them to track the lifetime and usage of resources and the ordered completion of sequences.
Besides that, they also want to use a single synchronization primitive to be able to handle GPU-to-GPU and GPU-to-CPU dependencies, compared to using semaphores for the former and fences for the latter.
In addition, compared to legacy semaphores, timeline semaphores are proposed to support wait-before-signal, i.e. allow enqueueing a semaphore wait operation with a wait value that is larger than any of the already enqueued signal values. This seems to be a hard requirement for ISVs. Without UMD-side queue batching, and even UMD-side queue batching doesn’t help the situation when such a semaphore is externally shared with another API. Thus in order to properly support wait-before-signal the KMD implementation has to also be able to support such dependencies. "
Quoted 203 lines
Btw, we already add test case to igt, and tested by many existing test, like libdrm unit test, igt related test, vulkan cts, and steam games.
-David
Quoted 200 lines
-----Original Message-----
From: Daniel Vetter <[email protected]>
Sent: Wednesday, December 12, 2018 7:15 PM
To: Koenig, Christian <[email protected]>
Cc: Zhou, David(ChunMing) <[email protected]>; dri-devel <dri- [email protected]>; amd-gfx list <[email protected]>; intel-gfx <[email protected]>; Christian König <[email protected]>
Subject: Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add newdrm_syncobj_add_pointinterface v2Quoted 12 lines · Christian
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 11 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the
timeline:
Quoted 1 line
Quoted 1 line
- The timeline stuff is modelled after the WDDM2 monitored fences.
Which
Quoted 2 lines
Quoted 2 lines
really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management
entirely
Quoted 3 lines
Quoted 3 lines
separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences
never leak
Quoted 5 lines
Quoted 5 lines
into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they
run
Quoted 4 lines
Quoted 4 lines
batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure
that
Quoted 22 lines
Quoted 22 lines
deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.Quoted 5 lines
Quoted 1 line
What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Quoted 9 lines
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
-DanielQuoted 6 lines
Christian.
Quoted 4 lines
-Daniel
Quoted 2 lines
--- drivers/gpu/drm/drm_syncobj.c | 37+++++++++++++++++++++++++++++++++++
Quoted 9 lines
Quoted 9 lines
drivers/gpu/drm/drm_syncobj.c static void drm_syncobj_remove_wait(struct
Quoted 9 lines
include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)(quoted diff) +0
-0
b/drivers/gpu/drm/drm_syncobj.cindexe19525af0cce..51f798e2194f100644drivers/gpu/drm/drm_syncobj.c +0
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct
drm_syncobj*syncobj,Quoted 68 lines
Quoted 68 lines
Quoted 68 lines
drivers/gpu/drm/drm_syncobj.c +35
-0spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) { +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); } +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in diff --git
a/include/drm/drm_syncobj.hb/include/drm/drm_syncobj.hindex7c6ed845c70d..8acb4ae4f311100644include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence);int drm_syncobj_find_fence(struct
drm_file*file_private,
--
2.17.1Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
Quoted 15 lines · Christian
Quoted 5 lines
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why. Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
Yes, that's why I made it mandatory that David provides an igt test case along the ones in libdrm.
Quoted 5 lines
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
Correct and that's also how we have implemented it.
Quoted 8 lines
Quoted 5 lines
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Yeah, well chicken and egg problem. Amdvlk probably won't make the code to support this public until the kernel has accepted it and the kernel doesn't accept it until the amdvlk patches are public.
That's not how we do uapi development.
Quoted 1 line
David can you take care of this and release the userspace patches as well?
Please also drag the people typing the code on the mailing list, not just the code. Code alone doesn't make for a useful discussion :-)
Also, someone needs to drag the radv/anv side into this, because I don't also want to mix up the technical issues here with the entire "is amdvlk good enough for uapi development" question ... (as is it seems to fall short on technicalities of simply not doing development openly, but I hope that's fixable).
Quoted 13 lines
Additional to that except for a bit polishing the UAPI stayed the same from the very beginning while being reviewed multiple times now. So that seems to be rather sane.
Quoted 6 lines
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
Well I'm repeating myself, but while this seems to be a good idea for an userspace API it is not necessary for a kernel API.
Quoted 8 lines
In other words userspace can do all the mess it wants in as long as it stays inside the same process, but when it starts to mess with inter-process communication (e.g. X or Wayland) the stuff should be water prove and not allow for mess to leak between processes.
And what we can always do is to make the restriction more lose, but tightening it when userspace already depends on a behavior is not possible any more.
The point of vk timelines seems to be that userspace wants the mess, even across processes. E.g. for VR compositors, which run in some other address space. If you don't want to leak the mess, don't use vk timelines, use normal fences. Which is what all the X/wayland protocols seem to be doing. So the mess is strictly opt-in for userspace, but seems entirely desired.
-Daniel
Quoted 218 lines
Regards,
Christian.Am 12.12.18 um 12:39 schrieb Zhou, David(ChunMing):
Quoted 212 lines
+ Daniel Rakos and Jason Ekstrand.
Below is the background, which is from Daniel R should be able to explain that's why:
" ISVs, especially those coming from D3D12, are unsatisfied with the behavior of the Vulkan semaphores as they are unhappy with the fact that for every single dependency they need to use separate semaphores due to their binary nature.
Compared to that a synchronization primitive like D3D12 monitored fences enable one of those to be used to track a sequence of operations by simply associating timeline values to the completion of individual operations. This allows them to track the lifetime and usage of resources and the ordered completion of sequences.
Besides that, they also want to use a single synchronization primitive to be able to handle GPU-to-GPU and GPU-to-CPU dependencies, compared to using semaphores for the former and fences for the latter.
In addition, compared to legacy semaphores, timeline semaphores are proposed to support wait-before-signal, i.e. allow enqueueing a semaphore wait operation with a wait value that is larger than any of the already enqueued signal values. This seems to be a hard requirement for ISVs. Without UMD-side queue batching, and even UMD-side queue batching doesn’t help the situation when such a semaphore is externally shared with another API. Thus in order to properly support wait-before-signal the KMD implementation has to also be able to support such dependencies. "Btw, we already add test case to igt, and tested by many existing test, like libdrm unit test, igt related test, vulkan cts, and steam games.
-David
Quoted 200 lines
-----Original Message-----
From: Daniel Vetter <[email protected]>
Sent: Wednesday, December 12, 2018 7:15 PM
To: Koenig, Christian <[email protected]>
Cc: Zhou, David(ChunMing) <[email protected]>; dri-devel <dri- [email protected]>; amd-gfx list <[email protected]>; intel-gfx <[email protected]>; Christian König <[email protected]>
Subject: Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add newdrm_syncobj_add_pointinterface v2Quoted 12 lines · Christian
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 11 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the
timeline:
Quoted 1 line
Quoted 1 line
- The timeline stuff is modelled after the WDDM2 monitored fences.
Which
Quoted 2 lines
Quoted 2 lines
really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management
entirely
Quoted 3 lines
Quoted 3 lines
separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences
never leak
Quoted 5 lines
Quoted 5 lines
into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they
run
Quoted 4 lines
Quoted 4 lines
batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure
that
Quoted 22 lines
Quoted 22 lines
deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.Quoted 5 lines
Quoted 1 line
What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Quoted 9 lines
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
-DanielQuoted 6 lines
Christian.
Quoted 4 lines
-Daniel
Quoted 2 lines
--- drivers/gpu/drm/drm_syncobj.c | 37+++++++++++++++++++++++++++++++++++
Quoted 9 lines
Quoted 9 lines
drivers/gpu/drm/drm_syncobj.c static void drm_syncobj_remove_wait(struct
Quoted 9 lines
include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)(quoted diff) +0
-0
b/drivers/gpu/drm/drm_syncobj.cindexe19525af0cce..51f798e2194f100644drivers/gpu/drm/drm_syncobj.c +0
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct
drm_syncobj*syncobj,Quoted 68 lines
Quoted 68 lines
Quoted 68 lines
drivers/gpu/drm/drm_syncobj.c +35
-0spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) { +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); } +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in diff --git
a/include/drm/drm_syncobj.hb/include/drm/drm_syncobj.hindex7c6ed845c70d..8acb4ae4f311100644include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence);int drm_syncobj_find_fence(struct
drm_file*file_private,
--
2.17.1Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
Signature · 7 lines
Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
In reply to Zhou, David(ChunMing)Quoted 9 lines · David(ChunMing)
+ Daniel Rakos and Jason Ekstrand.
Below is the background, which is from Daniel R should be able to explain that's why:
" ISVs, especially those coming from D3D12, are unsatisfied with the behavior of the Vulkan semaphores as they are unhappy with the fact that for every single dependency they need to use separate semaphores due to their binary nature.
Compared to that a synchronization primitive like D3D12 monitored fences enable one of those to be used to track a sequence of operations by simply associating timeline values to the completion of individual operations. This allows them to track the lifetime and usage of resources and the ordered completion of sequences.
Besides that, they also want to use a single synchronization primitive to be able to handle GPU-to-GPU and GPU-to-CPU dependencies, compared to using semaphores for the former and fences for the latter.
In addition, compared to legacy semaphores, timeline semaphores are proposed to support wait-before-signal, i.e. allow enqueueing a semaphore wait operation with a wait value that is larger than any of the already enqueued signal values. This seems to be a hard requirement for ISVs. Without UMD-side queue batching, and even UMD-side queue batching doesn’t help the situation when such a semaphore is externally shared with another API. Thus in order to properly support wait-before-signal the KMD implementation has to also be able to support such dependencies. "
I was tangetially involved in that wg too, I understand the overall use-case of vk timelines. I don't understand the exact corner case here, because I wasn't deeply involved in the details. -Daniel
Quoted 210 lines
Btw, we already add test case to igt, and tested by many existing test, like libdrm unit test, igt related test, vulkan cts, and steam games.
-David
Quoted 207 lines
-----Original Message-----
From: Daniel Vetter <[email protected]>
Sent: Wednesday, December 12, 2018 7:15 PM
To: Koenig, Christian <[email protected]>
Cc: Zhou, David(ChunMing) <[email protected]>; dri-devel <dri- [email protected]>; amd-gfx list <[email protected]>; intel-gfx <[email protected]>; Christian König <[email protected]>
Subject: Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add newdrm_syncobj_add_pointinterface v2Quoted 13 lines · Christian
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 11 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the
timeline:
Quoted 2 lines
Quoted 2 lines
- The timeline stuff is modelled after the WDDM2 monitored fences.
Which
Quoted 2 lines
Quoted 2 lines
really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management
entirely
Quoted 3 lines
Quoted 3 lines
separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences
never leak
Quoted 5 lines
Quoted 5 lines
into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they
run
Quoted 4 lines
Quoted 4 lines
batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure
that
Quoted 22 lines
Quoted 22 lines
deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.Quoted 6 lines
Quoted 1 line
What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Quoted 9 lines
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
-DanielQuoted 6 lines
Christian.
Quoted 4 lines
-Daniel
Quoted 2 lines
--- drivers/gpu/drm/drm_syncobj.c | 37+++++++++++++++++++++++++++++++++++
Quoted 9 lines
Quoted 9 lines
drivers/gpu/drm/drm_syncobj.c static void drm_syncobj_remove_wait(struct
Quoted 9 lines
include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)(quoted diff) +0
-0
b/drivers/gpu/drm/drm_syncobj.cindexe19525af0cce..51f798e2194f100644drivers/gpu/drm/drm_syncobj.c +0
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct
drm_syncobj*syncobj,Quoted 68 lines
Quoted 68 lines
Quoted 68 lines
drivers/gpu/drm/drm_syncobj.c +35
-0spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) { +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); } +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in diff --git
a/include/drm/drm_syncobj.hb/include/drm/drm_syncobj.hindex7c6ed845c70d..8acb4ae4f311100644include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence);int drm_syncobj_find_fence(struct
drm_file*file_private,
--
2.17.1Quoted 5 lines
Quoted 4 lines
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_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
Signature · 7 lines
Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2
Quoted 10 lines · Daniel Vetter
Quoted 8 lines · David(ChunMing)
+ Daniel Rakos and Jason Ekstrand.
Below is the background, which is from Daniel R should be able to explain that's why:
" ISVs, especially those coming from D3D12, are unsatisfied with the behavior of the Vulkan semaphores as they are unhappy with the fact that for every single dependency they need to use separate semaphores due to their binary nature.
Compared to that a synchronization primitive like D3D12 monitored fences enable one of those to be used to track a sequence of operations by simply associating timeline values to the completion of individual operations. This allows them to track the lifetime and usage of resources and the ordered completion of sequences.
Besides that, they also want to use a single synchronization primitive to be able to handle GPU-to-GPU and GPU-to-CPU dependencies, compared to using semaphores for the former and fences for the latter.
In addition, compared to legacy semaphores, timeline semaphores are proposed to support wait-before-signal, i.e. allow enqueueing a semaphore wait operation with a wait value that is larger than any of the already enqueued signal values. This seems to be a hard requirement for ISVs. Without UMD-side queue batching, and even UMD-side queue batching doesn’t help the situation when such a semaphore is externally shared with another API. Thus in order to properly support wait-before-signal the KMD implementation has to also be able to support such dependencies. "
Quoted 3 lines
I was tangetially involved in that wg too, I understand the overall use-case of vk timelines. I don't understand the exact corner case here, because I wasn't deeply involved in the details.
all details are here:
https://gitlab.khronos.org/vulkan/vulkan/merge_requests/2696
-David
Quoted 207 lines
-Daniel
Quoted 203 lines
Btw, we already add test case to igt, and tested by many existing test, like libdrm unit test, igt related test, vulkan cts, and steam games.
-David
Quoted 200 lines
-----Original Message-----
From: Daniel Vetter <[email protected]>
Sent: Wednesday, December 12, 2018 7:15 PM
To: Koenig, Christian <[email protected]>
Cc: Zhou, David(ChunMing) <[email protected]>; dri-devel <dri- [email protected]>; amd-gfx list <[email protected]>; intel-gfx <[email protected]>; Christian König <[email protected]>
Subject: Re: [Intel-gfx] [PATCH 03/10] drm/syncobj: add newdrm_syncobj_add_pointinterface v2Quoted 12 lines · Christian
Am 12.12.18 um 11:49 schrieb Daniel Vetter:
Quoted 11 lines · Chunming Zhou
Quoted 8 lines
From: Christian König <[email protected]>
Use the
dma_fence_chainobject to create a timeline of fence objects instead of just replacing the existing fence.v2: rebase and cleanup
Signed-off-by Christian König <[email protected]>Somewhat jumping back into this. Not sure we discussed this already or not. I'm a bit unclear on why we have to chain the fences in the
timeline:
Quoted 1 line
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- The timeline stuff is modelled after the WDDM2 monitored fences.
Which
Quoted 2 lines
Quoted 2 lines
really are just u64 counters in memory somewhere (I think could be system ram or vram). Because WDDM2 has the memory management
entirely
Quoted 3 lines
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separated from rendering synchronization it totally allows userspace to create loops and deadlocks and everything else nasty using this - the memory manager won't deadlock because these monitored fences
never leak
Quoted 5 lines
Quoted 5 lines
into the buffer manager. And if CS deadlock, gpu reset takes care of the mess.
- This has a few consequences, as in they seem to indeed work like a memory location: Userspace incrementing out-of-order (because they
run
Quoted 4 lines
Quoted 4 lines
batches updating the same fence on different engines) is totally fine, as is doing anything else "stupid".
- Now on linux we can't allow anything, because we need to make sure
that
Quoted 22 lines
Quoted 22 lines
deadlocks don't leak into the memory manager. But as long as we block until the underlying
dma_fencehas materialized, nothing userspace can do will lead to such a deadlock. Even if userspace ends up submitting jobs without enough built-in synchronization, leading to out-of-order signalling of fences on that "timeline". And I don't think that would pose a problem for us.Essentially I think we can look at timeline syncobj as a
dma_fencecontainer indexed through an integer, and there's no need to enforce that the timline works like a realdma_fencetimeline, with all it's guarantees. It's just a pile of (possibly, if userspace is stupid) unrelateddma_fences. You could implement the entire thing in userspace after all, except for the "we want to share these timeline objects between processes" problem.tldr; I think we can drop the
dma_fence_chaincomplexity completely. Or at least I'm not really understanding why it's needed.Of course that means drivers cannot treat a
drm_syncobjtimeline as adma_fencetimeline. But given the future fences stuff and all that, that's already out of the window anyway.Quoted 5 lines
Quoted 1 line
What am I missing?
Good question, since that was exactly my initial idea as well.
Key point is that our Vulcan guys came back and said that this wouldn't be sufficient, but I honestly don't fully understand why.
Hm, sounds like we really need those testscases (vk cts on top of mesa, igt) so we can talk about the exact corner cases we care about and why.
I guess one thing that might happen is that userspace leaves out a number and never sets that fence, relying on the >= semantics of the monitored fence to unblock that thread. E.g. when skipping a frame in one of the auxiliary workloads. For that case we'd need to make sure we don't just wait for the given fence to materialize, but also any fences later in the timeline.
But we can't decide that without understanding the actual use-case that needs to be supported at the other end of the stack, and how all the bits in between should look like.
I guess we're back to "uapi design without userspace doesn't make sense" ...
Quoted 9 lines
Anyway that's why David came up with using the fence array to wait for all previously added fences, which I then later on extended into this chain container.
I have to admit that it is way more defensive implemented this way. E.g. there is much fewer things userspace can do wrong.
The principal idea is that when they mess things up they are always going to wait more than necessary, but never less.
That seems against the spirit of vulkan, which is very much about "you get all the pieces". It also might dig us a hole in the future, if we ever get around to moving towards a WDDM2 style memory management model. For future proving I think it would make sense if we implement the minimal uapi we need for vk timelines, not the strictest guarantees we can get away with (without performance impact) with current drivers.
-DanielQuoted 6 lines
Christian.
Quoted 4 lines
-Daniel
Quoted 2 lines
--- drivers/gpu/drm/drm_syncobj.c | 37+++++++++++++++++++++++++++++++++++
Quoted 9 lines
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drivers/gpu/drm/drm_syncobj.c static void drm_syncobj_remove_wait(struct
Quoted 9 lines
include/drm/drm_syncobj.h | 5 +++++ 2 files changed, 42 insertions(+)(quoted diff) +0
-0
b/drivers/gpu/drm/drm_syncobj.cindexe19525af0cce..51f798e2194f100644drivers/gpu/drm/drm_syncobj.c +0
-0@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct
drm_syncobj*syncobj,Quoted 68 lines
Quoted 68 lines
Quoted 68 lines
drivers/gpu/drm/drm_syncobj.c +35
-0spin_unlock (&syncobj->lock); } +/** +* drm_syncobj_add_point - add new timeline point to the syncobj +* @syncobj: sync object to add timeline point do +* @chain: chain node to use to add the point +* @fence: fence to encapsulate in the chain node +* @point: sequence number to use for the point +* +* Add the chain node as new timeline point to the syncobj. +*/ +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point) { +struct syncobj_wait_entry *cur, *tmp; +struct dma_fence *prev; + +dma_fence_get (fence); + +spin_lock (&syncobj->lock); + + prev =rcu_dereference_protected (syncobj->fence, +lockdep_is_held (&syncobj->lock)); +dma_fence_chain_init (chain, prev, fence, point); +rcu_assign_pointer (syncobj->fence, &chain->base); + +list_for_each_entry_safe (cur, tmp, &syncobj->cb_list, node) { +list_del_init (&cur->node); +syncobj_wait_syncobj_func (syncobj, cur); + } +spin_unlock (&syncobj->lock); + +/* Walk the chain once to trigger garbage collection */ +dma_fence_chain_for_each (prev, fence); } +EXPORT_SYMBOL (drm_syncobj_add_point); +/** * drm_syncobj_replace_fence - replace fence in a sync object. * @syncobj: Sync object to replace fence in diff --git
a/include/drm/drm_syncobj.hb/include/drm/drm_syncobj.hindex7c6ed845c70d..8acb4ae4f311100644include/drm/drm_syncobj.h +5
-0@@ -27,6 +27,7 @@#define __DRM_SYNCOBJ_H__#include "linux/dma-fence.h" +#include "linux/dma-fence-chain.h" /** * struct drm_syncobj - sync object. @@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)struct drm_syncobj *drm_syncobj_find (struct drm_file *file_private,u32 handle); +void drm_syncobj_add_point (struct drm_syncobj *syncobj, +struct dma_fence_chain *chain, +struct dma_fence *fence, +uint64_t point);void drm_syncobj_replace_fence (struct drm_syncobj *syncobj,struct dma_fence *fence);int drm_syncobj_find_fence(struct
drm_file*file_private,
--
2.17.1Quoted 4 lines
Quoted 4 lines
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_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/dri-devel
PATCH 5/10 drm/syncobj: add timeline payload query ioctl v4
In reply to Chunming Zhouuser mode can query timeline payload.
v2: check return value of copy_to_user
v3: handle querying entry by entry
v4: rebase on new chain container, simplify interface
--- drivers/gpu/drm/drm_internal.h | 2 ++ drivers/gpu/drm/drm_ioctl.c | 2 ++ drivers/gpu/drm/drm_syncobj.c | 43 ++++++++++++++++++++++++++++++++++ include/uapi/drm/drm.h | 10 ++++++++ 4 files changed, 57 insertions(+)
drivers/gpu/drm/drm_internal.h +2 -0
@@ -184,6 +184,8 @@ int drm_syncobj_reset_ioctl(struct drm_device *dev, void *data, struct drm_file *file_private);int drm_syncobj_signal_ioctl (struct drm_device *dev,void *data,struct drm_file *file_private); +int drm_syncobj_query_ioctl (struct drm_device *dev,void *data, +struct drm_file *file_private);/* drm_framebuffer.c */ void drm_framebuffer_print_info(struct drm_printer *p, unsigned int indent,
drivers/gpu/drm/drm_ioctl.c +2 -0
@@ -681,6 +681,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = { DRM_UNLOCKED|DRM_RENDER_ALLOW),DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_SIGNAL , drm_syncobj_signal_ioctl,DRM_UNLOCKED |DRM_RENDER_ALLOW ), +DRM_IOCTL_DEF (DRM_IOCTL_SYNCOBJ_QUERY , drm_syncobj_query_ioctl, +DRM_UNLOCKED |DRM_RENDER_ALLOW ),DRM_IOCTL_DEF (DRM_IOCTL_CRTC_GET_SEQUENCE , drm_crtc_get_sequence_ioctl,DRM_UNLOCKED ),DRM_IOCTL_DEF (DRM_IOCTL_CRTC_QUEUE_SEQUENCE , drm_crtc_queue_sequence_ioctl,DRM_UNLOCKED ), DRM_IOCTL_DEF(DRM_IOCTL_MODE_CREATE_LEASE, drm_mode_create_lease_ioctl, DRM_MASTER|DRM_UNLOCKED),
drivers/gpu/drm/drm_syncobj.c +43 -0
46 lines not on this page · raw message
include/uapi/drm/drm.h +10 -0
@@ -767,6 +767,14 @@ struct drm_syncobj_array {__u32 pad; }; +struct drm_syncobj_timeline_array { +__u64 handles; +__u64 points; +__u32 count_handles; +__u32 pad; +}; + +/* Query current scanout sequence number */ struct drm_crtc_get_sequence {__u32 crtc_id;/* requested crtc_id */
@@ -924,6 +932,8 @@ extern "C" {#define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait) +#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array) +/** * Device specific ioctls should only be in their respective headers * The device specific ioctl range is from 0x40 to 0x9f.
Signature · 6 lines
2.17.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH 6/10 drm/syncobj: use the timeline point in drm_syncobj_find_fence v3
In reply to Chunming ZhouFrom: Christian König <[email protected]>
Implement finding the right timeline point in drm_syncobj_find_fence.
v2: return -EINVAL when the point is not submitted yet.
v3: fix reference counting bug, add flags handling as well
--- drivers/gpu/drm/drm_syncobj.c | 43 ++++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 3 deletions(-)
drivers/gpu/drm/drm_syncobj.c +40 -3
@@ -231,16 +231,53 @@ int drm_syncobj_find_fence(struct drm_file *file_private, struct dma_fence **fence) {struct drm_syncobj *syncobj =drm_syncobj_find (file_private, handle); -int ret =0 ; +struct syncobj_wait_entry wait; +int ret;if (!syncobj)return -ENOENT ; *fence =drm_syncobj_fence_get (syncobj); -if (!*fence) { +drm_syncobj_put (syncobj); + +if (*fence) { + ret =dma_fence_chain_find_seqno (fence, point); +if (!ret) +return 0 ; +dma_fence_put (*fence); + }else { ret = -EINVAL ; } -drm_syncobj_put (syncobj); + +if (!(flags &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT )) +return ret; + +memset (&wait,0 ,sizeof (wait)); + wait.task = current; + wait.point = point; +drm_syncobj_fence_add_wait (syncobj, &wait); + +do { +set_current_state (TASK_INTERRUPTIBLE ); +if (wait.fence) { + ret =0 ; +break ; + } + +if (signal_pending (current)) { + ret = -ERESTARTSYS ; +break ; + } + +schedule (); + }while (1 ); + +__set_current_state (TASK_RUNNING ); + *fence = wait.fence; + +if (wait.node.next) +drm_syncobj_remove_wait (syncobj, &wait); +return ret; }EXPORT_SYMBOL (drm_syncobj_find_fence);
Signature · 6 lines
2.17.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH 7/10 drm/amdgpu: add timeline support in amdgpu CS v2
In reply to Chunming Zhousyncobj wait/signal operation is appending in command submission.
v2: separate to two kinds in/out_deps functions
--- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 10 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 147 +++++++++++++++++++++---- include/uapi/drm/amdgpu_drm.h | 8 ++ 3 files changed, 140 insertions(+), 25 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu.h +8 -2
@@ -545,6 +545,12 @@ struct amdgpu_cs_chunk {void *kdata; }; +struct amdgpu_cs_post_dep { +struct drm_syncobj *syncobj; +struct dma_fence_chain *chain; +u64 point; +}; +struct amdgpu_cs_parser {struct amdgpu_device *adev;struct drm_file *filp;
@@ -574,8 +580,8 @@ struct amdgpu_cs_parser {/* user fence */ struct amdgpu_bo_list_entry uf_entry; -unsigned num_post_dep_syncobjs; -struct drm_syncobj **post_dep_syncobjs; +unsigned num_post_deps; +struct amdgpu_cs_post_dep *post_deps; }; static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p,
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +124 -23
224 lines not on this page · raw message
include/uapi/drm/amdgpu_drm.h +8 -0
@@ -523,6 +523,8 @@ struct drm_amdgpu_gem_va {#define AMDGPU_CHUNK_ID_SYNCOBJ_IN 0x04#define AMDGPU_CHUNK_ID_SYNCOBJ_OUT 0x05#define AMDGPU_CHUNK_ID_BO_HANDLES 0x06 +#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT 0x07 +#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL 0x08struct drm_amdgpu_cs_chunk {__u32 chunk_id;
@@ -598,6 +600,12 @@ struct drm_amdgpu_cs_chunk_sem {__u32 handle; }; +struct drm_amdgpu_cs_chunk_syncobj { +__u32 handle; +__u32 flags; +__u64 point; +}; +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ 0#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD 1#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD 2
Signature · 6 lines
2.17.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] dma-buf: add new dma_fence_chain container v4
In reply to Chunming Zhou== Series Details ==
== Series Details ==
Series: series starting with [01/10] dma-buf: add new dma_fence_chain container v4
URL : https://patchwork.freedesktop.org/series/53758/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip 3403ae806a28 dma-buf: add new dma_fence_chain container v4 -:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #12: v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31:
new file mode 100644
-:36: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #36: FILE: drivers/dma-buf/dma-fence-chain.c:1:
+/*
-:94: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #94: FILE: drivers/dma-buf/dma-fence-chain.c:59:
+ while ((prev = dma_fence_chain_get_prev(chain))) {
+
-:156: ERROR:CODE_INDENT: code indent should use tabs where possible #156: FILE: drivers/dma-buf/dma-fence-chain.c:121:
+ return "dma_fence_chain";$
-:156: WARNING:LEADING_SPACE: please, no spaces at the start of a line #156: FILE: drivers/dma-buf/dma-fence-chain.c:121:
+ return "dma_fence_chain";$
-:161: ERROR:CODE_INDENT: code indent should use tabs where possible #161: FILE: drivers/dma-buf/dma-fence-chain.c:126:
+ return "unbound";$
-:161: WARNING:LEADING_SPACE: please, no spaces at the start of a line #161: FILE: drivers/dma-buf/dma-fence-chain.c:126:
+ return "unbound";$
-:283: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #283: FILE: include/linux/dma-fence-chain.h:1:
+/*
-:318: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment #318: FILE: include/linux/dma-fence-chain.h:36:
+ spinlock_t lock;
-:352: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'iter' - possible side-effects? #352: FILE: include/linux/dma-fence-chain.h:70:
+#define dma_fence_chain_for_each(iter, head) \
+ for (iter = dma_fence_get(head); iter; \
+ iter = dma_fence_chain_walk(head))
-:352: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'head' - possible side-effects? #352: FILE: include/linux/dma-fence-chain.h:70:
+#define dma_fence_chain_for_each(iter, head) \
+ for (iter = dma_fence_get(head); iter; \
+ iter = dma_fence_chain_walk(head))
-:363: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Christian König <[email protected]>'
total: 2 errors, 7 warnings, 4 checks, 328 lines checked 5f4564feb12b drm/syncobj: remove drm_syncobj_cb and cleanup -:77: CHECK:OPEN_ENDED_LINE: Lines should not end with a '(' #77: FILE: drivers/gpu/drm/drm_syncobj.c:107:
+ wait->fence = dma_fence_get(
-:217: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Christian König <[email protected]>'
total: 0 errors, 1 warnings, 1 checks, 186 lines checked6616db23ca6c drm/syncobj: add new drm_syncobj_add_point interface v2
-:86: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Christian König <[email protected]>'
total: 0 errors, 1 warnings, 0 checks, 60 lines checked f0b35725d260 drm/syncobj: add support for timeline point wait v8 -:11: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'? #11:
add seperate ioctl for timeline point wait, otherwise break uapi.
-:54: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #54: FILE: drivers/gpu/drm/drm_ioctl.c:679:
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
^
-:163: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!points" #163: FILE: drivers/gpu/drm/drm_syncobj.c:680:
+ if (points == NULL)
-:324: CHECK:LINE_SPACING: Please don't use multiple blank lines #324: FILE: drivers/gpu/drm/drm_syncobj.c:998:
+
+
-:356: CHECK:LINE_SPACING: Please don't use multiple blank lines #356: FILE: include/uapi/drm/drm.h:763:
+
+
total: 0 errors, 1 warnings, 4 checks, 302 lines checked 8e372b020ffc drm/syncobj: add timeline payload query ioctl v4 -:44: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #44: FILE: drivers/gpu/drm/drm_ioctl.c:685:
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
^
-:114: CHECK:LINE_SPACING: Please don't use multiple blank lines #114: FILE: include/uapi/drm/drm.h:777:
+
+
total: 0 errors, 0 warnings, 2 checks, 84 lines checked9773333f0460 drm/syncobj: use the timeline point in drm_syncobj_find_fence v3
-:77: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Christian König <[email protected]>'
total: 0 errors, 1 warnings, 0 checks, 56 lines checked 7f1a4f6776c3 drm/amdgpu: add timeline support in amdgpu CS v2 -:43: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #43: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu.h:467:
+ unsigned num_post_deps;
-:121: CHECK:LINE_SPACING: Please don't use multiple blank lines #121: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1146:
+
-:126: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #126: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1151:
+ unsigned num_deps;
-:168: CHECK:LINE_SPACING: Please don't use multiple blank lines #168: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1187:
+
+
-:182: CHECK:LINE_SPACING: Please don't use multiple blank lines #182: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1201:
+
+
-:188: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #188: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1207:
+ unsigned num_deps;
-:300: WARNING:LEADING_SPACE: please, no spaces at the start of a line #300: FILE: include/uapi/drm/amdgpu_drm.h:604:
+ __u32 handle;$
-:301: WARNING:LEADING_SPACE: please, no spaces at the start of a line #301: FILE: include/uapi/drm/amdgpu_drm.h:605:
+ __u32 flags;$
-:302: WARNING:LEADING_SPACE: please, no spaces at the start of a line #302: FILE: include/uapi/drm/amdgpu_drm.h:606:
+ __u64 point;$
total: 0 errors, 6 warnings, 3 checks, 266 lines checked 2bfecbc0d56d drm/syncobj: add transition iotcls between binary and timeline v2 -:35: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #35: FILE: drivers/gpu/drm/drm_ioctl.c:677:
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
^
-:56: WARNING:BRACES: braces {} are not necessary for single statement blocks #56: FILE: drivers/gpu/drm/drm_syncobj.c:682:
+ if (!timeline_syncobj) {
+ return -ENOENT;
+ }
-:63: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*chain)...) over kzalloc(sizeof(struct dma_fence_chain)...) #63: FILE: drivers/gpu/drm/drm_syncobj.c:689:
+ chain = kzalloc(sizeof(struct dma_fence_chain), GFP_KERNEL);
-:99: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #99: FILE: drivers/gpu/drm/drm_syncobj.c:725:
+}
+int
total: 0 errors, 1 warnings, 3 checks, 123 lines checkedd7acbef7aace drm/syncobj: add timeline signal ioctl for syncobj v2
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #6:
v2: individually allocate chain array, since chain node is free independently.
-:32: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #32: FILE: drivers/gpu/drm/drm_ioctl.c:687:
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
^
-:85: CHECK:LINE_SPACING: Please don't use multiple blank lines #85: FILE: drivers/gpu/drm/drm_syncobj.c:1222:
+
+
-:96: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*chains[i])...) over kzalloc(sizeof(struct dma_fence_chain)...) #96: FILE: drivers/gpu/drm/drm_syncobj.c:1233:
+ chains[i] = kzalloc(sizeof(struct dma_fence_chain), GFP_KERNEL);
-:106: CHECK:BRACES: braces {} should be used on all arms of this statement #106: FILE: drivers/gpu/drm/drm_syncobj.c:1243:
+ if (points[i]) {
[...]
+ } else
[...]
-:112: CHECK:BRACES: Unbalanced braces around else statement #112: FILE: drivers/gpu/drm/drm_syncobj.c:1249:
+ } else
total: 0 errors, 1 warnings, 5 checks, 110 lines checked 5764fd06525a drm/amdgpu: update version for timeline syncobj support in amdgpu -:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 11 lines checked
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✗ Fi.CI.SPARSE: warning for series starting with [01/10] dma-buf: add new dma_fence_chain container v4
In reply to Chunming Zhou== Series Details ==
== Series Details ==
Series: series starting with [01/10] dma-buf: add new dma_fence_chain container v4
URL : https://patchwork.freedesktop.org/series/53758/
State : warning
== Summary ==
$ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: dma-buf: add new dma_fence_chain container v4 Okay!
Commit: drm/syncobj: remove drm_syncobj_cb and cleanup
-O:drivers/gpu/drm/drm_syncobj.c:123:6: warning: symbol 'drm_syncobj_add_callback' was not declared. Should it be static? -O:drivers/gpu/drm/drm_syncobj.c:132:6: warning: symbol 'drm_syncobj_remove_callback' was not declared. Should it be static?
Commit: drm/syncobj: add new drm_syncobj_add_point interface v2 Okay!
Commit: drm/syncobj: add support for timeline point wait v8 +./include/linux/slab.h:665:13: error: not a function <noident>
Commit: drm/syncobj: add timeline payload query ioctl v4 Okay!
Commit: drm/syncobj: use the timeline point in drm_syncobj_find_fence v3 Okay!
Commit: drm/amdgpu: add timeline support in amdgpu CS v2 +./include/linux/slab.h:665:13: error: not a function <noident>
Commit: drm/syncobj: add transition iotcls between binary and timeline v2 +./include/linux/slab.h:332:43: warning: dubious: x & !y
Commit: drm/syncobj: add timeline signal ioctl for syncobj v2 +./include/linux/slab.h:665:13: error: not a function <noident> +./include/linux/slab.h:665:13: error: not a function <noident>
Commit: drm/amdgpu: update version for timeline syncobj support in amdgpu Okay!
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for series starting with [01/10] dma-buf: add new dma_fence_chain container v4
In reply to Chunming Zhou== Series Details ==
== Series Details ==
Series: series starting with [01/10] dma-buf: add new dma_fence_chain container v4
URL : https://patchwork.freedesktop.org/series/53758/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5287 -> Patchwork_11051
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/53758/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_11051 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_execlists:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#108622]
* {igt@runner@aborted}:
- fi-apl-guc: NOTRUN -> FAIL [fdo#108866]
#### Possible fixes ####
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS
#### Warnings ####
* igt@kms_chamelium@common-hpd-after-suspend:
- {fi-kbl-7567u}: DMESG-FAIL [fdo#105079] -> DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#108866]: https://bugs.freedesktop.org/show_bug.cgi?id=108866
Participating hosts (51 -> 44)
------------------------------
Additional (1): fi-glk-dsi
Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u3 fi-pnv-d510
Build changes
-------------
* Linux: CI_DRM_5287 -> Patchwork_11051
CI_DRM_5287: 1f240056ad2a4b4b4f174f652202dd7d9e7d0fed @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11051: 5764fd06525a74522e006d9c2557f45b79aacc40 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5764fd06525a drm/amdgpu: update version for timeline syncobj support in amdgpu d7acbef7aace drm/syncobj: add timeline signal ioctl for syncobj v2 2bfecbc0d56d drm/syncobj: add transition iotcls between binary and timeline v2 7f1a4f6776c3 drm/amdgpu: add timeline support in amdgpu CS v2 9773333f0460 drm/syncobj: use the timeline point in drm_syncobj_find_fence v3 8e372b020ffc drm/syncobj: add timeline payload query ioctl v4 f0b35725d260 drm/syncobj: add support for timeline point wait v8 6616db23ca6c drm/syncobj: add new drm_syncobj_add_point interface v2 5f4564feb12b drm/syncobj: remove drm_syncobj_cb and cleanup 3403ae806a28 dma-buf: add new dma_fence_chain container v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11051/
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.IGT: success for series starting with [01/10] dma-buf: add new dma_fence_chain container v4
In reply to Chunming Zhou== Series Details ==
== Series Details ==
Series: series starting with [01/10] dma-buf: add new dma_fence_chain container v4
URL : https://patchwork.freedesktop.org/series/53758/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5287_full -> Patchwork_11051_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_11051_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108470]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_chv_cursor_fail@pipe-a-256x256-left-edge:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +3
* igt@kms_cursor_crc@cursor-128x128-suspend:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_draw_crc@draw-method-xrgb8888-render-untiled:
- shard-skl: PASS -> FAIL [fdo#103184] +1
* igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled:
- {shard-iclb}: PASS -> WARN [fdo#108336] +1
* igt@kms_flip@basic-flip-vs-wf_vblank:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +8
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107720] / [fdo#107724]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-iclb}: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- shard-skl: NOTRUN -> FAIL [fdo#105683]
* igt@kms_panel_fitting@legacy:
- shard-skl: NOTRUN -> FAIL [fdo#105456]
* {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
- shard-apl: PASS -> FAIL [fdo#108948]
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885]
* igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +5
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- {shard-iclb}: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_universal_plane@universal-plane-pipe-b-functional:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@pm_rpm@pc8-residency:
- shard-skl: SKIP -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@system-suspend:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#108654]
* igt@pm_rpm@universal-planes:
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108654] / [fdo#108756]
* {igt@runner@aborted}:
- {shard-iclb}: NOTRUN -> FAIL [fdo#108654] / [fdo#108756]
#### Possible fixes ####
* igt@gem_exec_nop@basic-series:
- shard-snb: INCOMPLETE [fdo#105411] -> PASS
* igt@kms_busy@basic-modeset-a:
- shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +8
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-glk: DMESG-WARN [fdo#107956] -> PASS
- {shard-iclb}: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS +1
* igt@kms_color@pipe-b-ctm-green-to-red:
- shard-skl: FAIL [fdo#107201] -> PASS
* igt@kms_color@pipe-b-degamma:
- shard-skl: FAIL [fdo#104782] -> PASS
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size:
- {shard-iclb}: DMESG-WARN [fdo#107724] -> PASS +9
* igt@kms_cursor_legacy@pipe-c-single-move:
- shard-skl: INCOMPLETE -> PASS
* igt@kms_draw_crc@draw-method-rgb565-render-untiled:
- {shard-iclb}: WARN [fdo#108336] -> PASS +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- {shard-iclb}: DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS
* igt@kms_frontbuffer_tracking@fbc-suspend:
- {shard-iclb}: DMESG-FAIL [fdo#107724] -> PASS +4
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- {shard-iclb}: FAIL [fdo#105683] -> PASS
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
- {shard-iclb}: FAIL [fdo#103167] -> PASS
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- {shard-iclb}: FAIL [fdo#103166] -> PASS +1
* igt@kms_psr@no_drrs:
- {shard-iclb}: FAIL [fdo#108341] -> PASS
* igt@kms_rotation_crc@sprite-rotation-180:
- {shard-iclb}: DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +5
* igt@pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-skl: INCOMPLETE [fdo#107807] -> SKIP
#### Warnings ####
* igt@i915_suspend@shrink:
- shard-apl: DMESG-WARN [fdo#108784] -> INCOMPLETE [fdo#103927] / [fdo#106886]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- {shard-iclb}: FAIL [fdo#103232] -> DMESG-WARN [fdo#107724] / [fdo#108336]
* igt@kms_cursor_crc@cursor-64x64-suspend:
- {shard-iclb}: FAIL [fdo#103232] -> DMESG-FAIL [fdo#103232] / [fdo#107724]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
- {shard-iclb}: DMESG-FAIL [fdo#107724] -> FAIL [fdo#103167]
* igt@kms_hdmi_inject@inject-audio:
- {shard-iclb}: FAIL [fdo#102370] -> DMESG-FAIL [fdo#107724]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
[fdo#102370]: https://bugs.freedesktop.org/show_bug.cgi?id=102370
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105456]: https://bugs.freedesktop.org/show_bug.cgi?id=105456
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#105683]: https://bugs.freedesktop.org/show_bug.cgi?id=105683
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#106886]: https://bugs.freedesktop.org/show_bug.cgi?id=106886
[fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
[fdo#107720]: https://bugs.freedesktop.org/show_bug.cgi?id=107720
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108336]: https://bugs.freedesktop.org/show_bug.cgi?id=108336
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108470]: https://bugs.freedesktop.org/show_bug.cgi?id=108470
[fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
[fdo#108756]: https://bugs.freedesktop.org/show_bug.cgi?id=108756
[fdo#108784]: https://bugs.freedesktop.org/show_bug.cgi?id=108784
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_5287 -> Patchwork_11051
CI_DRM_5287: 1f240056ad2a4b4b4f174f652202dd7d9e7d0fed @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11051: 5764fd06525a74522e006d9c2557f45b79aacc40 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11051/
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx