Skip to contentSkip to conversation

drm/msm/a6xx: add a6xx_gpu_state_get

PATCH In review Chia-I Wu 2 participants 2 messages Dec 20, 2018 1 message not in the archive

Subsystems (3)
DRM drivers DRM driver for Qualcomm display hardware DRM driver for Qualcomm Adreno GPUs
lore
Share & tools
lore

Chia-I Wu

author
#0 lore raw

PATCH 1/1 drm/msm/a6xx: add a6xx_gpu_state_get

It gets the generic states from the adreno core.

This also adds a missing NULL check in msm_gpu_open.

Signed-off-by Chia-I Wu <[email protected]>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 44 +++++++++++++++++++++++++++
 drivers/gpu/drm/msm/msm_debugfs.c     |  2 +-
 2 files changed, 45 insertions(+), 1 deletion(-)
drivers/gpu/drm/msm/adreno/a6xx_gpu.c +44 -0
index 631257c297fd..dff3367aa432 100644
@@ -778,6 +778,48 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
 	return (unsigned long)busy_time;
 }
 
+struct a6xx_gpu_state {
+	struct msm_gpu_state base;
+};
+
+static struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu)
+{
+	struct a6xx_gpu_state *a6xx_state = kzalloc(sizeof(*a6xx_state),
+			GFP_KERNEL);
+
+	if (!a6xx_state)
+		return ERR_PTR(-ENOMEM);
+
+	/* Temporarily disable hardware clock gating before reading the hw */
+	a6xx_set_hwcg(gpu, false);
+
+	/* get the generic state from the adreno core */
+	adreno_gpu_state_get(gpu, &(a6xx_state->base));
+
+	a6xx_set_hwcg(gpu, true);
+
+	return &a6xx_state->base;
+}
+
+static void a6xx_gpu_state_destroy(struct kref *kref)
+{
+	struct msm_gpu_state *state = container_of(kref,
+		struct msm_gpu_state, ref);
+	struct a6xx_gpu_state *a6xx_state = container_of(state,
+		struct a6xx_gpu_state, base);
+
+	adreno_gpu_state_destroy(state);
+	kfree(a6xx_state);
+}
+
+static int a6xx_gpu_state_put(struct msm_gpu_state *state)
+{
+	if (IS_ERR_OR_NULL(state))
+		return 1;
+
+	return kref_put(&state->ref, a6xx_gpu_state_destroy);
+}
+
 static const struct adreno_gpu_funcs funcs = {
 	.base = {
 		.get_param = adreno_get_param,

@@ -794,6 +836,8 @@ static const struct adreno_gpu_funcs funcs = {
 		.show = a6xx_show,
 #endif
 		.gpu_busy = a6xx_gpu_busy,
+		.gpu_state_get = a6xx_gpu_state_get,
+		.gpu_state_put = a6xx_gpu_state_put,
 		.gpu_get_freq = a6xx_gmu_get_freq,
 		.gpu_set_freq = a6xx_gmu_set_freq,
 	},
drivers/gpu/drm/msm/msm_debugfs.c +1 -1
index f0da0d3c8a80..ee80856c4476 100644
@@ -75,7 +75,7 @@ static int msm_gpu_open(struct inode *inode, struct file *file)
 	struct msm_gpu_show_priv *show_priv;
 	int ret;
 
-	if (!gpu)
+	if (!gpu || !gpu->funcs->gpu_state_get)
 		return -ENODEV;
 
 	show_priv = kmalloc(sizeof(*show_priv), GFP_KERNEL);
Signature · 6 lines
2.20.1.415.g653613c723-goog

_______________________________________________
Freedreno mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/freedreno
#2 lore raw
In reply to a message not in the archive
Quoted 5 lines · Chia-I Wu

It gets the generic states from the adreno core.

This also adds a missing NULL check in msm_gpu_open.

Signed-off-by Chia-I Wu <[email protected]>

Thanks for the patch. We have an expanded version of the 6xx gpu state in msm-next [1]. You can look at that and see if it meets your needs and then let us know if you have any suggestions.

Jordan

[1] https://cgit.freedesktop.org/~robclark/linux/commit/?h=msm-next&id=1707add815519da406c2d1444a1f10ef8bb4ad5b

Quoted 87 lines
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 44 +++++++++++++++++++++++++++
 drivers/gpu/drm/msm/msm_debugfs.c     |  2 +-
 2 files changed, 45 insertions(+), 1 deletion(-)
drivers/gpu/drm/msm/adreno/a6xx_gpu.c +44 -0
index 631257c297fd..dff3367aa432 100644
@@ -778,6 +778,48 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
 	return (unsigned long)busy_time;
 }
 
+struct a6xx_gpu_state {
+	struct msm_gpu_state base;
+};
+
+static struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu)
+{
+	struct a6xx_gpu_state *a6xx_state = kzalloc(sizeof(*a6xx_state),
+			GFP_KERNEL);
+
+	if (!a6xx_state)
+		return ERR_PTR(-ENOMEM);
+
+	/* Temporarily disable hardware clock gating before reading the hw */
+	a6xx_set_hwcg(gpu, false);
+
+	/* get the generic state from the adreno core */
+	adreno_gpu_state_get(gpu, &(a6xx_state->base));
+
+	a6xx_set_hwcg(gpu, true);
+
+	return &a6xx_state->base;
+}
+
+static void a6xx_gpu_state_destroy(struct kref *kref)
+{
+	struct msm_gpu_state *state = container_of(kref,
+		struct msm_gpu_state, ref);
+	struct a6xx_gpu_state *a6xx_state = container_of(state,
+		struct a6xx_gpu_state, base);
+
+	adreno_gpu_state_destroy(state);
+	kfree(a6xx_state);
+}
+
+static int a6xx_gpu_state_put(struct msm_gpu_state *state)
+{
+	if (IS_ERR_OR_NULL(state))
+		return 1;
+
+	return kref_put(&state->ref, a6xx_gpu_state_destroy);
+}
+
 static const struct adreno_gpu_funcs funcs = {
 	.base = {
 		.get_param = adreno_get_param,

@@ -794,6 +836,8 @@ static const struct adreno_gpu_funcs funcs = {
 		.show = a6xx_show,
 #endif
 		.gpu_busy = a6xx_gpu_busy,
+		.gpu_state_get = a6xx_gpu_state_get,
+		.gpu_state_put = a6xx_gpu_state_put,
 		.gpu_get_freq = a6xx_gmu_get_freq,
 		.gpu_set_freq = a6xx_gmu_set_freq,
 	},
drivers/gpu/drm/msm/msm_debugfs.c +1 -1
index f0da0d3c8a80..ee80856c4476 100644
@@ -75,7 +75,7 @@ static int msm_gpu_open(struct inode *inode, struct file *file)
 	struct msm_gpu_show_priv *show_priv;
 	int ret;
 
-	if (!gpu)
+	if (!gpu || !gpu->funcs->gpu_state_get)
 		return -ENODEV;
 
 	show_priv = kmalloc(sizeof(*show_priv), GFP_KERNEL);
Signature · 6 lines
2.20.1.415.g653613c723-goog

_______________________________________________
Freedreno mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/freedreno
Signature · 6 lines
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
Freedreno mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/freedreno