Odroid c1+ usb fixs

RFC In review Anand Moon 2 participants 25 messages Jan 23, 2019 – Feb 17, 2019

Subsystems (3)

Device tree bindings Arm/Amlogic Meson SoC support Generic PHY framework

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Anand Moon

author

2019-01-23 15:12 UTC #0 lore raw

cover Odroid c1+ usb fixs

This is follow up on my previous patches.

[0] https://lore.kernel.org/patchwork/patch/1031616/
[1] https://lore.kernel.org/patchwork/patch/1031617/

As per Martin's suggestion and input I have tried to fix below issue.

Fixed the phy power issue on the usb port.

# cat /sys/kernel/debug/regulator/regulator_summary
    USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
       phy-c1108820.phy.1         2                                 0mA     0mV     0mV
       phy-c1108800.phy.0         2                                 0mA     0mV     0mV

Fixed the OTG phy warning and initilizaion of usb0_phy

# lsusb -t
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 5, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 2: Dev 3, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 4, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 4, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 4, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 4, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M

Now hotpluing of usb device is working on odroid c1+ boards.
TODO: need to initialize the otg usb port to accept usb device.

Any input are welcome

Best Regards
-Anand

Anand Moon (3):
phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs
ARM: dts: meson8b: odroidc1: fix USB power supplies for phy
ARM: dts: meson8b: odroidc1: enable the OTG capable USB controller

 arch/arm/boot/dts/meson8b-odroidc1.dts | 27 ++++++++++++++++++++++++++
 drivers/phy/amlogic/phy-meson8b-usb2.c | 15 ++++++++++++++
 2 files changed, 42 insertions(+)

Signature · 1 line

2.20.1

Anand Moon

author

2019-01-23 15:12 UTC #1 lore raw

RFC 1/3 phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Meson8b support two USB phy controller, one with otg port and other usb host controller. USB OTG controller ie. otg port can be used to power on board or host port for usb device. Changes enable usb otg host controller when dr_mode is set to otg. Currenly otg port can be used to power on the board.

Cc Martin Blumenstingl <[email protected]>

Cc Jerome Brunet <[email protected]>

Cc Neil Armstrong <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Anand Moon <[email protected]>

---
New patch in this series.
--TOTO enable OTG port to work as host. --Currently we can power on the board from this OTG port.

/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M

    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 3, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 3, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
---
 drivers/phy/amlogic/phy-meson8b-usb2.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

drivers/phy/amlogic/phy-meson8b-usb2.c +15 -0

index 9c01b7e19b06..1333c77e9172 100644
@@ -109,6 +109,7 @@
 
 #define RESET_COMPLETE_TIME				500
 #define ACA_ENABLE_COMPLETE_TIME			50
+#define DCD_ENABLE_COMPLETE_TIME			10
 
 struct phy_meson8b_usb2_priv {
 	void __iomem		*regs;

@@ -188,6 +189,20 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
 
 		udelay(ACA_ENABLE_COMPLETE_TIME);
 
+		if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
+			REG_ADP_BC_ACA_PIN_FLOAT) {
+			dev_warn(&phy->dev, "USB ID detect failed!\n");
+			clk_disable_unprepare(priv->clk_usb);
+			clk_disable_unprepare(priv->clk_usb_general);
+			return -EINVAL;
+		}
+	} else if (priv->dr_mode == USB_DR_MODE_OTG) {
+		phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
+					   REG_ADP_BC_DCD_ENABLE,
+					   REG_ADP_BC_DCD_ENABLE);
+
+		udelay(DCD_ENABLE_COMPLETE_TIME);
+
 		if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
 			REG_ADP_BC_ACA_PIN_FLOAT) {
 			dev_warn(&phy->dev, "USB ID detect failed!\n");

Signature · 1 line

2.20.1

Martin Blumenstingl

reviewer

2019-02-04 13:20 UTC #2 lore raw

Re: [RFCv1 1/3] phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Hi Anand,

Quoted 5 lines · Anand Moon

Meson8b support two USB phy controller, one with otg port and other usb host controller. USB OTG controller ie. otg port can be used to power on board or host port for usb device. Changes enable usb otg host controller when dr_mode is set to otg.

can you please add a sentence explaining *why* this allows enabling USB OTG?

Quoted 1 line

Currenly otg port can be used to power on the board.

typo, should be "Currently"

Quoted 39 lines

Cc Martin Blumenstingl <[email protected]>

Cc Jerome Brunet <[email protected]>

Cc Neil Armstrong <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Anand Moon <[email protected]>

---
New patch in this series.
--TOTO enable OTG port to work as host. --Currently we can power on the board from this OTG port.

/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M

    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 3, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 3, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
---
 drivers/phy/amlogic/phy-meson8b-usb2.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

drivers/phy/amlogic/phy-meson8b-usb2.c +2 -0

index 9c01b7e19b06..1333c77e9172 100644
@@ -109,6 +109,7 @@
 
 #define RESET_COMPLETE_TIME                            500
 #define ACA_ENABLE_COMPLETE_TIME                       50
+#define DCD_ENABLE_COMPLETE_TIME                       10
 
 struct phy_meson8b_usb2_priv {
        void __iomem            *regs;

@@ -188,6 +189,20 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
 
                udelay(ACA_ENABLE_COMPLETE_TIME);
 
+               if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &

drivers/phy/amlogic/phy-meson8b-usb2.c static int phy_meson8b_usb2_power_on(struct phy *phy) · line 202

Quoted 10 lines

drivers/phy/amlogic/phy-meson8b-usb2.c +10 -0

+                       REG_ADP_BC_ACA_PIN_FLOAT) {
+                       dev_warn(&phy->dev, "USB ID detect failed!\n");
+                       clk_disable_unprepare(priv->clk_usb);
+                       clk_disable_unprepare(priv->clk_usb_general);
+                       return -EINVAL;
+               }
+       } else if (priv->dr_mode == USB_DR_MODE_OTG) {
+               phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
+                                          REG_ADP_BC_DCD_ENABLE,
+                                          REG_ADP_BC_DCD_ENABLE);

where did you take this from?

$ grep -iR DCD arm-src-kernel-2015-01-15-321cfb5a46/drivers/amlogic/usb/dwc_otg/310/
-> I only find code which clears REG_ADP_BC_DCD_ENABLE (your patch sets it):
  adp_bc.b.dcd_enable = 0;

drivers/phy/amlogic/phy-meson8b-usb2.c static int phy_meson8b_usb2_power_on(struct phy *phy) · line 204

Quoted 1 line

drivers/phy/amlogic/phy-meson8b-usb2.c +1 -0
+               udelay(DCD_ENABLE_COMPLETE_TIME);

from Amlogic's code: DWC_MDELAY(T_DCD_TIMEOUT);
while you are also using a delay of "10" the unit is different (your
patch: us, Amlogic: ms)

Regards
Martin

Anand Moon

author

2019-02-04 20:02 UTC #3 lore raw

Re: [RFCv1 1/3] phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Hi Martin,

Thanks for your review comment.
Please find my comments below.

Quoted 5 lines · Martin Blumenstingl

Hi Anand,
Quoted 1 line · Anand Moon

Quoted 8 lines

Quoted 4 lines
Meson8b support two USB phy controller, one with otg port and other usb host controller. USB OTG controller ie. otg port can be used to power on board or host port for usb device. Changes enable usb otg host controller when dr_mode is set to otg.
can you please add a sentence explaining *why* this allows enabling USB OTG?
Quoted 1 line
Currenly otg port can be used to power on the board.
typo, should be "Currently"

Ok I will fix this next version.

Quoted 39 lines

Cc Martin Blumenstingl <[email protected]>

Cc Jerome Brunet <[email protected]>

Cc Neil Armstrong <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Anand Moon <[email protected]>

---
New patch in this series.
--TOTO enable OTG port to work as host. --Currently we can power on the board from this OTG port.

/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M

    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 3, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 3, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
---
 drivers/phy/amlogic/phy-meson8b-usb2.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

drivers/phy/amlogic/phy-meson8b-usb2.c +1 -0

index 9c01b7e19b06..1333c77e9172 100644
@@ -109,6 +109,7 @@
 
 #define RESET_COMPLETE_TIME                            500
 #define ACA_ENABLE_COMPLETE_TIME                       50
+#define DCD_ENABLE_COMPLETE_TIME                       10
 
 struct phy_meson8b_usb2_priv {
        void __iomem            *regs;

@@ -188,6 +189,20 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
 
                udelay(ACA_ENABLE_COMPLETE_TIME);

Quoted 12 lines

drivers/phy/amlogic/phy-meson8b-usb2.c static int phy_meson8b_usb2_power_on(struct phy *phy) · line 202

Quoted 11 lines

drivers/phy/amlogic/phy-meson8b-usb2.c +11 -0

+               if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
+                       REG_ADP_BC_ACA_PIN_FLOAT) {
+                       dev_warn(&phy->dev, "USB ID detect failed!\n");
+                       clk_disable_unprepare(priv->clk_usb);
+                       clk_disable_unprepare(priv->clk_usb_general);
+                       return -EINVAL;
+               }
+       } else if (priv->dr_mode == USB_DR_MODE_OTG) {
+               phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
+                                          REG_ADP_BC_DCD_ENABLE,
+                                          REG_ADP_BC_DCD_ENABLE);

where did you take this from?

As per the schematic it's otg phy,
I study the code to enable "host" mode for phy1 and on similar line I tried to enable otg phy.
this changes will come into effect when we set dr_mode="otg" in dts. but it do not enable this as host port.

*Second thought this enable DCD which seem the be wrong. Thanks for porting out* We could set this to 0 at initial state for now and it will work as it should. I will send the correct fix later.

Quoted 3 lines

$ grep -iR DCD arm-src-kernel-2015-01-15-321cfb5a46/drivers/amlogic/usb/dwc_otg/310/
-> I only find code which clears REG_ADP_BC_DCD_ENABLE (your patch sets it):
  adp_bc.b.dcd_enable = 0;

This usb port act as a changer port but it also depend on the how this port is tuned to various states as shown below.

Standard Downstream Port (SDP) is a downstream port that complies
with the USB 2.0 or USB 3.0 definition of a host or hub.
Charging Downstream Port (CDP) is a downstream port that complies
with the USB 2.0 or USB 3.0 definition of a host or a hub.
Dedicated Charging Port (DCP) is a downstream port on a device
that outputs power through a USB connector.

We cannot observe this now because this behave like a states machine which is possible handled both in kernel driver and u-boot of Amlogic. As per schematics this (page 7) we have a external jumper set to control the power path of the port.

Odroid Wiki also says so.
[0] https://wiki.odroid.com/odroid-c1/hardware/otg_power_enable

Quoted 6 lines

drivers/phy/amlogic/phy-meson8b-usb2.c static int phy_meson8b_usb2_power_on(struct phy *phy) · line 204
Quoted 2 lines
drivers/phy/amlogic/phy-meson8b-usb2.c +1 -0
+               udelay(DCD_ENABLE_COMPLETE_TIME);
from Amlogic's code: DWC_MDELAY(T_DCD_TIMEOUT);
while you are also using a delay of "10" the unit is different (your
patch: us, Amlogic: ms)

This timeout is basically used in the state machine in the kernel and u-boot to tune the phy
Not sure this changes will affect the phy power state.

Quoted 3 lines

Regards
Martin

Best Regards

-Anand

Martin Blumenstingl

reviewer

2019-02-04 20:26 UTC #4 lore raw

Re: [RFCv1 1/3] phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Hi Anand,

Quoted 76 lines · Anand Moon

Hi Martin,
Thanks for your review comment.
Please find my comments below.
Quoted 5 lines · Martin Blumenstingl
Hi Anand,
Quoted 1 line · Anand Moon
Quoted 8 lines
Quoted 4 lines
Meson8b support two USB phy controller, one with otg port and other usb host controller. USB OTG controller ie. otg port can be used to power on board or host port for usb device. Changes enable usb otg host controller when dr_mode is set to otg.
can you please add a sentence explaining *why* this allows enabling USB OTG?
Quoted 1 line
Currenly otg port can be used to power on the board.
typo, should be "Currently"
Ok I will fix this next version.
Quoted 39 lines
Quoted 39 lines
Cc Martin Blumenstingl <[email protected]>
Cc Jerome Brunet <[email protected]>
Cc Neil Armstrong <[email protected]>
Cc Kevin Hilman <[email protected]>
Signed-off-by Anand Moon <[email protected]>
---
New patch in this series.
--TOTO enable OTG port to work as host. --Currently we can power on the board from this OTG port.
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 3, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 3, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
---
 drivers/phy/amlogic/phy-meson8b-usb2.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
drivers/phy/amlogic/phy-meson8b-usb2.c +1 -0
index 9c01b7e19b06..1333c77e9172 100644
@@ -109,6 +109,7 @@
 
 #define RESET_COMPLETE_TIME                            500
 #define ACA_ENABLE_COMPLETE_TIME                       50
+#define DCD_ENABLE_COMPLETE_TIME                       10
 
 struct phy_meson8b_usb2_priv {
        void __iomem            *regs;
@@ -188,6 +189,20 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
 
                udelay(ACA_ENABLE_COMPLETE_TIME);
 
Quoted 12 lines
drivers/phy/amlogic/phy-meson8b-usb2.c static int phy_meson8b_usb2_power_on(struct phy *phy) · line 202
Quoted 11 lines
drivers/phy/amlogic/phy-meson8b-usb2.c +11 -0
+               if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
+                       REG_ADP_BC_ACA_PIN_FLOAT) {
+                       dev_warn(&phy->dev, "USB ID detect failed!\n");
+                       clk_disable_unprepare(priv->clk_usb);
+                       clk_disable_unprepare(priv->clk_usb_general);
+                       return -EINVAL;
+               }
+       } else if (priv->dr_mode == USB_DR_MODE_OTG) {
+               phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
+                                          REG_ADP_BC_DCD_ENABLE,
+                                          REG_ADP_BC_DCD_ENABLE);
where did you take this from?

Quoted 3 lines

As per the schematic it's otg phy,
I study the code to enable "host" mode for phy1 and on similar line I tried to enable otg phy.

dragons ahead!
if you want to work on OTG support then I'm fine with this (from time to time people ask about this on IRC)!
But beware that this needs more than a few changes to the PHY driver.

Amlogic's code uses a timer to poll whether the port is in HOST or DEVICE mode and switches the mode accordingly, see [0] however, this is not just limited to the PHY but it also requires switching the dwc2 registers

personally I would start with getting device / peripheral mode working for usb0. if you're lucky the PHY driver will work without any changes and you only need to set the correct dr_mode along with the g-* properties.

Quoted 21 lines

this changes will come into effect when we set dr_mode="otg" in dts. but it do not enable this as host port.
*Second thought this enable DCD which seem the be wrong. Thanks for porting out* We could set this to 0 at initial state for now and it will work as it should. I will send the correct fix later.
Quoted 3 lines
$ grep -iR DCD arm-src-kernel-2015-01-15-321cfb5a46/drivers/amlogic/usb/dwc_otg/310/
-> I only find code which clears REG_ADP_BC_DCD_ENABLE (your patch sets it):
  adp_bc.b.dcd_enable = 0;
This usb port act as a changer port but it also depend on the how this port is tuned to various states as shown below.
Standard Downstream Port (SDP) is a downstream port that complies
with the USB 2.0 or USB 3.0 definition of a host or hub.
Charging Downstream Port (CDP) is a downstream port that complies
with the USB 2.0 or USB 3.0 definition of a host or a hub.
Dedicated Charging Port (DCP) is a downstream port on a device
that outputs power through a USB connector.

Quoted 7 lines

We cannot observe this now because this behave like a states machine which is possible handled both in kernel driver and u-boot of Amlogic. As per schematics this (page 7) we have a external jumper set to control the power path of the port.
Odroid Wiki also says so.
[0] https://wiki.odroid.com/odroid-c1/hardware/otg_power_enable

this seems hard to implement, because the same wiki page also states:
"If your C1+ PCB is previous version, you need to desolder the R94 as described in this link."

Regards
Martin

[0] https://github.com/endlessm/linux-meson/blob/0672f0b61eb92ba63c91d858a678d2c3a0bba06a/drivers/amlogic/usb/dwc_otg/310/dwc_otg_driver.c#L716

Anand Moon

author

2019-02-05 19:52 UTC #5 lore raw

Re: [RFCv1 1/3] phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Hi Martin,

Thanks for your views.

Quoted 88 lines · Martin Blumenstingl

Hi Anand,
Quoted 76 lines · Anand Moon
Hi Martin,
Thanks for your review comment.
Please find my comments below.
Quoted 5 lines · Martin Blumenstingl
Hi Anand,
Quoted 1 line · Anand Moon
Quoted 8 lines
Quoted 4 lines
Meson8b support two USB phy controller, one with otg port and other usb host controller. USB OTG controller ie. otg port can be used to power on board or host port for usb device. Changes enable usb otg host controller when dr_mode is set to otg.
can you please add a sentence explaining *why* this allows enabling USB OTG?
Quoted 1 line
Currenly otg port can be used to power on the board.
typo, should be "Currently"
Ok I will fix this next version.
Quoted 39 lines
Quoted 39 lines
Cc Martin Blumenstingl <[email protected]>
Cc Jerome Brunet <[email protected]>
Cc Neil Armstrong <[email protected]>
Cc Kevin Hilman <[email protected]>
Signed-off-by Anand Moon <[email protected]>
---
New patch in this series.
--TOTO enable OTG port to work as host. --Currently we can power on the board from this OTG port.
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 3, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 3, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 3, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
---
 drivers/phy/amlogic/phy-meson8b-usb2.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
drivers/phy/amlogic/phy-meson8b-usb2.c +1 -0
index 9c01b7e19b06..1333c77e9172 100644
@@ -109,6 +109,7 @@
 
 #define RESET_COMPLETE_TIME                            500
 #define ACA_ENABLE_COMPLETE_TIME                       50
+#define DCD_ENABLE_COMPLETE_TIME                       10
 
 struct phy_meson8b_usb2_priv {
        void __iomem            *regs;
@@ -188,6 +189,20 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
 
                udelay(ACA_ENABLE_COMPLETE_TIME);
 
Quoted 12 lines
drivers/phy/amlogic/phy-meson8b-usb2.c static int phy_meson8b_usb2_power_on(struct phy *phy) · line 202
Quoted 11 lines
drivers/phy/amlogic/phy-meson8b-usb2.c +11 -0
+               if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
+                       REG_ADP_BC_ACA_PIN_FLOAT) {
+                       dev_warn(&phy->dev, "USB ID detect failed!\n");
+                       clk_disable_unprepare(priv->clk_usb);
+                       clk_disable_unprepare(priv->clk_usb_general);
+                       return -EINVAL;
+               }
+       } else if (priv->dr_mode == USB_DR_MODE_OTG) {
+               phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
+                                          REG_ADP_BC_DCD_ENABLE,
+                                          REG_ADP_BC_DCD_ENABLE);
where did you take this from?
Quoted 3 lines
As per the schematic it's otg phy,
I study the code to enable "host" mode for phy1 and on similar line I tried to enable otg phy.
dragons ahead!
if you want to work on OTG support then I'm fine with this (from time to time people ask about this on IRC)!
But beware that this needs more than a few changes to the PHY driver.

Quoted 4 lines

Amlogic's code uses a timer to poll whether the port is in HOST or DEVICE mode and switches the mode accordingly, see [0] however, this is not just limited to the PHY but it also requires switching the dwc2 registers

Ok thanks for the input.

Quoted 5 lines

personally I would start with getting device / peripheral mode working for usb0. if you're lucky the PHY driver will work without any changes and you only need to set the correct dr_mode along with the g-* properties.

Yes that should be the goal on getting working usb0 phy and otg port. So for now we will drop this patch and disable the usb_phy0 mode in dts for Odroid c2
in order to get ride of the power failed WARNING.

When we get the usb0 node to work again with good phy configuration and tuning we can re-enable the nodes. I will try to look into this in the future.

Can you share your thought on this.

Quoted 38 lines

Quoted 21 lines
this changes will come into effect when we set dr_mode="otg" in dts. but it do not enable this as host port.
*Second thought this enable DCD which seem the be wrong. Thanks for porting out* We could set this to 0 at initial state for now and it will work as it should. I will send the correct fix later.
Quoted 3 lines
$ grep -iR DCD arm-src-kernel-2015-01-15-321cfb5a46/drivers/amlogic/usb/dwc_otg/310/
-> I only find code which clears REG_ADP_BC_DCD_ENABLE (your patch sets it):
  adp_bc.b.dcd_enable = 0;
This usb port act as a changer port but it also depend on the how this port is tuned to various states as shown below.
Standard Downstream Port (SDP) is a downstream port that complies
with the USB 2.0 or USB 3.0 definition of a host or hub.
Charging Downstream Port (CDP) is a downstream port that complies
with the USB 2.0 or USB 3.0 definition of a host or a hub.
Dedicated Charging Port (DCP) is a downstream port on a device
that outputs power through a USB connector.
Quoted 7 lines
We cannot observe this now because this behave like a states machine which is possible handled both in kernel driver and u-boot of Amlogic. As per schematics this (page 7) we have a external jumper set to control the power path of the port.
Odroid Wiki also says so.
[0] https://wiki.odroid.com/odroid-c1/hardware/otg_power_enable
this seems hard to implement, because the same wiki page also states:
"If your C1+ PCB is previous version, you need to desolder the R94 as described in this link."
Regards
Martin
[0] https://github.com/endlessm/linux-meson/blob/0672f0b61eb92ba63c91d858a678d2c3a0bba06a/drivers/amlogic/usb/dwc_otg/310/dwc_otg_driver.c#L716

Martin Blumenstingl

reviewer

2019-02-06 11:48 UTC #6 lore raw

Re: [RFCv1 1/3] phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Hi Anand,

On Tue, Feb 5, 2019 at 8:52 PM Anand Moon <[email protected]> wrote:
[...]

Quoted 9 lines

Quoted 4 lines
personally I would start with getting device / peripheral mode working for usb0. if you're lucky the PHY driver will work without any changes and you only need to set the correct dr_mode along with the g-* properties.
Yes that should be the goal on getting working usb0 phy and otg port. So for now we will drop this patch and disable the usb_phy0 mode in dts for Odroid c2
in order to get ride of the power failed WARNING.

I checked Kevin's Odroid-C2 (GXBB) on Kernel CI and I can't see any power failed warning: [0]

Quoted 4 lines

When we get the usb0 node to work again with good phy configuration and tuning we can re-enable the nodes. I will try to look into this in the future.
Can you share your thought on this.

sounds good to me! especially because it would give us OTG support on Meson8, Meson8b, Meson8m2 and GXBB (because these SoCs are sharing the same USB implementation)!

I see four challenges:
1. getting host mode working on the micro USB port. you have already proven that you can do this :)
2. getting peripheral mode working on the micro USB port. my hope is that it's only about setting the right dr_mode and the g-* properties on the usb0 node (but I haven't tried this)
3. make OTG detection work and integrate it with dwc2. I would consult the dwc2 maintainers to see what can be done
4. bring everything together, making sure that one feature doesn't break another

Regards
Martin

[0] https://storage.kernelci.org/next/master/next-20190130/arm64/defconfig/lab-baylibre-seattle/boot-meson-gxbb-odroidc2.html

Anand Moon

author

2019-02-07 06:41 UTC #7 lore raw

Re: [RFCv1 1/3] phy: meson8b-usb2: Enable otg phy controller on Meson8b SoCs

Hi Martin,

Quoted 25 lines · Martin Blumenstingl

Hi Anand,
On Tue, Feb 5, 2019 at 8:52 PM Anand Moon <[email protected]> wrote:
[...]
Quoted 9 lines
Quoted 4 lines
personally I would start with getting device / peripheral mode working for usb0. if you're lucky the PHY driver will work without any changes and you only need to set the correct dr_mode along with the g-* properties.
Yes that should be the goal on getting working usb0 phy and otg port. So for now we will drop this patch and disable the usb_phy0 mode in dts for Odroid c2
in order to get ride of the power failed WARNING.
I checked Kevin's Odroid-C2 (GXBB) on Kernel CI and I can't see any power failed warning: [0]
Quoted 4 lines
When we get the usb0 node to work again with good phy configuration and tuning we can re-enable the nodes. I will try to look into this in the future.
Can you share your thought on this.
sounds good to me! especially because it would give us OTG support on Meson8, Meson8b, Meson8m2 and GXBB (because these SoCs are sharing the same USB implementation)!

Quoted 10 lines

I see four challenges:
1. getting host mode working on the micro USB port. you have already proven that you can do this :)
2. getting peripheral mode working on the micro USB port. my hope is that it's only about setting the right dr_mode and the g-* properties on the usb0 node (but I haven't tried this)
3. make OTG detection work and integrate it with dwc2. I would consult the dwc2 maintainers to see what can be done
4. bring everything together, making sure that one feature doesn't break another

Thanks for the feedback!
I will give this a try, In case I am stuck I will ask to you help.

Quoted 6 lines

Regards
Martin
[0] https://storage.kernelci.org/next/master/next-20190130/arm64/defconfig/lab-baylibre-seattle/boot-meson-gxbb-odroidc2.html

Not a issue If I could reproduce my kernel warning consistently again I will share the boot log and the step I followed.
I will be dropping my patch for the initialization of usb0_phy untill correct solution is-found.

Best Regards
-Anand

Anand Moon

author

2019-01-23 15:12 UTC #8 lore raw

RFC 2/3 ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

In reply to Anand Moon

This patch enables the USB Host controller (USB0) and the relative USB0 PHY.

Quoted 1 line

From the shematics GPIOAO.BIT5 gpio input for the PWREN signal of the

USB_OTG controller (usb0) which is also linked to USB_HOST controller (usb1). Add missing phy-supply link to both USB0 and USB1 phy controller
This changes fixed the power issue on usb ports. Changes help fix usb reset warning.

[  821.991470] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  825.243385] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  828.151310] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  830.991241] usb 1-1.2: reset high-speed USB device number 3 using dwc2

Fixes 2eb79a4d15ff ("ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board")

Cc Martin Blumenstingl <[email protected]>

Cc Jerome Brunet <[email protected]>

Cc Neil Armstrong <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Anand Moon <[email protected]>

---
Changes from previous patch.

Fix the subject and commit message as per Martin's request
--Add the signal name in the comment
--Replace vbus-supply with phy-supply linking the power supply to phy node as pointed by Marine
which a PWREN signal in the USB_HOST controller (usb1)

USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
   phy-c1108820.phy.1         2                                 0mA     0mV     0mV
   phy-c1108800.phy.0         2                                 0mA     0mV     0mV
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

arch/arm/boot/dts/meson8b-odroidc1.dts +26 -0

index 58669abda259..bfa472a679d9 100644
@@ -83,6 +83,22 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
+	usb_vbus: regulator-usb-vbus {
+		compatible = "regulator-fixed";
+
+		regulator-name = "USB_VBUS";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		vin-supply = <&p5v0>;
+
+		/*
+		 * signal name from schematics: PWREN
+		 */
+		gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
 	tflash_vdd: regulator-tflash_vdd {
 		/*
 		 * signal name from schematics: TFLASH_VDD_EN

@@ -295,8 +311,18 @@
 	pinctrl-names = "default";
 };
 
+&usb0_phy {
+	status = "okay";
+	phy-supply = <&usb_vbus>;
+};
+
 &usb1_phy {
 	status = "okay";
+	phy-supply = <&usb_vbus>;
+};
+
+&usb0 {
+	status = "okay";
 };
 
 &usb1 {

Signature · 1 line

2.20.1

Martin Blumenstingl

reviewer

2019-02-04 13:29 UTC #9 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Anand,

Quoted 6 lines · Anand Moon

This patch enables the USB Host controller (USB0) and the relative USB0 PHY. From the shematics GPIOAO.BIT5 gpio input for the PWREN signal of the USB_OTG controller (usb0) which is also linked to USB_HOST controller (usb1). Add missing phy-supply link to both USB0 and USB1 phy controller
This changes fixed the power issue on usb ports. Changes help fix usb reset warning.

I prefer to change the way patches 2 and 3 are split:
- this one should only add the regulators and link it with the USB controller
- patch 3 should enable usb0 and usb0_phy

the reason behind this is the "Fixes" tag below. it's good to have it, so please keep it in this patch!
however, enabling usb0 is not a fix for a commit which enables the "USB host controller on Odroid-C1/C1+" (which is why enabling usb0 and usb0_phy should be part of patch 3)

Quoted 54 lines

[  821.991470] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  825.243385] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  828.151310] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  830.991241] usb 1-1.2: reset high-speed USB device number 3 using dwc2

Fixes 2eb79a4d15ff ("ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board")

Cc Martin Blumenstingl <[email protected]>

Cc Jerome Brunet <[email protected]>

Cc Neil Armstrong <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Anand Moon <[email protected]>

---
Changes from previous patch.

USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
   phy-c1108820.phy.1         2                                 0mA     0mV     0mV
   phy-c1108800.phy.0         2                                 0mA     0mV     0mV
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

arch/arm/boot/dts/meson8b-odroidc1.dts +16 -0

index 58669abda259..bfa472a679d9 100644
@@ -83,6 +83,22 @@
                regulator-max-microvolt = <5000000>;
        };
 
+       usb_vbus: regulator-usb-vbus {
+               compatible = "regulator-fixed";
+
+               regulator-name = "USB_VBUS";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+
+               vin-supply = <&p5v0>;
+
+               /*
+                * signal name from schematics: PWREN
+                */
+               gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        tflash_vdd: regulator-tflash_vdd {
                /*
                 * signal name from schematics: TFLASH_VDD_EN

arch/arm/boot/dts/meson8b-odroidc1.dts line 316

Quoted 6 lines

arch/arm/boot/dts/meson8b-odroidc1.dts +3 -0

@@ -295,8 +311,18 @@
        pinctrl-names = "default";
 };
 
+&usb0_phy {
+       status = "okay";
+       phy-supply = <&usb_vbus>;

I'm not sure whether phy-supply is correct here
with the PHY framework and the dwc2 controller regulators can be set as:
- phy-supply (inside the PHY node)
- vbus-supply (inside the dwc2 controller node)

phy-supply is always enabled when the PHY is enabled. vbus-supply is smarter: it's enabled whenever the controller is in host mode (or OTG detects hosts mode), but disabled in device/peripheral mode

as far as I understand we don't want to send power to the "Micro USB" port if we're in device/peripheral mode.

Regards
Martin

Anand Moon

author

2019-02-04 20:03 UTC #10 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Martin,

Thanks for your comments.
Please find my comments below.

Quoted 14 lines · Martin Blumenstingl

Hi Anand,
Quoted 6 lines · Anand Moon
This patch enables the USB Host controller (USB0) and the relative USB0 PHY. From the shematics GPIOAO.BIT5 gpio input for the PWREN signal of the USB_OTG controller (usb0) which is also linked to USB_HOST controller (usb1). Add missing phy-supply link to both USB0 and USB1 phy controller
This changes fixed the power issue on usb ports. Changes help fix usb reset warning.
I prefer to change the way patches 2 and 3 are split:
- this one should only add the regulators and link it with the USB controller
- patch 3 should enable usb0 and usb0_phy

Quoted 6 lines

the reason behind this is the "Fixes" tag below. it's good to have it, so please keep it in this patch!
however, enabling usb0 is not a fix for a commit which enables the "USB host controller on Odroid-C1/C1+" (which is why enabling usb0 and usb0_phy should be part of patch 3)

Ok I will split this changes as per your suggestion.

Quoted 65 lines

Quoted 54 lines
[  821.991470] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  825.243385] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  828.151310] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  830.991241] usb 1-1.2: reset high-speed USB device number 3 using dwc2
Fixes 2eb79a4d15ff ("ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board")
Cc Martin Blumenstingl <[email protected]>
Cc Jerome Brunet <[email protected]>
Cc Neil Armstrong <[email protected]>
Cc Kevin Hilman <[email protected]>
Signed-off-by Anand Moon <[email protected]>
---
Changes from previous patch.
Fix the subject and commit message as per Martin's request
--Add the signal name in the comment
--Replace vbus-supply with phy-supply linking the power supply to phy node as pointed by Marine
which a PWREN signal in the USB_HOST controller (usb1)
USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
   phy-c1108820.phy.1         2                                 0mA     0mV     0mV
   phy-c1108800.phy.0         2                                 0mA     0mV     0mV
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
arch/arm/boot/dts/meson8b-odroidc1.dts +16 -0
index 58669abda259..bfa472a679d9 100644
@@ -83,6 +83,22 @@
                regulator-max-microvolt = <5000000>;
        };
 
+       usb_vbus: regulator-usb-vbus {
+               compatible = "regulator-fixed";
+
+               regulator-name = "USB_VBUS";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+
+               vin-supply = <&p5v0>;
+
+               /*
+                * signal name from schematics: PWREN
+                */
+               gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        tflash_vdd: regulator-tflash_vdd {
                /*
                 * signal name from schematics: TFLASH_VDD_EN
arch/arm/boot/dts/meson8b-odroidc1.dts line 316
Quoted 6 lines
arch/arm/boot/dts/meson8b-odroidc1.dts +3 -0
@@ -295,8 +311,18 @@
        pinctrl-names = "default";
 };
 
+&usb0_phy {
+       status = "okay";
+       phy-supply = <&usb_vbus>;
I'm not sure whether phy-supply is correct here
with the PHY framework and the dwc2 controller regulators can be set as:
- phy-supply (inside the PHY node)
- vbus-supply (inside the dwc2 controller node)

Quoted 5 lines

phy-supply is always enabled when the PHY is enabled. vbus-supply is smarter: it's enabled whenever the controller is in host mode (or OTG detects hosts mode), but disabled in device/peripheral mode

phy-supply enables the power per port power setting which get on when device is connected.

vbus-supply controls the D+ D- signal during high seed data transfer.

I have check this setting dr_mode="peripheral" it did not work out for me. Initial it supper the warning but it was not the correct solution.

Quoted 6 lines

as far as I understand we don't want to send power to the "Micro USB" port if we're in device/peripheral mode.
Regards
Martin

Best Regards

-Anand

Martin Blumenstingl

reviewer

2019-02-04 20:35 UTC #11 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Anand,

Quoted 22 lines · Anand Moon

Hi Martin,
Thanks for your comments.
Please find my comments below.
Quoted 14 lines · Martin Blumenstingl
Hi Anand,
Quoted 6 lines · Anand Moon
This patch enables the USB Host controller (USB0) and the relative USB0 PHY. From the shematics GPIOAO.BIT5 gpio input for the PWREN signal of the USB_OTG controller (usb0) which is also linked to USB_HOST controller (usb1). Add missing phy-supply link to both USB0 and USB1 phy controller
This changes fixed the power issue on usb ports. Changes help fix usb reset warning.
I prefer to change the way patches 2 and 3 are split:
- this one should only add the regulators and link it with the USB controller
- patch 3 should enable usb0 and usb0_phy

Quoted 8 lines

Quoted 6 lines
the reason behind this is the "Fixes" tag below. it's good to have it, so please keep it in this patch!
however, enabling usb0 is not a fix for a commit which enables the "USB host controller on Odroid-C1/C1+" (which is why enabling usb0 and usb0_phy should be part of patch 3)
Ok I will split this changes as per your suggestion.

thank you!

Quoted 65 lines

Quoted 65 lines
Quoted 54 lines
[  821.991470] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  825.243385] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  828.151310] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  830.991241] usb 1-1.2: reset high-speed USB device number 3 using dwc2
Fixes 2eb79a4d15ff ("ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board")
Cc Martin Blumenstingl <[email protected]>
Cc Jerome Brunet <[email protected]>
Cc Neil Armstrong <[email protected]>
Cc Kevin Hilman <[email protected]>
Signed-off-by Anand Moon <[email protected]>
---
Changes from previous patch.
Fix the subject and commit message as per Martin's request
--Add the signal name in the comment
--Replace vbus-supply with phy-supply linking the power supply to phy node as pointed by Marine
which a PWREN signal in the USB_HOST controller (usb1)
USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
   phy-c1108820.phy.1         2                                 0mA     0mV     0mV
   phy-c1108800.phy.0         2                                 0mA     0mV     0mV
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
arch/arm/boot/dts/meson8b-odroidc1.dts +16 -0
index 58669abda259..bfa472a679d9 100644
@@ -83,6 +83,22 @@
                regulator-max-microvolt = <5000000>;
        };
 
+       usb_vbus: regulator-usb-vbus {
+               compatible = "regulator-fixed";
+
+               regulator-name = "USB_VBUS";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+
+               vin-supply = <&p5v0>;
+
+               /*
+                * signal name from schematics: PWREN
+                */
+               gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        tflash_vdd: regulator-tflash_vdd {
                /*
                 * signal name from schematics: TFLASH_VDD_EN
arch/arm/boot/dts/meson8b-odroidc1.dts line 316
Quoted 6 lines
arch/arm/boot/dts/meson8b-odroidc1.dts +3 -0
@@ -295,8 +311,18 @@
        pinctrl-names = "default";
 };
 
+&usb0_phy {
+       status = "okay";
+       phy-supply = <&usb_vbus>;
I'm not sure whether phy-supply is correct here
with the PHY framework and the dwc2 controller regulators can be set as:
- phy-supply (inside the PHY node)
- vbus-supply (inside the dwc2 controller node)

Quoted 7 lines

Quoted 5 lines
phy-supply is always enabled when the PHY is enabled. vbus-supply is smarter: it's enabled whenever the controller is in host mode (or OTG detects hosts mode), but disabled in device/peripheral mode
phy-supply enables the power per port power setting which get on when device is connected.

the actual dt-bindings description is "a regulator that provides power to the PHY", see [0]
(note that it states that it powers the PHY, not the bus or any connected device)

Quoted 1 line

vbus-supply controls the D+ D- signal during high seed data transfer.

I believe this is not the case. the vbus-supply seems undocumented at the moment

however, the dwc2 driver has separate supplies for vusb_a (analog) and vusb_d (digital), see [1] (these are used here: [2])

VBUS (in my own words) is the +5V power signal which is provided by the USB host to power the USB device.

my interpretationfor the Amlogic SoCs is:
- vusb_a and vusb_d are generated internally, not sure if there's an external fixed regulator
- there is no phy-supply (the PHY itself is powered by clock-gating using the CLKID_USB clock)
- usb0 VBUS is controlled by GPIOAO_5

Regards
Martin

[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/drivers/usb/dwc2/core.h#L72
[2] https://elixir.bootlin.com/linux/v5.0-rc5/source/drivers/usb/dwc2/platform.c#L293

Anand Moon

author

2019-02-05 19:52 UTC #12 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Martin,

Quoted 122 lines · Martin Blumenstingl

Hi Anand,
Quoted 22 lines · Anand Moon
Hi Martin,
Thanks for your comments.
Please find my comments below.
Quoted 14 lines · Martin Blumenstingl
Hi Anand,
Quoted 6 lines · Anand Moon
This patch enables the USB Host controller (USB0) and the relative USB0 PHY. From the shematics GPIOAO.BIT5 gpio input for the PWREN signal of the USB_OTG controller (usb0) which is also linked to USB_HOST controller (usb1). Add missing phy-supply link to both USB0 and USB1 phy controller
This changes fixed the power issue on usb ports. Changes help fix usb reset warning.
I prefer to change the way patches 2 and 3 are split:
- this one should only add the regulators and link it with the USB controller
- patch 3 should enable usb0 and usb0_phy
Quoted 8 lines
Quoted 6 lines
the reason behind this is the "Fixes" tag below. it's good to have it, so please keep it in this patch!
however, enabling usb0 is not a fix for a commit which enables the "USB host controller on Odroid-C1/C1+" (which is why enabling usb0 and usb0_phy should be part of patch 3)
Ok I will split this changes as per your suggestion.
thank you!
Quoted 65 lines
Quoted 65 lines
Quoted 54 lines
[  821.991470] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  825.243385] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  828.151310] usb 1-1.2: reset high-speed USB device number 3 using dwc2
[  830.991241] usb 1-1.2: reset high-speed USB device number 3 using dwc2
Fixes 2eb79a4d15ff ("ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board")
Cc Martin Blumenstingl <[email protected]>
Cc Jerome Brunet <[email protected]>
Cc Neil Armstrong <[email protected]>
Cc Kevin Hilman <[email protected]>
Signed-off-by Anand Moon <[email protected]>
---
Changes from previous patch.
Fix the subject and commit message as per Martin's request
--Add the signal name in the comment
--Replace vbus-supply with phy-supply linking the power supply to phy node as pointed by Marine
which a PWREN signal in the USB_HOST controller (usb1)
USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
   phy-c1108820.phy.1         2                                 0mA     0mV     0mV
   phy-c1108800.phy.0         2                                 0mA     0mV     0mV
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
arch/arm/boot/dts/meson8b-odroidc1.dts +16 -0
index 58669abda259..bfa472a679d9 100644
@@ -83,6 +83,22 @@
                regulator-max-microvolt = <5000000>;
        };
 
+       usb_vbus: regulator-usb-vbus {
+               compatible = "regulator-fixed";
+
+               regulator-name = "USB_VBUS";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+
+               vin-supply = <&p5v0>;
+
+               /*
+                * signal name from schematics: PWREN
+                */
+               gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        tflash_vdd: regulator-tflash_vdd {
                /*
                 * signal name from schematics: TFLASH_VDD_EN
arch/arm/boot/dts/meson8b-odroidc1.dts line 316
Quoted 6 lines
arch/arm/boot/dts/meson8b-odroidc1.dts +3 -0
@@ -295,8 +311,18 @@
        pinctrl-names = "default";
 };
 
+&usb0_phy {
+       status = "okay";
+       phy-supply = <&usb_vbus>;
I'm not sure whether phy-supply is correct here
with the PHY framework and the dwc2 controller regulators can be set as:
- phy-supply (inside the PHY node)
- vbus-supply (inside the dwc2 controller node)
Quoted 7 lines
Quoted 5 lines
phy-supply is always enabled when the PHY is enabled. vbus-supply is smarter: it's enabled whenever the controller is in host mode (or OTG detects hosts mode), but disabled in device/peripheral mode
phy-supply enables the power per port power setting which get on when device is connected.
the actual dt-bindings description is "a regulator that provides power to the PHY", see [0]
(note that it states that it powers the PHY, not the bus or any connected device)
Quoted 1 line
vbus-supply controls the D+ D- signal during high seed data transfer.
I believe this is not the case. the vbus-supply seems undocumented at the moment
however, the dwc2 driver has separate supplies for vusb_a (analog) and vusb_d (digital), see [1] (these are used here: [2])
VBUS (in my own words) is the +5V power signal which is provided by the USB host to power the USB device.

Quoted 7 lines

my interpretationfor the Amlogic SoCs is:
- vusb_a and vusb_d are generated internally, not sure if there's an external fixed regulator
- there is no phy-supply (the PHY itself is powered by clock-gating using the CLKID_USB clock)
- usb0 VBUS is controlled by GPIOAO_5

But as per the device tree binding

[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt

its uses phy-supply to enable power to usb phy which seem to be correct option.

Quoted 8 lines

Regards
Martin
[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/drivers/usb/dwc2/core.h#L72
[2] https://elixir.bootlin.com/linux/v5.0-rc5/source/drivers/usb/dwc2/platform.c#L293

Best Regards

-Anand

Martin Blumenstingl

reviewer

2019-02-06 11:28 UTC #13 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Anand,

On Tue, Feb 5, 2019 at 8:53 PM Anand Moon <[email protected]> wrote:
[...]

Quoted 8 lines

Quoted 7 lines
my interpretationfor the Amlogic SoCs is:
- vusb_a and vusb_d are generated internally, not sure if there's an external fixed regulator
- there is no phy-supply (the PHY itself is powered by clock-gating using the CLKID_USB clock)
- usb0 VBUS is controlled by GPIOAO_5

Quoted 6 lines

But as per the device tree binding
[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
its uses phy-supply to enable power to usb phy which seem to be correct option.

phy-bindings.txt states that "phy-supply" is a "Phandle to a regulator that provides power to the PHY".
I have written the example in meson8b-usb2-phy.txt and I think it's wrong (back when I wrote it I didn't know about the "vbus-supply" property on the controller and I didn't know about the VBUS constraints).

I believe that the phy-supply property is intended for PHYs which need an external power supply (for example because they are not embedded into a SoC or if the SoC has separate voltage inputs for the PHY). I'm not aware of any PHY supply voltage on the Amlogic SoCs (I believe this is done internally within the SoC). instead they use clock gating to power down the PHY.

as far as I understand the VBUS signal it depends on the USB mode:
- host provides VBUS
- peripheral devices are powered using this voltage
- with OTG VBUS needs to be turned on or off depending on the current mode (host or peripheral)
with the "phy-supply" property there's no way to manage the regulator depending on the USB mode (host or peripheral), it will always be "on".

Regards
Martin

Anand Moon

author

2019-02-07 06:32 UTC #14 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Martin,

Quoted 43 lines · Martin Blumenstingl

Hi Anand,
On Tue, Feb 5, 2019 at 8:53 PM Anand Moon <[email protected]> wrote:
[...]
Quoted 8 lines
Quoted 7 lines
my interpretationfor the Amlogic SoCs is:
- vusb_a and vusb_d are generated internally, not sure if there's an external fixed regulator
- there is no phy-supply (the PHY itself is powered by clock-gating using the CLKID_USB clock)
- usb0 VBUS is controlled by GPIOAO_5
Quoted 6 lines
But as per the device tree binding
[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
its uses phy-supply to enable power to usb phy which seem to be correct option.
phy-bindings.txt states that "phy-supply" is a "Phandle to a regulator that provides power to the PHY".
I have written the example in meson8b-usb2-phy.txt and I think it's wrong (back when I wrote it I didn't know about the "vbus-supply" property on the controller and I didn't know about the VBUS constraints).
I believe that the phy-supply property is intended for PHYs which need an external power supply (for example because they are not embedded into a SoC or if the SoC has separate voltage inputs for the PHY). I'm not aware of any PHY supply voltage on the Amlogic SoCs (I believe this is done internally within the SoC). instead they use clock gating to power down the PHY.
as far as I understand the VBUS signal it depends on the USB mode:
- host provides VBUS
- peripheral devices are powered using this voltage
- with OTG VBUS needs to be turned on or off depending on the current mode (host or peripheral)
with the "phy-supply" property there's no way to manage the regulator depending on the USB mode (host or peripheral), it will always be "on".

Quoted 2 lines

Regards
Martin

Thanks for the clarification.
But this dose not work setting the usb1_phy to use vbus-supply.

 &usb1_phy {
        status = "okay";

+ vbus-supply = <&usb_vbus>;
};

I am attaching a small patch for testing.
[0] usbvbus.patch

Here is the summary of the above patch.

1. hot-plugins of usb device is not working.
2. only cold/warm boot let the device come up.
3. not power is supplied to the usb ports.
4. no power module is registered with the regulator summary.

# cat /sys/kernel/debug/regulator/regulator_summary
 regulator                      use open bypass  opmode voltage
current     min     max
---------------------------------------------------------------------------------------
 regulator-dummy                  4    3      0 unknown     0mV
0mA     0mV     0mV
    c90c0000.usb                  1
0mA     0mV     0mV
    c90c0000.usb                  1
0mA     0mV     0mV
    VCCK                          1    1      0 unknown   860mV
0mA   860mV  1140mV
       cpu0                       0
0mA   860mV   860mV
 P5V0                             2    4      0 unknown  5000mV
0mA  5000mV  5000mV
    VCC1V8                        1    1      0 unknown  1800mV
0mA  1800mV  1800mV
       c1108680.adc               1
0mA     0mV     0mV
    VCC3V3                        1    2      0 unknown  3300mV
0mA  3300mV  3300mV
       VDD_RTC                    0    0      0 unknown   900mV
0mA   900mV   900mV
       TFLASH_VDD                 1    1      0 unknown  3300mV
0mA  3300mV  3300mV
          c1108c20.mmc:slot@1     1
0mA  3300mV  3400mV
    DDR_VDDC                      0    0      0 unknown  1500mV
0mA  1500mV  1500mV
    USB_VBUS                      0    0      0 unknown  5000mV
0mA  5000mV  5000mV
 TF_IO                            0    1      0 unknown  3300mV
0mA  1800mV  3300mV
    c1108c20.mmc:slot@1           0
0mA     0mV     0mV

*So from my side phy-supply is the correct option.*

Best Regards
-Anand

arch/arm/boot/dts/meson8b-odroidc1.dts +15 -0

index 58669abda259..a04f5633adcf 100644
@@ -83,6 +83,20 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
+	usb_vbus: regulator-usb-vbus {
+		compatible = "regulator-fixed";
+
+		regulator-name = "USB_VBUS";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		/*
+		 * signal name from schematics: PWREN
+		 */
+		gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&p5v0>;
+	};
+
 	tflash_vdd: regulator-tflash_vdd {
 		/*
 		 * signal name from schematics: TFLASH_VDD_EN

@@ -297,6 +311,7 @@
 
 &usb1_phy {
 	status = "okay";
+	vbus-supply = <&usb_vbus>;
 };
 
 &usb1 {

_______________________________________________
linux-arm-kernel mailing list [email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Martin Blumenstingl

reviewer

2019-02-09 00:36 UTC #15 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Anand,

Quoted 54 lines · Anand Moon

Hi Martin,
Quoted 43 lines · Martin Blumenstingl
Hi Anand,
On Tue, Feb 5, 2019 at 8:53 PM Anand Moon <[email protected]> wrote:
[...]
Quoted 8 lines
Quoted 7 lines
my interpretationfor the Amlogic SoCs is:
- vusb_a and vusb_d are generated internally, not sure if there's an external fixed regulator
- there is no phy-supply (the PHY itself is powered by clock-gating using the CLKID_USB clock)
- usb0 VBUS is controlled by GPIOAO_5
Quoted 6 lines
But as per the device tree binding
[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
its uses phy-supply to enable power to usb phy which seem to be correct option.
phy-bindings.txt states that "phy-supply" is a "Phandle to a regulator that provides power to the PHY".
I have written the example in meson8b-usb2-phy.txt and I think it's wrong (back when I wrote it I didn't know about the "vbus-supply" property on the controller and I didn't know about the VBUS constraints).
I believe that the phy-supply property is intended for PHYs which need an external power supply (for example because they are not embedded into a SoC or if the SoC has separate voltage inputs for the PHY). I'm not aware of any PHY supply voltage on the Amlogic SoCs (I believe this is done internally within the SoC). instead they use clock gating to power down the PHY.
as far as I understand the VBUS signal it depends on the USB mode:
- host provides VBUS
- peripheral devices are powered using this voltage
- with OTG VBUS needs to be turned on or off depending on the current mode (host or peripheral)
with the "phy-supply" property there's no way to manage the regulator depending on the USB mode (host or peripheral), it will always be "on".
Quoted 2 lines
Regards
Martin
Thanks for the clarification.
But this dose not work setting the usb1_phy to use vbus-supply.

Quoted 7 lines

 &usb1_phy {
        status = "okay";
+ vbus-supply = <&usb_vbus>;
};
I am attaching a small patch for testing.
[0] usbvbus.patch

indeed, this is not working for me either.
I checked my old notes at [0] -> it works for me when setting "vbus-supply" at the usb controller (not the PHY).

with the following snippet:

  &usb1 {
    status = "okay";
    vbus-supply = <&usb_vbus>;
  };
I get:
# cat /sys/kernel/debug/regulator/regulator_summary | grep -i usb
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   USB_VBUS                      1    1      0 unknown  5000mV     0mA
 5000mV  5000mV
      c90c0000.usb               1                                 0mA
    0mV     0mV

can you please try this on your board as well?

Quoted 6 lines

Here is the summary of the above patch.
1. hot-plugins of usb device is not working.
2. only cold/warm boot let the device come up.
3. not power is supplied to the usb ports.
4. no power module is registered with the regulator summary.

with "vbus-supply" moved to the usb1 node I get the following result:
1. same: hot-plugins of usb device is not working
2. different: a reboot doesn't make devices come up
3. same: no power is supplied to the USB ports (in my case this causes #2, but it's not clear why there's no power...)
4. different: the regulator is registered with the USB controller in debugfs

Regards
Martin

[0] https://lkml.org/lkml/2019/1/18/960

Anand Moon

author

2019-02-09 17:55 UTC #16 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Martin,

Quoted 93 lines · Martin Blumenstingl

Hi Anand,
Quoted 54 lines · Anand Moon
Hi Martin,
Quoted 43 lines · Martin Blumenstingl
Hi Anand,
On Tue, Feb 5, 2019 at 8:53 PM Anand Moon <[email protected]> wrote:
[...]
Quoted 8 lines
Quoted 7 lines
my interpretationfor the Amlogic SoCs is:
- vusb_a and vusb_d are generated internally, not sure if there's an external fixed regulator
- there is no phy-supply (the PHY itself is powered by clock-gating using the CLKID_USB clock)
- usb0 VBUS is controlled by GPIOAO_5
Quoted 6 lines
But as per the device tree binding
[0] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
[1] https://elixir.bootlin.com/linux/v5.0-rc5/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
its uses phy-supply to enable power to usb phy which seem to be correct option.
phy-bindings.txt states that "phy-supply" is a "Phandle to a regulator that provides power to the PHY".
I have written the example in meson8b-usb2-phy.txt and I think it's wrong (back when I wrote it I didn't know about the "vbus-supply" property on the controller and I didn't know about the VBUS constraints).
I believe that the phy-supply property is intended for PHYs which need an external power supply (for example because they are not embedded into a SoC or if the SoC has separate voltage inputs for the PHY). I'm not aware of any PHY supply voltage on the Amlogic SoCs (I believe this is done internally within the SoC). instead they use clock gating to power down the PHY.
as far as I understand the VBUS signal it depends on the USB mode:
- host provides VBUS
- peripheral devices are powered using this voltage
- with OTG VBUS needs to be turned on or off depending on the current mode (host or peripheral)
with the "phy-supply" property there's no way to manage the regulator depending on the USB mode (host or peripheral), it will always be "on".
Quoted 2 lines
Regards
Martin
Thanks for the clarification.
But this dose not work setting the usb1_phy to use vbus-supply.
Quoted 7 lines
 &usb1_phy {
        status = "okay";
+ vbus-supply = <&usb_vbus>;
};
I am attaching a small patch for testing.
[0] usbvbus.patch
indeed, this is not working for me either.
I checked my old notes at [0] -> it works for me when setting "vbus-supply" at the usb controller (not the PHY).
with the following snippet:
  &usb1 {
    status = "okay";
    vbus-supply = <&usb_vbus>;
  };
I get:
# cat /sys/kernel/debug/regulator/regulator_summary | grep -i usb
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   USB_VBUS                      1    1      0 unknown  5000mV     0mA
 5000mV  5000mV
      c90c0000.usb               1                                 0mA
    0mV     0mV
can you please try this on your board as well?
Quoted 6 lines
Here is the summary of the above patch.
1. hot-plugins of usb device is not working.
2. only cold/warm boot let the device come up.
3. not power is supplied to the usb ports.
4. no power module is registered with the regulator summary.

Quoted 7 lines

with "vbus-supply" moved to the usb1 node I get the following result:
1. same: hot-plugins of usb device is not working
2. different: a reboot doesn't make devices come up
3. same: no power is supplied to the USB ports (in my case this causes #2, but it's not clear why there's no power...)
4. different: the regulator is registered with the USB controller in debugfs

Here the the logs after I applied the above changes

[1] https://pastebin.com/rVa8gxNG

with below message.

[   14.793044] usb 1-1.3: reset high-speed USB device number 3 using dwc2
[   18.253011] usb 1-1.3: reset high-speed USB device number 3 using dwc2
[   21.643017] usb 1-1.3: reset high-speed USB device number 3 using dwc2
[   25.033012] usb 1-1.3: reset high-speed USB device number 3 using dwc2
[   28.412995] usb 1-1.3: reset high-speed USB device number 3 using dwc2

So this is not correct solution to the problem.

Quoted 6 lines

Regards
Martin
[0] https://lkml.org/lkml/2019/1/18/960

Best Regards

-Anand

Martin Blumenstingl

reviewer

2019-02-10 22:21 UTC #17 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Anand,

On Sat, Feb 9, 2019 at 6:55 PM Anand Moon <[email protected]> wrote:
[...]

Quoted 44 lines

Quoted 37 lines
Quoted 9 lines
But this dose not work setting the usb1_phy to use vbus-supply.
 &usb1_phy {
        status = "okay";
+ vbus-supply = <&usb_vbus>;
};
I am attaching a small patch for testing.
[0] usbvbus.patch
indeed, this is not working for me either.
I checked my old notes at [0] -> it works for me when setting "vbus-supply" at the usb controller (not the PHY).
with the following snippet:
  &usb1 {
    status = "okay";
    vbus-supply = <&usb_vbus>;
  };
I get:
# cat /sys/kernel/debug/regulator/regulator_summary | grep -i usb
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   USB_VBUS                      1    1      0 unknown  5000mV     0mA
 5000mV  5000mV
      c90c0000.usb               1                                 0mA
    0mV     0mV
can you please try this on your board as well?
Quoted 6 lines
Here is the summary of the above patch.
1. hot-plugins of usb device is not working.
2. only cold/warm boot let the device come up.
3. not power is supplied to the usb ports.
4. no power module is registered with the regulator summary.
Quoted 7 lines
with "vbus-supply" moved to the usb1 node I get the following result:
1. same: hot-plugins of usb device is not working
2. different: a reboot doesn't make devices come up
3. same: no power is supplied to the USB ports (in my case this causes #2, but it's not clear why there's no power...)
4. different: the regulator is registered with the USB controller in debugfs

Quoted 3 lines

Here the the logs after I applied the above changes
[1] https://pastebin.com/rVa8gxNG

can you please provide the .dts patch for this log? I can see the following message in your log:

[    1.977367] USB_VBUS: disabling

I have tried it with the attached patch, then I get:

# dmesg | grep VBUS
#
# cat /sys/kernel/debug/regulator/regulator_summary
regulator                      use open bypass  opmode voltage current
    min     max
---------------------------------------------------------------------------------------
regulator-dummy                  4    3      0 unknown     0mV     0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   VCCK                          1    1      0 unknown   860mV     0mA
  860mV  1140mV
      cpu0                       0                                 0mA
  860mV   860mV
P5V0                             3    4      0 unknown  5000mV     0mA
 5000mV  5000mV
   VCC1V8                        2    2      0 unknown  1800mV     0mA
 1800mV  1800mV
      c1108680.adc               1                                 0mA
    0mV     0mV
      c1108e00.mmc               1                                 0mA
 1800mV  1950mV
   VCC3V3                        2    3      0 unknown  3300mV     0mA
 3300mV  3300mV
      c1108e00.mmc               1                                 0mA
 3300mV  3400mV
      VDD_RTC                    0    0      0 unknown   900mV     0mA
  900mV   900mV
      TFLASH_VDD                 1    1      0 unknown  3300mV     0mA
 3300mV  3300mV
         c1108c20.mmc:slot@1     1                                 0mA
 3300mV  3400mV
   DDR_VDDC                      0    0      0 unknown  1500mV     0mA
 1500mV  1500mV
   USB_VBUS                      1    1      0 unknown  5000mV     0mA
 5000mV  5000mV
      c90c0000.usb               1                                 0mA
    0mV     0mV
TF_IO                            0    1      0 unknown  3300mV     0mA
 1800mV  3300mV
   c1108c20.mmc:slot@1           0                                 0mA
    0mV     0mV

(my kernel build includes two more changes on top of Kevin's v5.1/dt branch which add two new regulators: it enables the RTC and the SDHC MMC controller, but these are not related to USB at all)

USB ist still not working for me, but I believe my problem is different to yours.

Regards

Martin

arch/arm/boot/dts/meson8b-odroidc1.dts +17 -0

index 0f0a46ddf3ff..44b9e6cbe2ed 100644
@@ -118,6 +118,22 @@
 			  1800000 1>;
 	};
 
+	usb_vbus: regulator-usb-vbus {
+		compatible = "regulator-fixed";
+
+		regulator-name = "USB_VBUS";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		vin-supply = <&p5v0>;
+
+		/*
+		 * signal name from schematics: PWREN
+		 */
+		gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
 	vcc_1v8: regulator-vcc-1v8 {
 		/*
 		 * RICHTEK RT9179 configured for a fixed output voltage of

@@ -299,4 +315,5 @@
 
 &usb1 {
 	status = "okay";
+	vbus-supply = <&usb_vbus>;
 };

_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Anand Moon

author

2019-02-11 15:08 UTC #18 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Martin,

Quoted 49 lines · Martin Blumenstingl

Hi Anand,
On Sat, Feb 9, 2019 at 6:55 PM Anand Moon <[email protected]> wrote:
[...]
Quoted 44 lines
Quoted 44 lines
Quoted 9 lines
But this dose not work setting the usb1_phy to use vbus-supply.
 &usb1_phy {
        status = "okay";
+ vbus-supply = <&usb_vbus>;
};
I am attaching a small patch for testing.
[0] usbvbus.patch
indeed, this is not working for me either.
I checked my old notes at [0] -> it works for me when setting "vbus-supply" at the usb controller (not the PHY).
with the following snippet:
  &usb1 {
    status = "okay";
    vbus-supply = <&usb_vbus>;
  };
I get:
# cat /sys/kernel/debug/regulator/regulator_summary | grep -i usb
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   USB_VBUS                      1    1      0 unknown  5000mV     0mA
 5000mV  5000mV
      c90c0000.usb               1                                 0mA
    0mV     0mV
can you please try this on your board as well?
Quoted 6 lines
Here is the summary of the above patch.
1. hot-plugins of usb device is not working.
2. only cold/warm boot let the device come up.
3. not power is supplied to the usb ports.
4. no power module is registered with the regulator summary.
with "vbus-supply" moved to the usb1 node I get the following result:
1. same: hot-plugins of usb device is not working
2. different: a reboot doesn't make devices come up
3. same: no power is supplied to the USB ports (in my case this causes #2, but it's not clear why there's no power...)
4. different: the regulator is registered with the USB controller in debugfs

Quoted 7 lines

Quoted 3 lines
Here the the logs after I applied the above changes
[1] https://pastebin.com/rVa8gxNG
can you please provide the .dts patch for this log? I can see the following message in your log:
[    1.977367] USB_VBUS: disabling

Sorry for the confusion on the logs.
Above logs are generated with below setting.

&usb1 {

   status = "okay";
    vbus-supply = <&usb_vbus>;

};

Quoted 50 lines

I have tried it with the attached patch, then I get:

# dmesg | grep VBUS
#
# cat /sys/kernel/debug/regulator/regulator_summary
regulator                      use open bypass  opmode voltage current
    min     max
---------------------------------------------------------------------------------------
regulator-dummy                  4    3      0 unknown     0mV     0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   c90c0000.usb                  1                                 0mA
    0mV     0mV
   VCCK                          1    1      0 unknown   860mV     0mA
  860mV  1140mV
      cpu0                       0                                 0mA
  860mV   860mV
P5V0                             3    4      0 unknown  5000mV     0mA
 5000mV  5000mV
   VCC1V8                        2    2      0 unknown  1800mV     0mA
 1800mV  1800mV
      c1108680.adc               1                                 0mA
    0mV     0mV
      c1108e00.mmc               1                                 0mA
 1800mV  1950mV
   VCC3V3                        2    3      0 unknown  3300mV     0mA
 3300mV  3300mV
      c1108e00.mmc               1                                 0mA
 3300mV  3400mV
      VDD_RTC                    0    0      0 unknown   900mV     0mA
  900mV   900mV
      TFLASH_VDD                 1    1      0 unknown  3300mV     0mA
 3300mV  3300mV
         c1108c20.mmc:slot@1     1                                 0mA
 3300mV  3400mV
   DDR_VDDC                      0    0      0 unknown  1500mV     0mA
 1500mV  1500mV
   USB_VBUS                      1    1      0 unknown  5000mV     0mA
 5000mV  5000mV
      c90c0000.usb               1                                 0mA
    0mV     0mV
TF_IO                            0    1      0 unknown  3300mV     0mA
 1800mV  3300mV
   c1108c20.mmc:slot@1           0                                 0mA
    0mV     0mV

(my kernel build includes two more changes on top of Kevin's v5.1/dt branch which add two new regulators: it enables the RTC and the SDHC MMC controller, but these are not related to USB at all)

Quoted 7 lines

USB ist still not working for me, but I believe my problem is different to yours.
Regards
Martin

Can we have other people who can test both the approach for *vbus-supply* vs *phy-supply* setting.
Then we can conclude on the correct approach.

Honestly I am using power supply from dc jack rather than power via usb otg.

Best Regards
-Anand

Martin Blumenstingl

reviewer

2019-02-17 14:26 UTC #19 lore raw

Re: [RFCv1 2/3] ARM: dts: meson8b: odroidc1: fix USB power supplies for phy

Hi Anand,

On Mon, Feb 11, 2019 at 4:09 PM Anand Moon <[email protected]> wrote:
[...]

Quoted 3 lines

Can we have other people who can test both the approach for *vbus-supply* vs *phy-supply* setting.
Then we can conclude on the correct approach.

this is a good idea. do we focus on the 4x USB host ports for this test or also on the OTG port?

my test-setup so far was:
- Odroid-C1+ board revision 0.4 20150615
- the board is powered using the micro USB port
- connect an USB thumb drive to one of the USB host ports

test-cases:
- an "unpatched" (in terms of USB power regulators) kernel
- using Anand's phy-supply = <&usb_vbus>; inside the usb1_phy node
- using vbus-supply = <&usb_vbus>; inside the usb1 node

in all thee scenarios the LED of my thumb drive did not light up and there was nothing in the kernel log. also lsusb -vv didn't show anything.

Anand, do you have any other test-case in mind that we need to check?

I CC'ed Emiliano because he initially added USB support to meson8b-odroidc1.dts (that was before I got my own Odroid-C1+). He can probably help us test on his board(s) as well.

Quoted 1 line

Honestly I am using power supply from dc jack rather than power via usb otg.

I don't have a plug which matches the little DC jack so I'm powering my board using the micro USB connector.

Regards
Martin

Anand Moon

author

2019-01-23 15:12 UTC #20 lore raw

RFC 3/3 ARM: dts: meson8b: odroidc1: enable the OTG capable USB controller

In reply to Anand Moon

Override the dr_mode from "host" to "otg" for USB_HOST controller (usb0) changes help usb_phy0->usb0 initialization of OTG bus port.

Changes fix the below warning.

[    1.810267] phy phy-c1108800.phy.0: USB ID detect failed!
[    1.814333] phy phy-c1108800.phy.0: phy poweron failed --> -22
[    1.820178] ------------[ cut here ]------------
[    1.824758] WARNING: CPU: 0 PID: 29 at drivers/regulator/core.c:2054 _regulator_put.part.8+0xf8/0xfc
[    1.833884] Modules linked in:
[    1.836907] CPU: 0 PID: 29 Comm: kworker/0:1 Not tainted 5.0.0-rc3-xc1ml #1
[    1.843849] Hardware name: Amlogic Meson platform
[    1.848552] Workqueue: events deferred_probe_work_func
[    1.853683] [<c031222c>] (unwind_backtrace) from [<c030cb74>] (show_stack+0x10/0x14)
[    1.861404] [<c030cb74>] (show_stack) from [<c0e29c78>] (dump_stack+0x8c/0xa0)
[    1.868610] [<c0e29c78>] (dump_stack) from [<c03460c4>] (__warn.part.3+0xbc/0xd8)
[    1.876074] [<c03460c4>] (__warn.part.3) from [<c0346240>] (warn_slowpath_null+0x44/0x4c)
[    1.884236] [<c0346240>] (warn_slowpath_null) from [<c07e20c4>] (_regulator_put.part.8+0xf8/0xfc)
[    1.893093] [<c07e20c4>] (_regulator_put.part.8) from [<c07e20f0>] (regulator_put+0x28/0x38)
[    1.901516] [<c07e20f0>] (regulator_put) from [<c07e2128>] (regulator_bulk_free+0x28/0x38)
[    1.909770] [<c07e2128>] (regulator_bulk_free) from [<c0947f38>] (release_nodes+0x1bc/0x200)
[    1.918191] [<c0947f38>] (release_nodes) from [<c0943f0c>] (really_probe+0x110/0x2cc)
[    1.926005] [<c0943f0c>] (really_probe) from [<c094422c>] (driver_probe_device+0x60/0x16c)
[    1.934256] [<c094422c>] (driver_probe_device) from [<c09423b4>] (bus_for_each_drv+0x80/0xc4)
[    1.942766] [<c09423b4>] (bus_for_each_drv) from [<c0943d8c>] (__device_attach+0xd0/0x138)
[    1.951015] [<c0943d8c>] (__device_attach) from [<c09431c4>] (bus_probe_device+0x84/0x8c)
[    1.959180] [<c09431c4>] (bus_probe_device) from [<c0943660>] (deferred_probe_work_func+0x60/0x8c)
[    1.968127] [<c0943660>] (deferred_probe_work_func) from [<c035fd30>] (process_one_work+0x218/0x504)
[    1.977243] [<c035fd30>] (process_one_work) from [<c0360e20>] (worker_thread+0x2a8/0x5bc)
[    1.985404] [<c0360e20>] (worker_thread) from [<c0365990>] (kthread+0x14c/0x154)
[    1.992785] [<c0365990>] (kthread) from [<c03010e8>] (ret_from_fork+0x14/0x2c)
[    1.999987] Exception stack(0xee0dbfb0 to 0xee0dbff8)
[    2.005027] bfa0:                                     00000000 00000000 00000000 00000000
[    2.013191] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    2.021353] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    2.027984] ---[ end trace 81270e5c573fd4b5 ]---
[    2.032661] ------------[ cut here ]------------
[    2.037162] WARNING: CPU: 0 PID: 29 at drivers/regulator/core.c:2054 _regulator_put.part.8+0xf8/0xfc
[    2.046296] Modules linked in:
[    2.049331] CPU: 0 PID: 29 Comm: kworker/0:1 Tainted: G        W         5.0.0-rc3-xc1ml #1
[    2.057647] Hardware name: Amlogic Meson platform
[    2.062344] Workqueue: events deferred_probe_work_func
[    2.067471] [<c031222c>] (unwind_backtrace) from [<c030cb74>] (show_stack+0x10/0x14)
[    2.075197] [<c030cb74>] (show_stack) from [<c0e29c78>] (dump_stack+0x8c/0xa0)
[    2.082405] [<c0e29c78>] (dump_stack) from [<c03460c4>] (__warn.part.3+0xbc/0xd8)
[    2.089871] [<c03460c4>] (__warn.part.3) from [<c0346240>] (warn_slowpath_null+0x44/0x4c)
[    2.098034] [<c0346240>] (warn_slowpath_null) from [<c07e20c4>] (_regulator_put.part.8+0xf8/0xfc)
[    2.106891] [<c07e20c4>] (_regulator_put.part.8) from [<c07e20f0>] (regulator_put+0x28/0x38)
[    2.115314] [<c07e20f0>] (regulator_put) from [<c07e2128>] (regulator_bulk_free+0x28/0x38)
[    2.123566] [<c07e2128>] (regulator_bulk_free) from [<c0947f38>] (release_nodes+0x1bc/0x200)
[    2.131988] [<c0947f38>] (release_nodes) from [<c0943f0c>] (really_probe+0x110/0x2cc)
[    2.139802] [<c0943f0c>] (really_probe) from [<c094422c>] (driver_probe_device+0x60/0x16c)
[    2.148054] [<c094422c>] (driver_probe_device) from [<c09423b4>] (bus_for_each_drv+0x80/0xc4)
[    2.156564] [<c09423b4>] (bus_for_each_drv) from [<c0943d8c>] (__device_attach+0xd0/0x138)
[    2.164813] [<c0943d8c>] (__device_attach) from [<c09431c4>] (bus_probe_device+0x84/0x8c)
[    2.172978] [<c09431c4>] (bus_probe_device) from [<c0943660>] (deferred_probe_work_func+0x60/0x8c)
[    2.181923] [<c0943660>] (deferred_probe_work_func) from [<c035fd30>] (process_one_work+0x218/0x504)
[    2.191040] [<c035fd30>] (process_one_work) from [<c0360e20>] (worker_thread+0x2a8/0x5bc)
[    2.199201] [<c0360e20>] (worker_thread) from [<c0365990>] (kthread+0x14c/0x154)
[    2.206582] [<c0365990>] (kthread) from [<c03010e8>] (ret_from_fork+0x14/0x2c)
[    2.213785] Exception stack(0xee0dbfb0 to 0xee0dbff8)
[    2.218824] bfa0:                                     00000000 00000000 00000000 00000000
[    2.226989] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    2.235151] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    2.241774] ---[ end trace 81270e5c573fd4b6 ]---
[    2.246415] dwc2: probe of c9040000.usb failed with error -22

Cc Martin Blumenstingl <[email protected]>

Cc Jerome Brunet <[email protected]>

Cc Neil Armstrong <[email protected]>

Cc Kevin Hilman <[email protected]>

Signed-off-by Anand Moon <[email protected]>

---
Changes from previous patch.

Fix the subject and commit message as per Martin's request --Fix the commit message.
--TODO: allthough the bus port is initialization,
but their is not usb device detected on the otg port.

---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 1 +
 1 file changed, 1 insertion(+)

arch/arm/boot/dts/meson8b-odroidc1.dts +1 -0

index bfa472a679d9..a41912039522 100644
@@ -323,6 +323,7 @@
 
 &usb0 {
 	status = "okay";
+	dr_mode = "otg";
 };
 
 &usb1 {

Signature · 1 line

2.20.1

Martin Blumenstingl

reviewer

2019-02-04 13:51 UTC #21 lore raw

In reply to Anand Moon

Hi Anand,

Quoted 26 lines · Anand Moon

This is follow up on my previous patches.

[0] https://lore.kernel.org/patchwork/patch/1031616/
[1] https://lore.kernel.org/patchwork/patch/1031617/

As per Martin's suggestion and input I have tried to fix below issue.

Fixed the phy power issue on the usb port.

# cat /sys/kernel/debug/regulator/regulator_summary
    USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
       phy-c1108820.phy.1         2                                 0mA     0mV     0mV
       phy-c1108800.phy.0         2                                 0mA     0mV     0mV

Fixed the OTG phy warning and initilizaion of usb0_phy

# lsusb -t
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 5, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 2: Dev 3, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 4, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 4, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 4, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 4, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M

Quoted 1 line

Now hotpluing of usb device is working on odroid c1+ boards.

unfortunately it's still not working for me :(

all following descriptions are seen when looking at the PCB with the 40-pin connector on the bottom, USB ports on the left, micro USB connector on the top right.

my test-case is:
- power-cycle the board
- enter u-boot command prompt
- gset GPIOAO_5 out high (or replace high with low)
- measure

I checked the voltage at RT9715EGB (U19) with a volt meter:
GPIOAO_5 HIGH:
- EN pin (bottom, left): 3.3V
- VOUT pin (top right): 5V
GPIOAO_5 LOW:
- EN pin (bottom, left). 0V
- VOUT pin (top right): 5V (not sure why...)

I also checked the voltage at Q5 2N7002W with a volt meter:
- gate (bottom, right): 0V
- source (top, right): 3.3V
- drain (left): 0V
this is always the same, regardless of whether GPIOAO_5 is HIGH or LOW. however, with Armbian booted (which uses some Amlogic 3.10 kernel where USB works) I get:
- gate (bottom, right): 0V
- source (top, right): 0V
- drain (left): 3.3V

what do you get on your board?

Regards
Martin

Anand Moon

author

2019-02-04 20:04 UTC #22 lore raw

Hi Martin,

Quoted 62 lines · Martin Blumenstingl

Hi Anand,
Quoted 26 lines · Anand Moon
This is follow up on my previous patches.
[0] https://lore.kernel.org/patchwork/patch/1031616/
[1] https://lore.kernel.org/patchwork/patch/1031617/
As per Martin's suggestion and input I have tried to fix below issue.
Fixed the phy power issue on the usb port.
# cat /sys/kernel/debug/regulator/regulator_summary
    USB_VBUS                      4    2      0 unknown  5000mV     0mA  5000mV  5000mV
       phy-c1108820.phy.1         2                                 0mA     0mV     0mV
       phy-c1108800.phy.0         2                                 0mA     0mV     0mV
Fixed the OTG phy warning and initilizaion of usb0_phy
# lsusb -t
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 1: Dev 5, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 2: Dev 3, If 0, Class=Mass Storage, Driver=usb-storage, 480M
        |__ Port 3: Dev 4, If 1, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 4, If 2, Class=Audio, Driver=snd-usb-audio, 480M
        |__ Port 3: Dev 4, If 0, Class=Video, Driver=uvcvideo, 480M
        |__ Port 3: Dev 4, If 3, Class=Audio, Driver=snd-usb-audio, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=dwc2/1p, 480M
Quoted 1 line
Now hotpluing of usb device is working on odroid c1+ boards.
unfortunately it's still not working for me :(
all following descriptions are seen when looking at the PCB with the 40-pin connector on the bottom, USB ports on the left, micro USB connector on the top right.
my test-case is:
- power-cycle the board
- enter u-boot command prompt
- gset GPIOAO_5 out high (or replace high with low)
- measure
I checked the voltage at RT9715EGB (U19) with a volt meter:
GPIOAO_5 HIGH:
- EN pin (bottom, left): 3.3V
- VOUT pin (top right): 5V
GPIOAO_5 LOW:
- EN pin (bottom, left). 0V
- VOUT pin (top right): 5V (not sure why...)
I also checked the voltage at Q5 2N7002W with a volt meter:
- gate (bottom, right): 0V
- source (top, right): 3.3V
- drain (left): 0V
this is always the same, regardless of whether GPIOAO_5 is HIGH or LOW. however, with Armbian booted (which uses some Amlogic 3.10 kernel where USB works) I get:
- gate (bottom, right): 0V
- source (top, right): 0V
- drain (left): 3.3V

Quoted 2 lines

what do you get on your board?

I dont have multi-meter to check this out on old and new kernel. As per my observation Amlogic 3.10 (32 bit) and 3.14 (64 bit) both use some state machine the tune the usb port.

It's not clear that this will work with upstream kernel.

I just checked with board booted with usb device connected we are observing the bus and is getting power up and hot plugging of usb device is working fine.

$ lsusb -v|egrep "^Bus|MaxPower"
Couldn't open device, some information will be missing
Bus 002 Device 003: ID 1b71:0056 Fushicai
    MaxPower              500mA
Couldn't open device, some information will be missing
Bus 002 Device 004: ID 152d:0578 JMicron Technology Corp. / JMicron
USA Technology Corp. JMS567 SATA 6Gb/s bridge
    MaxPower               30mA
Couldn't open device, some information will be missing
Couldn't open device, some information will be missing
Bus 002 Device 002: ID 05e3:0610 Genesys Logic, Inc. 4-port hub
    MaxPower              100mA
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Couldn't open device, some information will be missing
    MaxPower                0mA
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    MaxPower                0mA

Quoted 3 lines

Regards
Martin

Best Regards

-Anand

Martin Blumenstingl

reviewer

2019-02-04 20:38 UTC #23 lore raw

Hi Anand,

On Mon, Feb 4, 2019 at 9:04 PM Anand Moon <[email protected]> wrote:
[...]

Quoted 5 lines

I dont have multi-meter to check this out on old and new kernel. As per my observation Amlogic 3.10 (32 bit) and 3.14 (64 bit) both use some state machine the tune the usb port.
It's not clear that this will work with upstream kernel.

do you have a filename / line number in Amlogic's kernel regarding this state machine and / or tuning logic?

Quoted 12 lines

I just checked with board booted with usb device connected we are observing the bus and is getting power up and hot plugging of usb device is working fine.

$ lsusb -v|egrep "^Bus|MaxPower"
Couldn't open device, some information will be missing
Bus 002 Device 003: ID 1b71:0056 Fushicai
    MaxPower              500mA
Couldn't open device, some information will be missing
Bus 002 Device 004: ID 152d:0578 JMicron Technology Corp. / JMicron
USA Technology Corp. JMS567 SATA 6Gb/s bridge
    MaxPower               30mA
Couldn't open device, some information will be missing

Quoted 8 lines

Couldn't open device, some information will be missing
Bus 002 Device 002: ID 05e3:0610 Genesys Logic, Inc. 4-port hub
    MaxPower              100mA
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Couldn't open device, some information will be missing
    MaxPower                0mA
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    MaxPower                0mA

for me it stops at the Genesys Logic, Inc. 4-port hub (I see the root hub, the 4-port hub and then nothing more) using the mainline kernel (with or without your patches)

I'm not sure what to do with this information though. currently we have no reliable way to tell if GPIOAO_5 is only for the OTG port (usb0) or also for the host-only port (usb1).

Regards
Martin

Anand Moon

author

2019-02-05 19:53 UTC #24 lore raw

Hi Martin,

Quoted 33 lines · Martin Blumenstingl

Hi Anand,
On Mon, Feb 4, 2019 at 9:04 PM Anand Moon <[email protected]> wrote:
[...]
Quoted 5 lines
I dont have multi-meter to check this out on old and new kernel. As per my observation Amlogic 3.10 (32 bit) and 3.14 (64 bit) both use some state machine the tune the usb port.
It's not clear that this will work with upstream kernel.
do you have a filename / line number in Amlogic's kernel regarding this state machine and / or tuning logic?
Quoted 12 lines
I just checked with board booted with usb device connected we are observing the bus and is getting power up and hot plugging of usb device is working fine.
$ lsusb -v|egrep "^Bus|MaxPower"
Couldn't open device, some information will be missing
Bus 002 Device 003: ID 1b71:0056 Fushicai
    MaxPower              500mA
Couldn't open device, some information will be missing
Bus 002 Device 004: ID 152d:0578 JMicron Technology Corp. / JMicron
USA Technology Corp. JMS567 SATA 6Gb/s bridge
    MaxPower               30mA
Couldn't open device, some information will be missing
Quoted 8 lines
Couldn't open device, some information will be missing
Bus 002 Device 002: ID 05e3:0610 Genesys Logic, Inc. 4-port hub
    MaxPower              100mA
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Couldn't open device, some information will be missing
    MaxPower                0mA
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    MaxPower                0mA

Quoted 8 lines

for me it stops at the Genesys Logic, Inc. 4-port hub (I see the root hub, the 4-port hub and then nothing more) using the mainline kernel (with or without your patches)
I'm not sure what to do with this information though. currently we have no reliable way to tell if GPIOAO_5 is only for the OTG port (usb0) or also for the host-only port (usb1).

In order to enable usb debug verbose output we need to compile the kernel with following option.

CONFIG_DYNAMIC_DEBUG=y
CONFIG_USB_DWC2_DEBUG=y
CONFIG_USB_DWC2_VERBOSE=y

to get more in sight into usb initialization and low level hand shake.
-----------------------------

[    1.796436] dwc2 c90c0000.usb: mapped PA c90c0000 to VA (ptrval)
[    1.796481] dwc2 c90c0000.usb: c90c0000.usb supply vusb_d not
found, using dummy regulator
[    1.799183] dwc2 c90c0000.usb: Linked as a consumer to regulator.0
[    1.805320] dwc2 c90c0000.usb: c90c0000.usb supply vusb_a not
found, using dummy regulator
[    1.813600] dwc2 c90c0000.usb: registering common handler for irq26
[    1.814794] dwc2 c90c0000.usb: Core Release: 3.10a (snpsid=4f54310a)
[    1.814803] dwc2 c90c0000.usb: Forcing mode to host
[    1.883383] dwc2 c90c0000.usb: dwc2_check_params: Invalid parameter lpm=1
[    1.884534] dwc2 c90c0000.usb: dwc2_check_params: Invalid parameter
lpm_clock_gating=1
[    1.892435] dwc2 c90c0000.usb: dwc2_check_params: Invalid parameter besl=1
[    1.899318] dwc2 c90c0000.usb: dwc2_check_params: Invalid parameter
hird_threshold_en=1
[    1.907300] dwc2 c90c0000.usb: DWC OTG HCD INIT
[    1.907306] dwc2 c90c0000.usb: hcfg=00000200
[    1.907319] dwc2 c90c0000.usb: dwc2_core_init((ptrval))
[    1.907324] dwc2 c90c0000.usb: HS UTMI+ PHY selected
[    1.907330] dwc2 c90c0000.usb: Internal DMA Mode
[    1.907337] dwc2 c90c0000.usb: Host Mode
[    1.907599] dwc2 c90c0000.usb: DWC OTG Controller
[    1.911994] dwc2 c90c0000.usb: new USB bus registered, assigned bus number 1
[    1.919060] dwc2 c90c0000.usb: irq 26, io mem 0xc90c0000
[    1.924323] dwc2 c90c0000.usb: DWC OTG HCD START
[    1.924335] dwc2 c90c0000.usb: dwc2_core_host_init((ptrval))
[    1.924342] dwc2 c90c0000.usb: Initializing HCFG.FSLSPClkSel to 00000000
[    1.924349] dwc2 c90c0000.usb: initial grxfsiz=00000800
[    1.924354] dwc2 c90c0000.usb: new grxfsiz=00000200
[    1.924360] dwc2 c90c0000.usb: initial gnptxfsiz=08000800
[    1.924365] dwc2 c90c0000.usb: new gnptxfsiz=01f40200
[    1.924370] dwc2 c90c0000.usb: initial hptxfsiz=08000000
[    1.924375] dwc2 c90c0000.usb: new hptxfsiz=01f403f4
[    1.924389] dwc2 c90c0000.usb: dwc2_core_host_init: Halt channel 0
[    1.924396] dwc2 c90c0000.usb: dwc2_core_host_init: Halt channel 1
[    1.924401] dwc2 c90c0000.usb: dwc2_core_host_init: Halt channel 2
[    1.924406] dwc2 c90c0000.usb: dwc2_core_host_init: Halt channel 3
[    1.924412] dwc2 c90c0000.usb: dwc2_core_host_init: Halt channel 4
[    1.924417] dwc2 c90c0000.usb: dwc2_core_host_init: Halt channel 5

Best Regards

-Anand