arm64: tegra: Add xudc node for Tegra210
PATCH 4/8 arm64: tegra: Add xudc node for Tegra210
Quoted 13 lines · Nagarjuna Kristam
Tegra210 has one XUSB device mode controller, which can be operated HS and SS modes. Add DT support for XUSB device mode controller.
Signed-off-by Nagarjuna Kristam <[email protected]>--- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)arch/arm64/boot/dts/nvidia/tegra210.dtsi +0
-0
arch/arm64/boot/dts/nvidia/tegra210.dtsi line 893
Quoted 9 lines
arch/arm64/boot/dts/nvidia/tegra210.dtsi +6
-0@@ -885,6 +885,23 @@ status = "disabled"; }; + xudc@700d0000 { + compatible = "nvidia,tegra210-xudc"; + reg = <0x0 0x700d0000 0x0 0x8000>, + <0x0 0x700d8000 0x0 0x1000>, + <0x0 0x700d9000 0x0 0x1000>; + interrupts = <0 44 0x4>;
GIC_SPI for the first cell, IRQ_TYPE_LEVEL_HIGH for the third cell.
arch/arm64/boot/dts/nvidia/tegra210.dtsi line 900
Quoted 7 lines
arch/arm64/boot/dts/nvidia/tegra210.dtsi +7
-0+ power-domains = <&pd_xusbdev>, <&pd_xusbss>; + power-domain-names = "xusb_device", "xusb_ss"; + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>;
I think it's slightly more idiomatic to have clocks before the power domains. Also this should have a clock-names property that names the clocks.
Other than that, this looks good to me.
Thierry
Quoted 10 lines
arch/arm64/boot/dts/nvidia/tegra210.dtsi +4
-0+ nvidia,xusb-padctl = <&padctl>; + status = "disabled"; + }; + padctl: padctl@7009f000 { compatible = "nvidia,tegra210-xusb-padctl"; reg = <0x0 0x7009f000 0x0 0x1000>;Signature · 1 line
2.7.4