x86: Change ALTERNATE_APIC_BASE to saner value
PATCH 1/1 x86: Change ALTERNATE_APIC_BASE to saner value
From: Nadav Amit <[email protected]>
According to the SDM, during initialization, the BSP "Switches to protected mode and ensures that the APIC address space is mapped to the strong uncacheable (UC) memory type." This requirement is not followed when the tests that relocate the APIC.
Use the TPM base address for the alternate local-APIC base, as it is expected to be set as uncacheable by the BIOS.
--- x86/apic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
x86/apic.c +1 -1
@@ -159,7 +159,7 @@ static void test_apic_disable(void)report_prefix_pop (); } -#define ALTERNATE_APIC_BASE 0x42000000 +#define ALTERNATE_APIC_BASE 0xfed40000static void test_apicbase (void ) {
Signature · 1 line
2.17.1
Quoted 23 lines · On 30/04/19 16:09, [email protected] wrote:
From: Nadav Amit <[email protected]>
According to the SDM, during initialization, the BSP "Switches to protected mode and ensures that the APIC address space is mapped to the strong uncacheable (UC) memory type." This requirement is not followed when the tests that relocate the APIC.
Use the TPM base address for the alternate local-APIC base, as it is expected to be set as uncacheable by the BIOS.
Cc Sean Christopherson <[email protected]>Suggested-by Sean Christopherson <[email protected]>Signed-off-by Nadav Amit <[email protected]>--- x86/apic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)x86/apic.c +0
-0
x86/apic.c static void test_apic_disable(void) · line 165
Quoted 8 lines
x86/apic.c +1
-1@@ -159,7 +159,7 @@ static void test_apic_disable(void)report_prefix_pop (); } -#define ALTERNATE_APIC_BASE 0x42000000 +#define ALTERNATE_APIC_BASE 0xfed40000static void test_apicbase (void ) {
Queued, thanks.
Paolo