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parisc: Enable __ro_after_init feature

PATCH New Helge Deller 1 participant 1 message May 10, 2019 PA-RISC architecture

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Helge Deller

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PATCH 1/1 parisc: Enable __ro_after_init feature

This patch modifies the initial page mapping functions in the following way:

During bootup the init, text and data pages will be mapped RWX and if supported, with huge pages.

At final stage of the bootup, the kernel calls free_initmem() and then all pages will be remapped either R-X (for text and read-only data) or RW- (for data). The __init pages will be dropped.

This reflects the behaviour of the x86 platform.

arch/parisc/include/asm/cache.h +0 -3
index 4016fe1c65a9..73ca89a47f49 100644
@@ -24,9 +24,6 @@
 
 #define __read_mostly __attribute__((__section__(".data..read_mostly")))
 
-/* Read-only memory is marked before mark_rodata_ro() is called. */
-#define __ro_after_init	__read_mostly
-
 void parisc_cache_init(void);	/* initializes cache-flushing */
 void disable_sr_hashing_asm(int); /* low level support for above */
 void disable_sr_hashing(void);   /* turns off space register hashing */
arch/parisc/kernel/vmlinux.lds.S +0 -3
index a8be7a47fcc0..c3b1b9c24ede 100644
@@ -18,9 +18,6 @@
 				*(.data..vm0.pgd) \
 				*(.data..vm0.pte)
 
-/* No __ro_after_init data in the .rodata section - which will always be ro */
-#define RO_AFTER_INIT_DATA
-
 #include <asm-generic/vmlinux.lds.h>
 
 /* needed for the processor specific cache alignment size */
arch/parisc/mm/init.c +35 -32

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