drivers: thermal: tsens: Merge tsens-8974 into tsens-v0_1
Hello Amit Kucheria,
The patch c80cbb79e851: "drivers: thermal: tsens: Merge tsens-8974 into tsens-v0_1" from Mar 20, 2019, leads to the following static checker warning:
drivers/thermal/qcom/tsens-v0_1.c:237 calibrate_8974() warn: mask and shift to zero
drivers/thermal/qcom/tsens-v0_1.c
226 case ONE_PT_CALIB:
227 case ONE_PT_CALIB2:
228 base1 = bkp[0] & BASE1_MASK;
229 p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT;
230 p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT;
231 p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT;
232 p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT;
233 p1[4] = (bkp[1] & S4_P1_MASK);
234 p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT;
235 p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT;
236 p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT;
237 p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT;
^^^^^^^^^^^^^^ ^^^^^^^^^^^#define S8_P1_MASK_BKP 0x3f
#define S8_P1_SHIFT 24
Other places define S8_P1_SHIFT as 4, so that's maybe something to consider.
238 p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT; 239 p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT; 240 break;
241 }
242 } else {
243 mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
244 mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
regards,
dan carpenter
Did we ever look into this?
regards,
dan carpenter
Quoted 39 lines · Dan Carpenter
Hello Amit Kucheria,
The patch
c80cbb79e851: "drivers: thermal: tsens: Merge tsens-8974 into tsens-v0_1" from Mar 20, 2019, leads to the following static checker warning:drivers/thermal/qcom/tsens-v0_1.c:237 calibrate_8974() warn: mask and shift to zero
drivers/thermal/qcom/tsens-v0_1.c
226 caseONE_PT_CALIB:227 case ONE_PT_CALIB2: 228 base1 = bkp[0] & BASE1_MASK; 229 p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT; 230 p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT; 231 p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT; 232 p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT; 233 p1[4] = (bkp[1] & S4_P1_MASK); 234 p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT; 235 p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT; 236 p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT; 237 p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT; ^^^^^^^^^^^^^^ ^^^^^^^^^^^#define
S8_P1_MASK_BKP0x3f
#defineS8_P1_SHIFT24Other places define
S8_P1_SHIFTas 4, so that's maybe something to consider.238 p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT; 239 p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT; 240 break; 241 } 242 } else { 243 mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; 244 mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;regards,
dan carpenter
Quoted 1 line · Dan Carpenter
Did we ever look into this?
Thara,
is it possible to have a look at this bug report?
Thanks
-- Daniel
Quoted 43 lines
regards,
dan carpenterQuoted 39 lines · Dan Carpenter
Hello Amit Kucheria,
The patch
c80cbb79e851: "drivers: thermal: tsens: Merge tsens-8974 into tsens-v0_1" from Mar 20, 2019, leads to the following static checker warning:drivers/thermal/qcom/tsens-v0_1.c:237 calibrate_8974() warn: mask and shift to zero
drivers/thermal/qcom/tsens-v0_1.c
226 caseONE_PT_CALIB:227 case ONE_PT_CALIB2: 228 base1 = bkp[0] & BASE1_MASK; 229 p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT; 230 p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT; 231 p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT; 232 p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT; 233 p1[4] = (bkp[1] & S4_P1_MASK); 234 p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT; 235 p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT; 236 p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT; 237 p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT; ^^^^^^^^^^^^^^ ^^^^^^^^^^^#define
S8_P1_MASK_BKP0x3f
#defineS8_P1_SHIFT24Other places define
S8_P1_SHIFTas 4, so that's maybe something to consider.238 p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT; 239 p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT; 240 break; 241 } 242 } else { 243 mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; 244 mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;regards,
dan carpenter
Signature · 5 lines
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
Quoted 6 lines · Daniel Lezcano
Quoted 1 line · Dan Carpenter
Did we ever look into this?
Thara,
is it possible to have a look at this bug report?
Sure! In a few weeks..
Quoted 50 lines
Thanks
-- Daniel
Quoted 43 lines
regards,
dan carpenterQuoted 39 lines · Dan Carpenter
Hello Amit Kucheria,
The patch
c80cbb79e851: "drivers: thermal: tsens: Merge tsens-8974 into tsens-v0_1" from Mar 20, 2019, leads to the following static checker warning:drivers/thermal/qcom/tsens-v0_1.c:237 calibrate_8974() warn: mask and shift to zero
drivers/thermal/qcom/tsens-v0_1.c226 case ONE_PT_CALIB: 227 case ONE_PT_CALIB2: 228 base1 = bkp[0] & BASE1_MASK; 229 p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT; 230 p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT; 231 p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT; 232 p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT; 233 p1[4] = (bkp[1] & S4_P1_MASK); 234 p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT; 235 p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT; 236 p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT; 237 p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT; ^^^^^^^^^^^^^^ ^^^^^^^^^^^#define
S8_P1_MASK_BKP0x3f
#defineS8_P1_SHIFT24Other places define
S8_P1_SHIFTas 4, so that's maybe something to consider.238 p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT; 239 p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT; 240 break; 241 } 242 } else { 243 mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT; 244 mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;regards,
dan carpenter
Signature · 2 lines
Warm Regards Thara