rk3399: Add redundant boot support

PATCH Superseded Jagan Teki 8 participants 34 messages Jul 29, 2019 – Aug 26, 2019 8 messages not in the archive

Subsystems (6)

Arm (32-bit) Arm sub-architectures Common clk Framebuffer layer +2 more subsystems

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Jagan Teki

author

2019-07-29 07:46 UTC #0 lore raw

cover rk3399: Add redundant boot support

Boot redundancy is one of the key criteria for switch recovery or golden partition based on the bootcount value, which indeed very much needed in production systems on the fields.

This patchset support redundant boot on Rockchip rk3399.

To make full functional redundancy below features would require from U-Boot level.
- bootcount, for counting number reboots
- altboot
- watchdog support, if SPL or U-Boot reset because of WDT
- add CPUINFO for more understanding about how SoC and reset reason.

patch 0001 - 0005: cpu info, reset reason

patch 0006 - 0009: designware watchdog driver, dm-conversion

patch 0010: Add watchdog property available to SPL

patch 0011: Add Kconfig option for dw_wdt.c

patch 0012: Disable watchdog for TPL

patch 0013: enable watchdog on rockpro64, overlay

patch 0014: bootcount support

patch 0015: enable bootcount on rockpro64, overlay

I would like, not to merge watchdog and bootcount on Mainline devboards since these features will mostly required on production devices but any comments, please share.

Any inputs?
Jagan.

Jagan Teki (15):
arm: rockchip: Add common cru.h
rockchip: Add cpu-info
rockchip: rk3288: Print reset reason
rockchip: Add common reset reason
rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO
wdt: designware: Simplify is_enabled function
wdt: designware: Simplify enable function
wdt: dw: Add driver-model support
wdt: dw: Rename to dw_wdt.c
rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog
wdt: Kconfig: Add WDT_DW entry
include: rk3399: Disable watchdog in TPL
[DO NOT MERGE] rk3399: rockpro64: Enable watchdog
rockchip: rk3399: Add bootcount support
[DO NOT MERGE] rk3399: rockpro64: Enable bootcount

 arch/arm/dts/rk3399-u-boot.dtsi               |   6 +
 arch/arm/include/asm/arch-rockchip/cru.h      |  28 +++
 .../include/asm/arch-rockchip/cru_rk3288.h    |  14 +-
 arch/arm/mach-rockchip/Kconfig                |   2 +
 arch/arm/mach-rockchip/Makefile               |   1 +
 arch/arm/mach-rockchip/cpu-info.c             |  65 +++++++
 arch/arm/mach-rockchip/rk3288-board.c         |  39 ----
 arch/arm/mach-rockchip/rk3288/clk_rk3288.c    |   2 +-
 arch/arm/mach-rockchip/rk3399-board-spl.c     |   2 +-
 arch/arm/mach-rockchip/rk3399/Kconfig         |  10 +
 arch/arm/mach-rockchip/rk3399/clk_rk3399.c    |   2 +-
 common/board_f.c                              |   2 +-
 configs/evb-rk3288_defconfig                  |   1 -
 configs/evb-rk3399_defconfig                  |   1 -
 configs/fennec-rk3288_defconfig               |   1 -
 configs/ficus-rk3399_defconfig                |   1 -
 configs/firefly-rk3288_defconfig              |   1 -
 configs/firefly-rk3399_defconfig              |   1 -
 configs/miqi-rk3288_defconfig                 |   1 -
 configs/nanopc-t4-rk3399_defconfig            |   1 -
 configs/nanopi-m4-rk3399_defconfig            |   1 -
 configs/nanopi-neo4-rk3399_defconfig          |   1 -
 configs/orangepi-rk3399_defconfig             |   1 -
 configs/phycore-rk3288_defconfig              |   1 -
 configs/popmetal-rk3288_defconfig             |   1 -
 configs/puma-rk3399_defconfig                 |   1 -
 configs/rock-pi-4-rk3399_defconfig            |   1 -
 configs/rock960-rk3399_defconfig              |   1 -
 configs/rockpro64-rk3399_defconfig            |   4 +-
 configs/tinker-rk3288_defconfig               |   1 -
 configs/vyasa-rk3288_defconfig                |   1 -
 drivers/clk/rockchip/clk_rk3288.c             |   2 +-
 drivers/clk/rockchip/clk_rk3399.c             |   2 +-
 drivers/ram/rockchip/sdram_rk3288.c           |   2 +-
 drivers/ram/rockchip/sdram_rk3399.c           |   2 +-
 drivers/video/rockchip/rk3288_mipi.c          |   2 +-
 drivers/video/rockchip/rk3399_mipi.c          |   2 +-
 drivers/video/rockchip/rk_mipi.c              |   2 +-
 drivers/watchdog/Kconfig                      |   9 +
 drivers/watchdog/Makefile                     |   2 +-
 drivers/watchdog/designware_wdt.c             |  73 -------
 drivers/watchdog/dw_wdt.c                     | 184 ++++++++++++++++++
 include/configs/rk3399_common.h               |  10 +-
 include/configs/socfpga_common.h              |   2 +-
 include/configs/socfpga_stratix10_socdk.h     |   2 +-
 scripts/config_whitelist.txt                  |   1 -
 46 files changed, 332 insertions(+), 160 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h
 create mode 100644 arch/arm/mach-rockchip/cpu-info.c
 delete mode 100644 drivers/watchdog/designware_wdt.c
 create mode 100644 drivers/watchdog/dw_wdt.c

Signature · 6 lines

2.18.0.321.gffc6fa0e3

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Jagan Teki

2019-07-29 07:46 UTC #2 lore raw

PATCH 1/15 arm: rockchip: Add common cru.h

Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error.

So, create a common cru include as cru.h then
include the arch cru include file and move the
common cru register bit definitions into it.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 arch/arm/include/asm/arch-rockchip/cru.h   | 16 ++++++++++++++++
 arch/arm/mach-rockchip/rk3288-board.c      |  2 +-
 arch/arm/mach-rockchip/rk3288/clk_rk3288.c |  2 +-
 arch/arm/mach-rockchip/rk3399-board-spl.c  |  2 +-
 arch/arm/mach-rockchip/rk3399/clk_rk3399.c |  2 +-
 drivers/clk/rockchip/clk_rk3288.c          |  2 +-
 drivers/clk/rockchip/clk_rk3399.c          |  2 +-
 drivers/ram/rockchip/sdram_rk3288.c        |  2 +-
 drivers/ram/rockchip/sdram_rk3399.c        |  2 +-
 drivers/video/rockchip/rk3288_mipi.c       |  2 +-
 drivers/video/rockchip/rk3399_mipi.c       |  2 +-
 drivers/video/rockchip/rk_mipi.c           |  2 +-
 12 files changed, 27 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h

arch/arm/include/asm/arch-rockchip/cru.h new file +16 -0

new file mode 100644
index 0000000000..3b1a3bae71
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions.
+ * Author: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
+ */
+
+#ifndef _ROCKCHIP_CLOCK_H
+#define _ROCKCHIP_CLOCK_H
+
+#if defined(CONFIG_ROCKCHIP_RK3288)
+# include <asm/arch-rockchip/cru_rk3288.h>
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+# include <asm/arch-rockchip/cru_rk3399.h>
+#endif
+
+#endif /* _ROCKCHIP_CLOCK_H */

arch/arm/mach-rockchip/rk3288-board.c +1 -1

index a250d50387..d3ec141fea 100644
@@ -10,7 +10,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/periph.h>
 #include <asm/arch-rockchip/pmu_rk3288.h>
 #include <asm/arch-rockchip/qos_rk3288.h>

arch/arm/mach-rockchip/rk3288/clk_rk3288.c +1 -1

index e64ee86f08..1730f12443 100644
@@ -8,7 +8,7 @@
 #include <dm.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
 
 int rockchip_get_clk(struct udevice **devp)
 {

arch/arm/mach-rockchip/rk3399-board-spl.c +1 -1

index 7154d8e5d0..5642c7f523 100644
@@ -15,7 +15,7 @@
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/periph.h>

arch/arm/mach-rockchip/rk3399/clk_rk3399.c +1 -1

index f0411c0a21..a80a46f1db 100644
@@ -8,7 +8,7 @@
 #include <dm.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 
 static int rockchip_get_cruclk(struct udevice **devp)
 {

drivers/clk/rockchip/clk_rk3288.c +1 -1

index 375d7f8acb..b05becd3d0 100644
@@ -14,7 +14,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/grf_rk3288.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <dt-bindings/clock/rk3288-cru.h>

drivers/clk/rockchip/clk_rk3399.c +1 -1

index d9950c159b..37a82788c6 100644
@@ -14,7 +14,7 @@
 #include <bitfield.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3399-cru.h>

drivers/ram/rockchip/sdram_rk3288.c +1 -1

index 6bb025a851..48b479d82b 100644
@@ -16,7 +16,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/ddr_rk3288.h>
 #include <asm/arch-rockchip/grf_rk3288.h>
 #include <asm/arch-rockchip/pmu_rk3288.h>

drivers/ram/rockchip/sdram_rk3399.c +1 -1

index 81fc71c051..0801faf7a1 100644
@@ -14,7 +14,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 #include <asm/arch-rockchip/pmu_rk3399.h>
 #include <asm/arch-rockchip/hardware.h>

drivers/video/rockchip/rk3288_mipi.c +1 -1

index 7c4a4cc53b..65891ce45c 100644
@@ -18,7 +18,7 @@
 #include <dm/uclass-internal.h>
 #include <linux/kernel.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/grf_rk3288.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/rockchip_mipi_dsi.h>

drivers/video/rockchip/rk3399_mipi.c +1 -1

index a93b73400b..a5b7ba69a8 100644
@@ -18,7 +18,7 @@
 #include <dm/uclass-internal.h>
 #include <linux/kernel.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/rockchip_mipi_dsi.h>

drivers/video/rockchip/rk_mipi.c +1 -1

index bcd039b7bc..f9280e8607 100644
@@ -18,7 +18,7 @@
 #include <dm/uclass-internal.h>
 #include <linux/kernel.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 #include <asm/arch-rockchip/rockchip_mipi_dsi.h>

Signature · 1 line

2.18.0.321.gffc6fa0e3

A message that is not in the archive (sent off-list or not yet received): 20190729074711.16988-2-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org

Kever Yang

2019-08-05 12:25 UTC #4 lore raw

Re: [PATCH 01/15] arm: rockchip: Add common cru.h

Hi Jagan,

Quoted 9 lines · Jagan Teki

Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error.
So, create a common cru include as cru.h then
include the arch cru include file and move the
common cru register bit definitions into it.

Add code for common register bit definitions is OK, is it able to merge

into clock.h? Or maybe we can use cru.h and do some cleanup for clock.h

Quoted 28 lines

Signed-off-by Jagan Teki <[email protected]>

---
  arch/arm/include/asm/arch-rockchip/cru.h   | 16 ++++++++++++++++
  arch/arm/mach-rockchip/rk3288-board.c      |  2 +-
  arch/arm/mach-rockchip/rk3288/clk_rk3288.c |  2 +-
  arch/arm/mach-rockchip/rk3399-board-spl.c  |  2 +-
  arch/arm/mach-rockchip/rk3399/clk_rk3399.c |  2 +-
  drivers/clk/rockchip/clk_rk3288.c          |  2 +-
  drivers/clk/rockchip/clk_rk3399.c          |  2 +-
  drivers/ram/rockchip/sdram_rk3288.c        |  2 +-
  drivers/ram/rockchip/sdram_rk3399.c        |  2 +-
  drivers/video/rockchip/rk3288_mipi.c       |  2 +-
  drivers/video/rockchip/rk3399_mipi.c       |  2 +-
  drivers/video/rockchip/rk_mipi.c           |  2 +-
  12 files changed, 27 insertions(+), 11 deletions(-)

create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h

arch/arm/include/asm/arch-rockchip/cru.h new file +4 -0

new file mode 100644
index 0000000000..3b1a3bae71
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions.
+ * Author: Jagan Teki <[email protected]>

arch/arm/include/asm/arch-rockchip/cru.h line 14

Quoted 10 lines

arch/arm/include/asm/arch-rockchip/cru.h new file +10 -0

+ */
+
+#ifndef _ROCKCHIP_CLOCK_H
+#define _ROCKCHIP_CLOCK_H
+
+#if defined(CONFIG_ROCKCHIP_RK3288)
+# include <asm/arch-rockchip/cru_rk3288.h>
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+# include <asm/arch-rockchip/cru_rk3399.h>
+#endif

Can we just use cru.h as common header include by other cru_rkxx.h?

And then we can leave all the drivers including its cru_rkxx.h as-is.

The cru and grf regiesters are always different for different SoCs,

and only part of then have common BIT definition.

Thanks,

- Kever

Quoted 137 lines

arch/arm/include/asm/arch-rockchip/cru.h new file +2 -0

+
+#endif /* _ROCKCHIP_CLOCK_H */

arch/arm/mach-rockchip/rk3288-board.c +1 -1

index a250d50387..d3ec141fea 100644
@@ -10,7 +10,7 @@
  #include <syscon.h>
  #include <asm/io.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/periph.h>
  #include <asm/arch-rockchip/pmu_rk3288.h>
  #include <asm/arch-rockchip/qos_rk3288.h>

arch/arm/mach-rockchip/rk3288/clk_rk3288.c +1 -1

index e64ee86f08..1730f12443 100644
@@ -8,7 +8,7 @@
  #include <dm.h>
  #include <syscon.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
 
  int rockchip_get_clk(struct udevice **devp)
  {

arch/arm/mach-rockchip/rk3399-board-spl.c +1 -1

index 7154d8e5d0..5642c7f523 100644
@@ -15,7 +15,7 @@
  #include <asm/io.h>
  #include <asm/arch-rockchip/bootrom.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/grf_rk3399.h>
  #include <asm/arch-rockchip/hardware.h>
  #include <asm/arch-rockchip/periph.h>

arch/arm/mach-rockchip/rk3399/clk_rk3399.c +1 -1

index f0411c0a21..a80a46f1db 100644
@@ -8,7 +8,7 @@
  #include <dm.h>
  #include <syscon.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
 
  static int rockchip_get_cruclk(struct udevice **devp)
  {

drivers/clk/rockchip/clk_rk3288.c +1 -1

index 375d7f8acb..b05becd3d0 100644
@@ -14,7 +14,7 @@
  #include <syscon.h>
  #include <asm/io.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/grf_rk3288.h>
  #include <asm/arch-rockchip/hardware.h>
  #include <dt-bindings/clock/rk3288-cru.h>

drivers/clk/rockchip/clk_rk3399.c +1 -1

index d9950c159b..37a82788c6 100644
@@ -14,7 +14,7 @@
  #include <bitfield.h>
  #include <asm/io.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/hardware.h>
  #include <dm/lists.h>
  #include <dt-bindings/clock/rk3399-cru.h>

drivers/ram/rockchip/sdram_rk3288.c +1 -1

index 6bb025a851..48b479d82b 100644
@@ -16,7 +16,7 @@
  #include <syscon.h>
  #include <asm/io.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/ddr_rk3288.h>
  #include <asm/arch-rockchip/grf_rk3288.h>
  #include <asm/arch-rockchip/pmu_rk3288.h>

drivers/ram/rockchip/sdram_rk3399.c +1 -1

index 81fc71c051..0801faf7a1 100644
@@ -14,7 +14,7 @@
  #include <syscon.h>
  #include <asm/io.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/grf_rk3399.h>
  #include <asm/arch-rockchip/pmu_rk3399.h>
  #include <asm/arch-rockchip/hardware.h>

drivers/video/rockchip/rk3288_mipi.c +1 -1

index 7c4a4cc53b..65891ce45c 100644
@@ -18,7 +18,7 @@
  #include <dm/uclass-internal.h>
  #include <linux/kernel.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3288.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/grf_rk3288.h>
  #include <asm/arch-rockchip/hardware.h>
  #include <asm/arch-rockchip/rockchip_mipi_dsi.h>

drivers/video/rockchip/rk3399_mipi.c +1 -1

index a93b73400b..a5b7ba69a8 100644
@@ -18,7 +18,7 @@
  #include <dm/uclass-internal.h>
  #include <linux/kernel.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/grf_rk3399.h>
  #include <asm/arch-rockchip/hardware.h>
  #include <asm/arch-rockchip/rockchip_mipi_dsi.h>

drivers/video/rockchip/rk_mipi.c +0 -0

index bcd039b7bc..f9280e8607 100644

drivers/video/rockchip/rk_mipi.c line 24

Quoted 8 lines

drivers/video/rockchip/rk_mipi.c +1 -1

@@ -18,7 +18,7 @@
  #include <dm/uclass-internal.h>
  #include <linux/kernel.h>
  #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru_rk3399.h>
+#include <asm/arch-rockchip/cru.h>
  #include <asm/arch-rockchip/grf_rk3399.h>
  #include <asm/arch-rockchip/rockchip_mipi_dsi.h>

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Jagan Teki

author

2019-08-25 17:25 UTC #5 lore raw

Re: [PATCH 01/15] arm: rockchip: Add common cru.h

Quoted 10 lines · Kever Yang

Hi Jagan,
Quoted 6 lines · Jagan Teki
Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error.

Quoted 7 lines

Quoted 3 lines
So, create a common cru include as cru.h then include the arch cru include file and move the common cru register bit definitions into it.
Add code for common register bit definitions is OK, is it able to merge
into clock.h? Or maybe we can use cru.h and do some cleanup for clock.h

Yes true, will do that in separately since the cru is the effected one for redundant, I have managed only this for this series.
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Jagan Teki

2019-07-29 07:46 UTC #6 lore raw

PATCH 2/15 rockchip: Add cpu-info

In reply to a message not in the archive

Add cpu information for rockchip soc.

This would help to print the SoC family number, with associated temparature, clock and reason for reset etc.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 arch/arm/mach-rockchip/Makefile   |  1 +
 arch/arm/mach-rockchip/cpu-info.c | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+)
 create mode 100644 arch/arm/mach-rockchip/cpu-info.c

arch/arm/mach-rockchip/Makefile +1 -0

index a12b8d4434..655b3e3e1a 100644
@@ -25,6 +25,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # we can have the preprocessor correctly recognise both 0x0 and 0
 # meaning "turn it off".
 obj-y += boot_mode.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
 
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o

arch/arm/mach-rockchip/cpu-info.c new file +24 -0

new file mode 100644
index 0000000000..088fc806a6
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions.
+ * Author: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
+ */
+
+#include <common.h>
+
+int print_cpuinfo(void)
+{
+	puts("SoC:   Rockchip ");
+
+	/* TODO print operating temparature and clock */
+# ifdef CONFIG_ROCKCHIP_RK3288
+	puts("RK3288\n");
+# elif CONFIG_ROCKCHIP_RK3399
+	puts("RK3399\n");
+# else
+# warning Please update cpu.c with correct CPU information
+	puts("Family\n");
+# endif
+
+	return 0;
+}

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Kever Yang

2019-08-05 12:27 UTC #8 lore raw

Re: [PATCH 02/15] rockchip: Add cpu-info

Jagan,

Quoted 41 lines · Jagan Teki

Add cpu information for rockchip soc.

This would help to print the SoC family number, with associated temparature, clock and reason for reset etc.

Signed-off-by Jagan Teki <[email protected]>

---
  arch/arm/mach-rockchip/Makefile   |  1 +
  arch/arm/mach-rockchip/cpu-info.c | 24 ++++++++++++++++++++++++
  2 files changed, 25 insertions(+)

create mode 100644 arch/arm/mach-rockchip/cpu-info.c

arch/arm/mach-rockchip/Makefile +1 -0

index a12b8d4434..655b3e3e1a 100644
@@ -25,6 +25,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
  # we can have the preprocessor correctly recognise both 0x0 and 0
  # meaning "turn it off".
  obj-y += boot_mode.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
 
  obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
  obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o

arch/arm/mach-rockchip/cpu-info.c new file +11 -0

new file mode 100644
index 0000000000..088fc806a6
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions.
+ * Author: Jagan Teki <[email protected]>
+ */
+
+#include <common.h>
+
+int print_cpuinfo(void)
+{
+	puts("SoC:   Rockchip ");

arch/arm/mach-rockchip/cpu-info.c line 21

Quoted 10 lines

arch/arm/mach-rockchip/cpu-info.c new file +10 -0

+
+	/* TODO print operating temparature and clock */
+# ifdef CONFIG_ROCKCHIP_RK3288
+	puts("RK3288\n");
+# elif CONFIG_ROCKCHIP_RK3399
+	puts("RK3399\n");
+# else
+# warning Please update cpu.c with correct CPU information
+	puts("Family\n");
+# endif

Can we use CONFIG_SYS_SOC and not one macro for each SoC?

Thanks,

- Kever

arch/arm/mach-rockchip/cpu-info.c line 24

Quoted 3 lines

arch/arm/mach-rockchip/cpu-info.c new file +3 -0
+
+	return 0;
+}

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Jagan Teki

2019-07-29 07:46 UTC #9 lore raw

PATCH 3/15 rockchip: rk3288: Print reset reason

In reply to a message not in the archive

Print the reason for reset instead of storing it into env variable in rk3288.

This would help to find the reset reason directly
on U-Boot proper logs.

Cc Wadim Egorov <w.egorov-guT5V/[email protected]>

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 arch/arm/mach-rockchip/rk3288-board.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/mach-rockchip/rk3288-board.c +1 -1

index d3ec141fea..613264d7ee 100644
@@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void)
 		reason = "unknown reset";
 	}
 
-	env_set("reset_reason", reason);
+	printf("Reset cause: %s\n", reason);
 
 	/*
 	 * Clear cru_glb_rst_st, so we can determine the last reset cause

Signature · 1 line

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Matthias Urlichs

2019-07-29 07:57 UTC #11 lore raw

Re: [PATCH 03/15] rockchip: rk3288: Print reset reason

Quoted 2 lines · Jagan Teki

Print the reason for reset instead of storing it into env variable in rk3288.

Why "instead" and not "in addition to"? It makes sense to have the reset reason available in boot scripts.

NB: Would this also be possible for 3399?

Signature · 9 lines

-- mit freundlichen Grüßen
-- 
-- Matthias Urlichs


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Kever Yang

2019-08-05 12:30 UTC #12 lore raw

Re: [PATCH 03/15] rockchip: rk3288: Print reset reason

In reply to a message not in the archive

Quoted 17 lines · Jagan Teki

Print the reason for reset instead of storing it into env variable in rk3288.
This would help to find the reset reason directly on U-Boot proper logs.
Cc Wadim Egorov <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
  arch/arm/mach-rockchip/rk3288-board.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-rockchip/rk3288-board.c +0 -0
index d3ec141fea..613264d7ee 100644

arch/arm/mach-rockchip/rk3288-board.c static void rk3288_detect_reset_reason(void) · line 75

Quoted 5 lines

arch/arm/mach-rockchip/rk3288-board.c +1 -1

@@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void)
  		reason = "unknown reset";
  	}
 
-	env_set("reset_reason", reason);
+	printf("Reset cause: %s\n", reason);

Why this need to set as env before? I didn't touch this code when I migrate

the code to use common board file. If this no need to set env, then this

call back can goto board_init() instead of board_late_init().

Thanks,

- Kever

arch/arm/mach-rockchip/rk3288-board.c static void rk3288_detect_reset_reason(void) · line 78

Quoted 3 lines

arch/arm/mach-rockchip/rk3288-board.c +0 -0

  	/*
  	 * Clear cru_glb_rst_st, so we can determine the last reset cause

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Jagan Teki

2019-08-14 09:40 UTC #14 lore raw

Re: [PATCH 03/15] rockchip: rk3288: Print reset reason

Quoted 23 lines · Kever Yang

Quoted 20 lines · Jagan Teki
Print the reason for reset instead of storing it into env variable in rk3288.
This would help to find the reset reason directly on U-Boot proper logs.
Cc Wadim Egorov <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
  arch/arm/mach-rockchip/rk3288-board.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-rockchip/rk3288-board.c +0 -0
index d3ec141fea..613264d7ee 100644
@@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void)
              reason = "unknown reset";
      }
 

Quoted 5 lines

arch/arm/mach-rockchip/rk3288-board.c static void rk3288_detect_reset_reason(void) · line 75
Quoted 2 lines
arch/arm/mach-rockchip/rk3288-board.c +1 -1
-     env_set("reset_reason", reason);
+     printf("Reset cause: %s\n", reason);
Why this need to set as env before? I didn't touch this code when I migrate

Don't know the proper reason for this, ie why I have CCed Wadim.

Wadim, any comments?

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Wadim Egorov

2019-08-14 10:43 UTC #15 lore raw

Re: [PATCH 03/15] rockchip: rk3288: Print reset reason

Quoted 23 lines · Jagan Teki

Quoted 22 lines · Kever Yang
Quoted 20 lines · Jagan Teki
Print the reason for reset instead of storing it into env variable in rk3288.
This would help to find the reset reason directly on U-Boot proper logs.
Cc Wadim Egorov <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
  arch/arm/mach-rockchip/rk3288-board.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-rockchip/rk3288-board.c +0 -0
index d3ec141fea..613264d7ee 100644
@@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void)
              reason = "unknown reset";
      }
 

Quoted 7 lines

Quoted 4 lines
arch/arm/mach-rockchip/rk3288-board.c static void rk3288_detect_reset_reason(void) · line 75
Quoted 2 lines
arch/arm/mach-rockchip/rk3288-board.c +1 -1
-     env_set("reset_reason", reason);
+     printf("Reset cause: %s\n", reason);
Why this need to set as env before? I didn't touch this code when I migrate
Don't know the proper reason for this, ie why I have CCed Wadim.
Wadim, any comments?

If we put the reset_reason inside an environment variable we can later reuse it from a script, e.g. changing the boot behavior for special cases. Right now I have no usecase for it. So from my side you can just print the reason instead of setting the environment. AFAIR I copied the env-method from another board.
btw, board/xilinx/zynqmp/zynqmp.c is doing both.

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Michael Nazzareno Trimarchi

2019-08-14 10:46 UTC #16 lore raw

Re: [PATCH 03/15] rockchip: rk3288: Print reset reason

Quoted 34 lines · Wadim Egorov

Quoted 1 line · Jagan Teki
On Mon, Aug 5, 2019 at 6:00 PM Kever Yang <[email protected]>
Quoted 8 lines · wrote:
Quoted 8 lines · Jagan Teki
Quoted 6 lines
Print the reason for reset instead of storing it into env variable in rk3288.
This would help to find the reset reason directly on U-Boot proper logs.
Quoted 7 lines
Quoted 7 lines
Review
Quoted 7 lines
Cc Wadim Egorov <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
  arch/arm/mach-rockchip/rk3288-board.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
(quoted diff) +0 -0
b/arch/arm/mach-rockchip/rk3288-board.c
Quoted 11 lines
Quoted 11 lines
arch/arm/mach-rockchip/rk3288-board.c static void rk3288_detect_reset_reason(void) · line 75
Quoted 9 lines
index d3ec141fea..613264d7ee 100644
arch/arm/mach-rockchip/rk3288-board.c +1 -1
@@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void)
              reason = "unknown reset";
      }
 
-     env_set("reset_reason", reason);
+     printf("Reset cause: %s\n", reason);
Why this need to set as env before? I didn't touch this code when I
migrate
Quoted 2 lines
Don't know the proper reason for this, ie why I have CCed Wadim.

Quoted 7 lines

Quoted 1 line
Wadim, any comments?
If we put the reset_reason inside an environment variable we can later reuse it from a script, e.g. changing the boot behavior for special cases. Right now I have no usecase for it. So from my side you can just print the reason instead of setting the environment. AFAIR I copied the env-method from another board.
btw, board/xilinx/zynqmp/zynqmp.c is doing both.

The reason is totally valid and we don't know even is already use in some deploy. Add the print without remove the environment make more sense to me

Michael

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Jagan Teki

2019-07-29 07:47 UTC #17 lore raw

PATCH 4/15 rockchip: Add common reset reason

In reply to a message not in the archive

Right now the reset reason supported by rk3288
and which is printing on board late function.

Support the same reset reason for rk3399 as well,
since it is sharing same cru register mark the
code into common area.

Printing reset reason below SoC information would really help instead of printing in board late call, so support this as part of cpu_info.

Cc Wadim Egorov <w.egorov-guT5V/[email protected]>

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 arch/arm/include/asm/arch-rockchip/cru.h      | 12 ++++++
 .../include/asm/arch-rockchip/cru_rk3288.h    | 14 +------
 arch/arm/mach-rockchip/cpu-info.c             | 41 +++++++++++++++++++
 arch/arm/mach-rockchip/rk3288-board.c         | 39 ------------------
 4 files changed, 54 insertions(+), 52 deletions(-)

arch/arm/include/asm/arch-rockchip/cru.h +12 -0

index 3b1a3bae71..b54e21d6f1 100644
@@ -13,4 +13,16 @@
 # include <asm/arch-rockchip/cru_rk3399.h>
 #endif
 
+/* CRU_GLB_RST_ST */
+enum {
+	GLB_POR_RST,
+	FST_GLB_RST_ST		= BIT(0),
+	SND_GLB_RST_ST		= BIT(1),
+	FST_GLB_TSADC_RST_ST	= BIT(2),
+	SND_GLB_TSADC_RST_ST	= BIT(3),
+	FST_GLB_WDT_RST_ST	= BIT(4),
+	SND_GLB_WDT_RST_ST	= BIT(5),
+	GLB_RST_ST_MASK		= GENMASK(5, 0),
+};
+
 #endif /* _ROCKCHIP_CLOCK_H */

arch/arm/include/asm/arch-rockchip/cru_rk3288.h +1 ~~-13~~

index e891f20b37..7acb1c7208 100644
@@ -51,7 +51,7 @@ struct rk3288_cru {
 	u32 cru_glb_cnt_th;
 	u32 cru_glb_rst_con;
 	u32 reserved3;
-	u32 cru_glb_rst_st;
+	u32 glb_rst_st;
 	u32 reserved4;
 	u32 cru_sdmmc_con[2];
 	u32 cru_sdio0_con[2];

@@ -227,16 +227,4 @@ enum {
 	CLKF_MASK		= 0x1fff << CLKF_SHIFT,
 };
 
-/* CRU_GLB_RST_ST */
-enum {
-	GLB_POR_RST,
-	FST_GLB_RST_ST		= BIT(0),
-	SND_GLB_RST_ST		= BIT(1),
-	FST_GLB_TSADC_RST_ST	= BIT(2),
-	SND_GLB_TSADC_RST_ST	= BIT(3),
-	FST_GLB_WDT_RST_ST	= BIT(4),
-	SND_GLB_WDT_RST_ST	= BIT(5),
-	GLB_RST_ST_MASK		= GENMASK(5, 0),
-};
-
 #endif

arch/arm/mach-rockchip/cpu-info.c +41 -0

59 lines not on this page · raw message

arch/arm/mach-rockchip/rk3288-board.c +0 ~~-39~~

index 613264d7ee..3e5cd9bad9 100644
@@ -10,7 +10,6 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/periph.h>
 #include <asm/arch-rockchip/pmu_rk3288.h>
 #include <asm/arch-rockchip/qos_rk3288.h>

@@ -44,48 +43,10 @@ int rk3288_qos_init(void)
 	return 0;
 }
 
-static void rk3288_detect_reset_reason(void)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-	const char *reason;
-
-	if (IS_ERR(cru))
-		return;
-
-	switch (cru->cru_glb_rst_st) {
-	case GLB_POR_RST:
-		reason = "POR";
-		break;
-	case FST_GLB_RST_ST:
-	case SND_GLB_RST_ST:
-		reason = "RST";
-		break;
-	case FST_GLB_TSADC_RST_ST:
-	case SND_GLB_TSADC_RST_ST:
-		reason = "THERMAL";
-		break;
-	case FST_GLB_WDT_RST_ST:
-	case SND_GLB_WDT_RST_ST:
-		reason = "WDOG";
-		break;
-	default:
-		reason = "unknown reset";
-	}
-
-	printf("Reset cause: %s\n", reason);
-
-	/*
-	 * Clear cru_glb_rst_st, so we can determine the last reset cause
-	 * for following resets.
-	 */
-	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
-}
-
 int board_late_init(void)
 {
 	setup_boot_mode();
 	rk3288_qos_init();
-	rk3288_detect_reset_reason();
 
 	return rk_board_late_init();
 }

Signature · 1 line

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Jagan Teki

2019-07-29 07:47 UTC #18 lore raw

PATCH 5/15 rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO

In reply to a message not in the archive

RK3288 and Rk3399 are now support cpu-info, so
enable them by default.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 configs/evb-rk3288_defconfig         | 1 -
 configs/evb-rk3399_defconfig         | 1 -
 configs/fennec-rk3288_defconfig      | 1 -
 configs/ficus-rk3399_defconfig       | 1 -
 configs/firefly-rk3288_defconfig     | 1 -
 configs/firefly-rk3399_defconfig     | 1 -
 configs/miqi-rk3288_defconfig        | 1 -
 configs/nanopc-t4-rk3399_defconfig   | 1 -
 configs/nanopi-m4-rk3399_defconfig   | 1 -
 configs/nanopi-neo4-rk3399_defconfig | 1 -
 configs/orangepi-rk3399_defconfig    | 1 -
 configs/phycore-rk3288_defconfig     | 1 -
 configs/popmetal-rk3288_defconfig    | 1 -
 configs/puma-rk3399_defconfig        | 1 -
 configs/rock-pi-4-rk3399_defconfig   | 1 -
 configs/rock960-rk3399_defconfig     | 1 -
 configs/rockpro64-rk3399_defconfig   | 1 -
 configs/tinker-rk3288_defconfig      | 1 -
 configs/vyasa-rk3288_defconfig       | 1 -
 19 files changed, 19 deletions(-)

configs/evb-rk3288_defconfig +0 -1

index a6df143276..28b3e392ec 100644
@@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0
 CONFIG_CMD_GPIO=y

configs/evb-rk3399_defconfig +0 -1

index 764d32f259..3c48053480 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/fennec-rk3288_defconfig +0 -1

index 16d8fb155c..21ff5a0efc 100644
@@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-fennec.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R=y

configs/ficus-rk3399_defconfig +0 -1

index d1425dc3d0..a146b0ced0 100644
@@ -8,7 +8,6 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff8c2000
 CONFIG_SPL_STACK_R=y

configs/firefly-rk3288_defconfig +0 -1

index 8abe8a648a..081744dc39 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R=y

configs/firefly-rk3399_defconfig +0 -1

index 9f05f33ddd..71f8e56669 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/miqi-rk3288_defconfig +0 -1

index c9a35115fb..42f27b0ba8 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R=y

configs/nanopc-t4-rk3399_defconfig +0 -1

index bca4f08966..2d437f4d86 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/nanopi-m4-rk3399_defconfig +0 -1

index dd2065df5f..18cc9a4482 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/nanopi-neo4-rk3399_defconfig +0 -1

index 46039d1d07..037f3f7c5a 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/orangepi-rk3399_defconfig +0 -1

index 16a0a17c74..f3e8b6686c 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/phycore-rk3288_defconfig +0 -1

index dfddc4af5e..7766aa6d65 100644
@@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R=y

configs/popmetal-rk3288_defconfig +0 -1

index 4c9a7f0824..97e814d1e3 100644
@@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R=y

configs/puma-rk3399_defconfig +0 -1

index 37f845cfb1..0e1ed3ec18 100644
@@ -15,7 +15,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh"
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
 CONFIG_MISC_INIT_R=y
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff8c2000
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set

configs/rock-pi-4-rk3399_defconfig +0 -1

index 14ae39a561..c4c05d0d62 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/rock960-rk3399_defconfig +0 -1

index ed11fef7c2..8890b547ba 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff8c2000
 CONFIG_SPL_STACK_R=y

configs/rockpro64-rk3399_defconfig +0 -1

index 72bfff289b..32d8415b23 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/tinker-rk3288_defconfig +0 -1

index b234539a53..06527c4933 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0
 CONFIG_CMD_GPIO=y

configs/vyasa-rk3288_defconfig +0 -1

index eaea625007..29482a299e 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R=y

Signature · 1 line

2.18.0.321.gffc6fa0e3

Kever Yang

2019-08-05 12:35 UTC #19 lore raw

Re: [PATCH 05/15] rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO

Quoted 1 line · Jagan Teki

RK3288 and Rk3399

Please both capital or both lowercase but not mix them.

Thanks,

- Kever

Quoted 247 lines

are now support cpu-info, so
enable them by default.

Signed-off-by Jagan Teki <[email protected]>

---
  configs/evb-rk3288_defconfig         | 1 -
  configs/evb-rk3399_defconfig         | 1 -
  configs/fennec-rk3288_defconfig      | 1 -
  configs/ficus-rk3399_defconfig       | 1 -
  configs/firefly-rk3288_defconfig     | 1 -
  configs/firefly-rk3399_defconfig     | 1 -
  configs/miqi-rk3288_defconfig        | 1 -
  configs/nanopc-t4-rk3399_defconfig   | 1 -
  configs/nanopi-m4-rk3399_defconfig   | 1 -
  configs/nanopi-neo4-rk3399_defconfig | 1 -
  configs/orangepi-rk3399_defconfig    | 1 -
  configs/phycore-rk3288_defconfig     | 1 -
  configs/popmetal-rk3288_defconfig    | 1 -
  configs/puma-rk3399_defconfig        | 1 -
  configs/rock-pi-4-rk3399_defconfig   | 1 -
  configs/rock960-rk3399_defconfig     | 1 -
  configs/rockpro64-rk3399_defconfig   | 1 -
  configs/tinker-rk3288_defconfig      | 1 -
  configs/vyasa-rk3288_defconfig       | 1 -
  19 files changed, 19 deletions(-)

configs/evb-rk3288_defconfig +0 -1

index a6df143276..28b3e392ec 100644
@@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y
  # CONFIG_ANDROID_BOOT_IMAGE is not set
  CONFIG_SILENT_CONSOLE=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0
  CONFIG_CMD_GPIO=y

configs/evb-rk3399_defconfig +0 -1

index 764d32f259..3c48053480 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/fennec-rk3288_defconfig +0 -1

index 16d8fb155c..21ff5a0efc 100644
@@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y
  CONFIG_SILENT_CONSOLE=y
  CONFIG_CONSOLE_MUX=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-fennec.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff704000
  CONFIG_SPL_STACK_R=y

configs/ficus-rk3399_defconfig +0 -1

index d1425dc3d0..a146b0ced0 100644
@@ -8,7 +8,6 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
  CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff8c2000
  CONFIG_SPL_STACK_R=y

configs/firefly-rk3288_defconfig +0 -1

index 8abe8a648a..081744dc39 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
  # CONFIG_ANDROID_BOOT_IMAGE is not set
  CONFIG_SILENT_CONSOLE=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff704000
  CONFIG_SPL_STACK_R=y

configs/firefly-rk3399_defconfig +0 -1

index 9f05f33ddd..71f8e56669 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/miqi-rk3288_defconfig +0 -1

index c9a35115fb..42f27b0ba8 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
  # CONFIG_ANDROID_BOOT_IMAGE is not set
  CONFIG_SILENT_CONSOLE=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff704000
  CONFIG_SPL_STACK_R=y

configs/nanopc-t4-rk3399_defconfig +0 -1

index bca4f08966..2d437f4d86 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/nanopi-m4-rk3399_defconfig +0 -1

index dd2065df5f..18cc9a4482 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/nanopi-neo4-rk3399_defconfig +0 -1

index 46039d1d07..037f3f7c5a 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/orangepi-rk3399_defconfig +0 -1

index 16a0a17c74..f3e8b6686c 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/phycore-rk3288_defconfig +0 -1

index dfddc4af5e..7766aa6d65 100644
@@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y
  CONFIG_SILENT_CONSOLE=y
  CONFIG_CONSOLE_MUX=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff704000
  CONFIG_SPL_STACK_R=y

configs/popmetal-rk3288_defconfig +0 -1

index 4c9a7f0824..97e814d1e3 100644
@@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y
  CONFIG_SILENT_CONSOLE=y
  CONFIG_CONSOLE_MUX=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff704000
  CONFIG_SPL_STACK_R=y

configs/puma-rk3399_defconfig +0 -1

index 37f845cfb1..0e1ed3ec18 100644
@@ -15,7 +15,6 @@ CONFIG_DEBUG_UART=y
  CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh"
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
  CONFIG_MISC_INIT_R=y
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff8c2000
  # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set

configs/rock-pi-4-rk3399_defconfig +0 -1

index 14ae39a561..c4c05d0d62 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/rock960-rk3399_defconfig +0 -1

index ed11fef7c2..8890b547ba 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff8c2000
  CONFIG_SPL_STACK_R=y

configs/rockpro64-rk3399_defconfig +0 -1

index 72bfff289b..32d8415b23 100644
@@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000

configs/tinker-rk3288_defconfig +0 -1

index b234539a53..06527c4933 100644
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
  CONFIG_SILENT_CONSOLE=y
  CONFIG_CONSOLE_MUX=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0
  CONFIG_CMD_GPIO=y

configs/vyasa-rk3288_defconfig +0 -0

index eaea625007..29482a299e 100644

configs/vyasa-rk3288_defconfig CONFIG_DEBUG_UART_CLOCK=24000000 · line 17

Quoted 7 lines

configs/vyasa-rk3288_defconfig +0 -1

@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_DEBUG_UART=y
  CONFIG_SILENT_CONSOLE=y
  CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_TEXT_BASE=0xff704000
  CONFIG_SPL_STACK_R=y

_______________________________________________
U-Boot mailing list
[email protected]
https://lists.denx.de/listinfo/u-boot

Jagan Teki

2019-07-29 07:47 UTC #20 lore raw

PATCH 6/15 wdt: designware: Simplify is_enabled function

In reply to a message not in the archive

Right now the designware is_enabled function is using numeric number to check whether watchdog is enabled or not, so use register macro and check the same.

Cc Chin Liang See <[email protected]>

Cc Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/[email protected]>

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 drivers/watchdog/designware_wdt.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

drivers/watchdog/designware_wdt.c +1 -3

index c668567c66..bd858f0608 100644
@@ -45,9 +45,7 @@ static void designware_wdt_enable(void)
 
 static unsigned int designware_wdt_is_enabled(void)
 {
-	unsigned long val;
-	val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR));
-	return val & 0x1;
+	return readl(CONFIG_DW_WDT_BASE + DW_WDT_CR) & DW_WDT_CR_RMOD_OFFSET;
 }
 
 #if defined(CONFIG_HW_WATCHDOG)

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

2019-07-29 07:47 UTC #21 lore raw

PATCH 7/15 wdt: designware: Simplify enable function

In reply to a message not in the archive

Simplify dw watchdog enable function by using
proper macro and drop unwanted macros.

Cc Chin Liang See <[email protected]>

Cc Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/[email protected]>

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 drivers/watchdog/designware_wdt.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

drivers/watchdog/designware_wdt.c +5 -4

index bd858f0608..2979fda44e 100644
@@ -14,7 +14,6 @@
 
 #define DW_WDT_CR_EN_OFFSET	0x00
 #define DW_WDT_CR_RMOD_OFFSET	0x01
-#define DW_WDT_CR_RMOD_VAL	0x00
 #define DW_WDT_CRR_RESTART_VAL	0x76
 
 /*

@@ -38,9 +37,11 @@ static int designware_wdt_settimeout(unsigned int timeout)
 
 static void designware_wdt_enable(void)
 {
-	writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) |
-	      (0x1 << DW_WDT_CR_EN_OFFSET)),
-	      (CONFIG_DW_WDT_BASE + DW_WDT_CR));
+	u32 val = readl(CONFIG_DW_WDT_BASE + DW_WDT_CR);
+
+	/* Enable watchdog */
+	val |= DW_WDT_CR_RMOD_OFFSET;
+	writel(val, CONFIG_DW_WDT_BASE + DW_WDT_CR);
 }
 
 static unsigned int designware_wdt_is_enabled(void)

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

2019-07-29 07:47 UTC #22 lore raw

PATCH 8/15 wdt: dw: Add driver-model support

In reply to a message not in the archive

Add driver-model code for designware watchdog.

Cc Chin Liang See <[email protected]>

Cc Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/[email protected]>

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 drivers/watchdog/designware_wdt.c | 114 +++++++++++++++++++++++++++++-
 1 file changed, 113 insertions(+), 1 deletion(-)

drivers/watchdog/designware_wdt.c +113 -1

index 2979fda44e..4efbb25f86 100644
@@ -4,7 +4,6 @@
  */
 
 #include <common.h>
-#include <watchdog.h>
 #include <asm/io.h>
 #include <asm/utils.h>

@@ -16,6 +15,117 @@
 #define DW_WDT_CR_RMOD_OFFSET	0x01
 #define DW_WDT_CRR_RESTART_VAL	0x76
 
+#ifdef CONFIG_WDT
+
+#include <dm.h>
+#include <wdt.h>
+#include <clk.h>
+
+struct dw_wdt {
+	void __iomem *regs;
+	unsigned long clk_rate;
+};
+
+static inline int dw_wdt_is_enabled(struct dw_wdt *dw)
+{
+	return readl(dw->regs + DW_WDT_CR) & DW_WDT_CR_RMOD_OFFSET;
+}
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int dw_wdt_set_timeout(struct dw_wdt *dw, unsigned int timeout)
+{
+	signed int i;
+
+	/* calculate the timeout range value */
+	i = (log_2_n_round_up(timeout * dw->clk_rate)) - 16;
+	if (i > 15)
+		i = 15;
+	if (i < 0)
+		i = 0;
+
+	writel((i | (i << 4)), dw->regs + DW_WDT_TORR);
+
+	return 0;
+}
+
+static void dw_wdt_enable(struct dw_wdt *dw)
+{
+	u32 val = readl(dw->regs + DW_WDT_CR);
+
+	/* Enable watchdog */
+	val |= DW_WDT_CR_RMOD_OFFSET;
+	writel(val, dw->regs + DW_WDT_CR);
+}
+
+static int dw_wdt_reset(struct udevice *dev)
+{
+	struct dw_wdt *dw = dev_get_priv(dev);
+
+	if (dw_wdt_is_enabled(dw))
+		writel(DW_WDT_CRR_RESTART_VAL, dw->regs + DW_WDT_CRR);
+	else
+		dw_wdt_enable(dw);
+
+	return 0;
+}
+
+static int dw_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+	struct dw_wdt *dw = dev_get_priv(dev);
+
+	dw_wdt_set_timeout(dw, timeout);
+	dw_wdt_enable(dw);
+
+	return 0;
+}
+
+static int dw_wdt_probe(struct udevice *dev)
+{
+	struct dw_wdt *dw = dev_get_priv(dev);
+	struct clk clk;
+	int ret;
+
+	dw->regs = dev_remap_addr(dev);
+	if (!dw->regs)
+		return -EINVAL;
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (!ret)
+		dw->clk_rate = clk_get_rate(&clk);
+	else
+		return -EINVAL;
+
+	dw_wdt_reset(dev);
+
+	return 0;
+}
+
+static const struct wdt_ops dw_wdt_ops = {
+	.reset = dw_wdt_reset,
+	.start = dw_wdt_start,
+};
+
+static const struct udevice_id dw_wdt_ids[] = {
+	{ .compatible = "snps,dw-wdt" },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(dw_wdt) = {
+	.name = "dw_wdt",
+	.id = UCLASS_WDT,
+	.of_match = dw_wdt_ids,
+	.ops = &dw_wdt_ops,
+	.priv_auto_alloc_size = sizeof(struct dw_wdt),
+	.probe = dw_wdt_probe,
+};
+
+#else
+
+#include <watchdog.h>
+
 /*
  * Set the watchdog time interval.
  * Counter is 32 bit.

@@ -70,3 +180,5 @@ void hw_watchdog_init(void)
 	hw_watchdog_reset();
 }
 #endif
+
+#endif /* CONFIG_WDT */

Signature · 1 line

2.18.0.321.gffc6fa0e3

A message that is not in the archive (sent off-list or not yet received): 20190729074711.16988-9-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org

Andy Shevchenko

2019-07-29 09:09 UTC #24 lore raw

Re: [U-Boot] [PATCH 08/15] wdt: dw: Add driver-model support

drivers/watchdog/designware_wdt.c line 43

Quoted 13 lines · Jagan Teki

Add driver-model code for designware watchdog.

drivers/watchdog/designware_wdt.c +10 -0

+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int dw_wdt_set_timeout(struct dw_wdt *dw, unsigned int timeout)
+{
+       signed int i;
+
+       /* calculate the timeout range value */
+       i = (log_2_n_round_up(timeout * dw->clk_rate)) - 16;

Redundant parenthesis.

drivers/watchdog/designware_wdt.c line 47

Quoted 4 lines

drivers/watchdog/designware_wdt.c +4 -0

+       if (i > 15)
+               i = 15;
+       if (i < 0)
+               i = 0;

Use clamp_t().

drivers/watchdog/designware_wdt.c line 99

Quoted 12 lines

drivers/watchdog/designware_wdt.c +10 -0

+
+       writel((i | (i << 4)), dw->regs + DW_WDT_TORR);
+
+       return 0;
+}
 
 
+       ret = clk_get_by_index(dev, 0, &clk);
+       if (!ret)
+               dw->clk_rate = clk_get_rate(&clk);
+       else
+               return -EINVAL;

Why not to use traditional pattern, i.e.

if (ret)

    return -ERRNO;

Signature · 2 lines

With Best Regards,
Andy Shevchenko

Jagan Teki

2019-07-29 07:47 UTC #25 lore raw

PATCH 9/15 wdt: dw: Rename to dw_wdt.c

In reply to a message not in the archive

- use dw instead of designware for driver file since Linux following the same.
- add CONFIG macro start with CONFIG_WDT since the driver mode wdt drivers follow this.

Cc Dinh Nguyen <[email protected]>

Cc Chin-Liang See <[email protected]>

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 common/board_f.c                                | 2 +-
 drivers/watchdog/Makefile                       | 2 +-
 drivers/watchdog/{designware_wdt.c => dw_wdt.c} | 0
 include/configs/socfpga_common.h                | 2 +-
 include/configs/socfpga_stratix10_socdk.h       | 2 +-
 scripts/config_whitelist.txt                    | 2 +-
 6 files changed, 5 insertions(+), 5 deletions(-)
 rename drivers/watchdog/{designware_wdt.c => dw_wdt.c} (100%)

common/board_f.c +1 -1

index 4760d728f3..79efef0792 100644
@@ -95,7 +95,7 @@ static int init_func_watchdog_init(void)
 # if defined(CONFIG_HW_WATCHDOG) && \
 	(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 	defined(CONFIG_SH) || \
-	defined(CONFIG_DESIGNWARE_WATCHDOG) || \
+	defined(CONFIG_WDT_DW) || \
 	defined(CONFIG_IMX_WATCHDOG))
 	hw_watchdog_init();
 	puts("       Watchdog enabled\n");

drivers/watchdog/Makefile +1 -1

index 68c989aa0b..a14fdabf8d 100644
@@ -13,7 +13,6 @@ endif
 obj-$(CONFIG_S5P)               += s5p_wdt.o
 obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
 obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
-obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
 obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
 obj-$(CONFIG_WDT) += wdt-uclass.o
 obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o

@@ -23,6 +22,7 @@ obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
 obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
 obj-$(CONFIG_WDT_ORION) += orion_wdt.o
 obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_DW) += dw_wdt.o
 obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
 obj-$(CONFIG_WDT_MTK) += mtk_wdt.o

drivers/watchdog/dw_wdt.c renamed from drivers/watchdog/designware_wdt.c +0 -0

similarity index 100%
rename from drivers/watchdog/designware_wdt.c
rename to drivers/watchdog/dw_wdt.c

include/configs/socfpga_common.h +1 -1

index d1034ac280..65f02eca2e 100644
@@ -105,7 +105,7 @@
  * L4 Watchdog
  */
 #ifdef CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
 #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
 #define CONFIG_DW_WDT_CLOCK_KHZ		25000
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS	30000

include/configs/socfpga_stratix10_socdk.h +1 -1

index 8d2971c6e2..3582aec822 100644
@@ -161,7 +161,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  */
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
 #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
 #ifndef __ASSEMBLY__
 unsigned int cm_get_l4_sys_free_clk_hz(void);

scripts/config_whitelist.txt +1 -1

index e616f7229b..f2453728c6 100644
@@ -323,7 +323,7 @@ CONFIG_DEFAULT_IMMR
 CONFIG_DEF_HWCONFIG
 CONFIG_DELAY_ENVIRONMENT
 CONFIG_DESIGNWARE_ETH
-CONFIG_DESIGNWARE_WATCHDOG
+CONFIG_WDT_DW
 CONFIG_DEVELOP
 CONFIG_DEVICE_TREE_LIST
 CONFIG_DFU_ALT

Signature · 1 line

2.18.0.321.gffc6fa0e3

Kever Yang

2019-08-05 12:40 UTC #26 lore raw

Re: [PATCH 09/15] wdt: dw: Rename to dw_wdt.c

Quoted 86 lines · Jagan Teki

- use dw instead of designware for driver file since Linux following the same.
- add CONFIG macro start with CONFIG_WDT since the driver mode wdt drivers follow this.

Cc Dinh Nguyen <[email protected]>

Cc Chin-Liang See <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
  common/board_f.c                                | 2 +-
  drivers/watchdog/Makefile                       | 2 +-
  drivers/watchdog/{designware_wdt.c => dw_wdt.c} | 0
  include/configs/socfpga_common.h                | 2 +-
  include/configs/socfpga_stratix10_socdk.h       | 2 +-
  scripts/config_whitelist.txt                    | 2 +-
  6 files changed, 5 insertions(+), 5 deletions(-)

rename drivers/watchdog/{designware_wdt.c => dw_wdt.c} (100%)

common/board_f.c +1 -1

index 4760d728f3..79efef0792 100644
@@ -95,7 +95,7 @@ static int init_func_watchdog_init(void)
  # if defined(CONFIG_HW_WATCHDOG) && \
  	(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  	defined(CONFIG_SH) || \
-	defined(CONFIG_DESIGNWARE_WATCHDOG) || \
+	defined(CONFIG_WDT_DW) || \
  	defined(CONFIG_IMX_WATCHDOG))
  	hw_watchdog_init();
  	puts("       Watchdog enabled\n");

drivers/watchdog/Makefile +1 -1

index 68c989aa0b..a14fdabf8d 100644
@@ -13,7 +13,6 @@ endif
  obj-$(CONFIG_S5P)               += s5p_wdt.o
  obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
  obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
-obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
  obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
  obj-$(CONFIG_WDT) += wdt-uclass.o
  obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o

@@ -23,6 +22,7 @@ obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
  obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
  obj-$(CONFIG_WDT_ORION) += orion_wdt.o
  obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_DW) += dw_wdt.o
  obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
  obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
  obj-$(CONFIG_WDT_MTK) += mtk_wdt.o

drivers/watchdog/dw_wdt.c renamed from drivers/watchdog/designware_wdt.c +0 -0

similarity index 100%
rename from drivers/watchdog/designware_wdt.c
rename to drivers/watchdog/dw_wdt.c

include/configs/socfpga_common.h +1 -1

index d1034ac280..65f02eca2e 100644
@@ -105,7 +105,7 @@
   * L4 Watchdog
   */
  #ifdef CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
  #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
  #define CONFIG_DW_WDT_CLOCK_KHZ		25000
  #define CONFIG_WATCHDOG_TIMEOUT_MSECS	30000

include/configs/socfpga_stratix10_socdk.h +1 -1

index 8d2971c6e2..3582aec822 100644
@@ -161,7 +161,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
   */
  #ifdef CONFIG_SPL_BUILD
  #define CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
  #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
  #ifndef __ASSEMBLY__
  unsigned int cm_get_l4_sys_free_clk_hz(void);

scripts/config_whitelist.txt +0 -0

index e616f7229b..f2453728c6 100644

scripts/config_whitelist.txt CONFIG_DEFAULT_IMMR · line 326

Quoted 5 lines

scripts/config_whitelist.txt +1 -1

@@ -323,7 +323,7 @@ CONFIG_DEFAULT_IMMR
  CONFIG_DEF_HWCONFIG
  CONFIG_DELAY_ENVIRONMENT
  CONFIG_DESIGNWARE_ETH
-CONFIG_DESIGNWARE_WATCHDOG
+CONFIG_WDT_DW

Is it better to define a WDT_DW in drivers/watchdog/Kconfig so that we don't need

this white list?

Thanks,

- Kever

scripts/config_whitelist.txt CONFIG_DEFAULT_IMMR · line 329

Quoted 3 lines

scripts/config_whitelist.txt +0 -0

  CONFIG_DEVELOP
  CONFIG_DEVICE_TREE_LIST
  CONFIG_DFU_ALT

_______________________________________________
U-Boot mailing list
[email protected]
https://lists.denx.de/listinfo/u-boot

A message that is not in the archive (sent off-list or not yet received): e7507f4e-de8d-e61c-5538-0a3cc203ceba-TNX95d0MmH7DzftRWevZcw@public.gmane.org

Jagan Teki

2019-08-14 09:44 UTC #28 lore raw

Re: [PATCH 09/15] wdt: dw: Rename to dw_wdt.c

Quoted 98 lines · Kever Yang

Quoted 86 lines · Jagan Teki

- use dw instead of designware for driver file since Linux following the same.
- add CONFIG macro start with CONFIG_WDT since the driver mode wdt drivers follow this.

Cc Dinh Nguyen <[email protected]>

Cc Chin-Liang See <[email protected]>

Signed-off-by Jagan Teki <[email protected]>

---
  common/board_f.c                                | 2 +-
  drivers/watchdog/Makefile                       | 2 +-
  drivers/watchdog/{designware_wdt.c => dw_wdt.c} | 0
  include/configs/socfpga_common.h                | 2 +-
  include/configs/socfpga_stratix10_socdk.h       | 2 +-
  scripts/config_whitelist.txt                    | 2 +-
  6 files changed, 5 insertions(+), 5 deletions(-)

rename drivers/watchdog/{designware_wdt.c => dw_wdt.c} (100%)

common/board_f.c +1 -1

index 4760d728f3..79efef0792 100644
@@ -95,7 +95,7 @@ static int init_func_watchdog_init(void)
  # if defined(CONFIG_HW_WATCHDOG) && \
      (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
      defined(CONFIG_SH) || \
-     defined(CONFIG_DESIGNWARE_WATCHDOG) || \
+     defined(CONFIG_WDT_DW) || \
      defined(CONFIG_IMX_WATCHDOG))
      hw_watchdog_init();
      puts("       Watchdog enabled\n");

drivers/watchdog/Makefile +1 -1

index 68c989aa0b..a14fdabf8d 100644
@@ -13,7 +13,6 @@ endif
  obj-$(CONFIG_S5P)               += s5p_wdt.o
  obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
  obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
-obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
  obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
  obj-$(CONFIG_WDT) += wdt-uclass.o
  obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o

@@ -23,6 +22,7 @@ obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
  obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
  obj-$(CONFIG_WDT_ORION) += orion_wdt.o
  obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_DW) += dw_wdt.o
  obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
  obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
  obj-$(CONFIG_WDT_MTK) += mtk_wdt.o

drivers/watchdog/dw_wdt.c renamed from drivers/watchdog/designware_wdt.c +0 -0

similarity index 100%
rename from drivers/watchdog/designware_wdt.c
rename to drivers/watchdog/dw_wdt.c

include/configs/socfpga_common.h +1 -1

index d1034ac280..65f02eca2e 100644
@@ -105,7 +105,7 @@
   * L4 Watchdog
   */
  #ifdef CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
  #define CONFIG_DW_WDT_BASE          SOCFPGA_L4WD0_ADDRESS
  #define CONFIG_DW_WDT_CLOCK_KHZ             25000
  #define CONFIG_WATCHDOG_TIMEOUT_MSECS       30000

include/configs/socfpga_stratix10_socdk.h +1 -1

index 8d2971c6e2..3582aec822 100644
@@ -161,7 +161,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
   */
  #ifdef CONFIG_SPL_BUILD
  #define CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_WDT_DW
  #define CONFIG_DW_WDT_BASE          SOCFPGA_L4WD0_ADDRESS
  #ifndef __ASSEMBLY__
  unsigned int cm_get_l4_sys_free_clk_hz(void);

scripts/config_whitelist.txt +0 -0

index e616f7229b..f2453728c6 100644

scripts/config_whitelist.txt CONFIG_DEFAULT_IMMR · line 326

Quoted 5 lines

scripts/config_whitelist.txt +1 -1

@@ -323,7 +323,7 @@ CONFIG_DEFAULT_IMMR
  CONFIG_DEF_HWCONFIG
  CONFIG_DELAY_ENVIRONMENT
  CONFIG_DESIGNWARE_ETH
-CONFIG_DESIGNWARE_WATCHDOG
+CONFIG_WDT_DW

Is it better to define a WDT_DW in drivers/watchdog/Kconfig so that we don't need

Quoted 1 line

this white list?

11/15 path doing the same, this make sure not to break the configs which doesn't enable DM_WDT.

_______________________________________________
Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip

Jagan Teki

2019-07-29 07:47 UTC #29 lore raw

PATCH 10/15 rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog

In reply to a message not in the archive

Add u-boot,dm-pre-reloc property for watchdog in rk3399-u-boot.dtsi so-that SPL can access watchdog.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 arch/arm/dts/rk3399-u-boot.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

arch/arm/dts/rk3399-u-boot.dtsi +6 -0

index 2738a3889e..54286b585b 100644
@@ -3,6 +3,12 @@
  * Copyright (C) 2019 Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
  */
 
+/ {
+	watchdog@ff848000 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
 &pmu {
 	u-boot,dm-pre-reloc;
 };

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

2019-07-29 07:47 UTC #30 lore raw

PATCH 11/15 wdt: Kconfig: Add WDT_DW entry

In reply to a message not in the archive

Add Kconfig entry for CONFIG_WDT_DW, and it indeed depends on DM WDT.

So, it can be avialable on particular board defconfig only if they switch to use DW driver model code.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 drivers/watchdog/Kconfig     | 9 +++++++++
 scripts/config_whitelist.txt | 1 -
 2 files changed, 9 insertions(+), 1 deletion(-)

drivers/watchdog/Kconfig +9 -0

index ee0ddffe73..0b64298016 100644
@@ -100,6 +100,15 @@ config WDT_CDNS
 	   Select this to enable Cadence watchdog timer, which can be found on some
 	   Xilinx Microzed Platform.
 
+config WDT_DW
+	bool "Synopsys DesignWare watchdog"
+	depends on WDT
+	default y if ROCKCHIP_RK3399
+	imply WATCHDOG
+	help
+	  Say Y here if to include support for the Synopsys DesignWare
+	  watchdog timer found in many chips.
+
 config WDT_MPC8xx
 	bool "MPC8xx watchdog timer support"
 	depends on WDT && MPC8xx

scripts/config_whitelist.txt +0 -1

index f2453728c6..47e42e680a 100644
@@ -323,7 +323,6 @@ CONFIG_DEFAULT_IMMR
 CONFIG_DEF_HWCONFIG
 CONFIG_DELAY_ENVIRONMENT
 CONFIG_DESIGNWARE_ETH
-CONFIG_WDT_DW
 CONFIG_DEVELOP
 CONFIG_DEVICE_TREE_LIST
 CONFIG_DFU_ALT

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

2019-07-29 07:47 UTC #31 lore raw

PATCH 12/15 include: rk3399: Disable watchdog in TPL

In reply to a message not in the archive

Disable watchdog for TPL, since there is no support it.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 include/configs/rk3399_common.h | 5 +++++
 1 file changed, 5 insertions(+)

include/configs/rk3399_common.h +5 -0

index 8df0180284..67b48e03ba 100644
@@ -46,6 +46,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000
 
+#ifdef CONFIG_TPL_BUILD
+# undef CONFIG_WDT
+# undef CONFIG_WATCHDOG
+#endif
+
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \

Signature · 1 line

2.18.0.321.gffc6fa0e3

A message that is not in the archive (sent off-list or not yet received): 20190729074711.16988-13-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org

Kever Yang

2019-08-05 12:43 UTC #33 lore raw

Re: [PATCH 12/15] include: rk3399: Disable watchdog in TPL

Quoted 12 lines · Jagan Teki

Disable watchdog for TPL, since there is no support it.
Signed-off-by Jagan Teki <[email protected]>
---
  include/configs/rk3399_common.h | 5 +++++
  1 file changed, 5 insertions(+)
include/configs/rk3399_common.h +0 -0
index 8df0180284..67b48e03ba 100644

include/configs/rk3399_common.h line 52

Quoted 7 lines

include/configs/rk3399_common.h +4 -0

@@ -46,6 +46,11 @@
  #define CONFIG_SYS_SDRAM_BASE		0
  #define SDRAM_MAX_SIZE			0xf8000000
 
+#ifdef CONFIG_TPL_BUILD
+# undef CONFIG_WDT
+# undef CONFIG_WATCHDOG
+#endif

It will be better to use CONFIG_${SPL_TPL}WDT in watchdog Makefile,

because all the SoC needs treat this driver separate in TPL/SPL/U-Boot proper.

Thanks,

- Kever

include/configs/rk3399_common.h line 56

Quoted 4 lines

include/configs/rk3399_common.h +1 -0

+
  #ifndef CONFIG_SPL_BUILD
 
  #define ENV_MEM_LAYOUT_SETTINGS \

_______________________________________________
Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip

Jagan Teki

author

2019-08-25 20:14 UTC #34 lore raw

Re: [PATCH 12/15] include: rk3399: Disable watchdog in TPL

Quoted 26 lines · Kever Yang

Quoted 12 lines · Jagan Teki
Disable watchdog for TPL, since there is no support it.
Signed-off-by Jagan Teki <[email protected]>
---
  include/configs/rk3399_common.h | 5 +++++
  1 file changed, 5 insertions(+)
include/configs/rk3399_common.h +0 -0
index 8df0180284..67b48e03ba 100644
include/configs/rk3399_common.h line 52
Quoted 7 lines
include/configs/rk3399_common.h +4 -0
@@ -46,6 +46,11 @@
  #define CONFIG_SYS_SDRAM_BASE               0
  #define SDRAM_MAX_SIZE                      0xf8000000
 
+#ifdef CONFIG_TPL_BUILD
+# undef CONFIG_WDT
+# undef CONFIG_WATCHDOG
+#endif
It will be better to use CONFIG_${SPL_TPL}WDT in watchdog Makefile,

Quoted 2 lines

because all the SoC needs treat this driver separate in TPL/SPL/U-Boot proper.

Enabling TPL (via DM or so) cannot be an optimal solutions as of now, since if it continuously resetting we need to take boot switch based on bootcount, ie possible with SPL and U-Boot proper now. Making a boot switch to TPL might increase code size, so will check this decision later based on the requirement.
_______________________________________________
U-Boot mailing list
[email protected]
https://lists.denx.de/listinfo/u-boot

Kever Yang

2019-08-26 01:34 UTC #35 lore raw

Re: [PATCH 12/15] include: rk3399: Disable watchdog in TPL

Jagan,

Quoted 25 lines · Jagan Teki

Quoted 24 lines · Kever Yang
Quoted 12 lines · Jagan Teki
Disable watchdog for TPL, since there is no support it.
Signed-off-by Jagan Teki <[email protected]>
---
   include/configs/rk3399_common.h | 5 +++++
   1 file changed, 5 insertions(+)
include/configs/rk3399_common.h +0 -0
index 8df0180284..67b48e03ba 100644
include/configs/rk3399_common.h line 52
Quoted 7 lines
include/configs/rk3399_common.h +4 -0
@@ -46,6 +46,11 @@
   #define CONFIG_SYS_SDRAM_BASE               0
   #define SDRAM_MAX_SIZE                      0xf8000000
 
+#ifdef CONFIG_TPL_BUILD
+# undef CONFIG_WDT
+# undef CONFIG_WATCHDOG
+#endif
It will be better to use CONFIG_${SPL_TPL}WDT in watchdog Makefile,

Quoted 3 lines

Quoted 2 lines
because all the SoC needs treat this driver separate in TPL/SPL/U-Boot proper.
Enabling TPL (via DM or so) cannot be an optimal solutions as of now,

I'm not suggesting enable WDT in TPL, but only about how the WDT module is enabled in Makefile system;

If useing CONFIG_${SPL_TPL}WDT in Makefile, then the WDT is not enabled in TPL if there is no

CONFIG_TPL_WDT, so you don't have to write the 'undef ...' code for CONFIG_TPL_BUILD.

Thanks,

- Kever

Quoted 5 lines

since if it continuously resetting we need to take boot switch based on bootcount, ie possible with SPL and U-Boot proper now. Making a boot switch to TPL might increase code size, so will check this decision later based on the requirement.

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Jagan Teki

2019-07-29 07:47 UTC #36 lore raw

PATCH 13/15 rk3399: rockpro64: Enable watchdog

In reply to a message not in the archive

Enable watchdog in SPL and U-Boot proper for Rockpro64.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 configs/rockpro64-rk3399_defconfig | 2 ++
 1 file changed, 2 insertions(+)

configs/rockpro64-rk3399_defconfig +2 -0

index 32d8415b23..f604ccc1ec 100644
@@ -55,3 +55,5 @@ CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_WDT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y

Signature · 1 line

2.18.0.321.gffc6fa0e3

Jagan Teki

2019-07-29 07:47 UTC #37 lore raw

PATCH 14/15 rockchip: rk3399: Add bootcount support

In reply to a message not in the archive

Add bootcount support for Rockchip rk3399.

The bootcount value is preserved in PMU_SYS_REG0 register, this would help to support redundent boot.

Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 arch/arm/mach-rockchip/Kconfig        |  2 ++
 arch/arm/mach-rockchip/rk3399/Kconfig | 10 ++++++++++
 include/configs/rk3399_common.h       |  5 ++++-
 3 files changed, 16 insertions(+), 1 deletion(-)

arch/arm/mach-rockchip/Kconfig +2 -0

index 17f31e89f3..dd5055ed69 100644
@@ -184,6 +184,8 @@ config ROCKCHIP_RK3399
 	imply TPL_CLK
 	imply TPL_TINY_MEMSET
 	imply TPL_ROCKCHIP_COMMON_BOARD
+	imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
+	imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.

arch/arm/mach-rockchip/rk3399/Kconfig +10 -0

index 6660d05349..68ac913bcb 100644
@@ -91,6 +91,16 @@ config TPL_STACK
 config TPL_TEXT_BASE
         default 0xff8c2000
 
+if BOOTCOUNT_LIMIT
+
+config BOOTCOUNT_BOOTLIMIT
+	default 3
+
+config SYS_BOOTCOUNT_ADDR
+	default 0xff3100f0	# PMU_SYS_REG0
+
+endif # BOOTCOUNT_LIMIT
+
 source "board/rockchip/evb_rk3399/Kconfig"
 source "board/theobroma-systems/puma_rk3399/Kconfig"
 source "board/vamrs/rock960_rk3399/Kconfig"

include/configs/rk3399_common.h +4 -1

index 67b48e03ba..ace82928d1 100644
@@ -70,7 +70,10 @@
 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
-	BOOTENV
+	BOOTENV \
+	"altbootcmd=" \
+		"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
+		"run distro_bootcmd\0"
 
 #endif

Signature · 1 line

2.18.0.321.gffc6fa0e3

Kever Yang

2019-08-12 12:16 UTC #38 lore raw

Re: [PATCH 14/15] rockchip: rk3399: Add bootcount support

Hi Jagan,

Quoted 3 lines · Jagan Teki

Add bootcount support for Rockchip rk3399.
The bootcount value is preserved in PMU_SYS_REG0 register,

PMU_SYS_REG0 has been used by other case in Rockchip, we don't recommend to use it, the PMUGRF_OS_REG3 is still reserved now, could you use it instead?

Thanks,
- Kever

Quoted 54 lines

this would help to support redundent boot.

Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required.

Signed-off-by Jagan Teki <[email protected]>

---
  arch/arm/mach-rockchip/Kconfig        |  2 ++
  arch/arm/mach-rockchip/rk3399/Kconfig | 10 ++++++++++
  include/configs/rk3399_common.h       |  5 ++++-
  3 files changed, 16 insertions(+), 1 deletion(-)

arch/arm/mach-rockchip/Kconfig +2 -0

index 17f31e89f3..dd5055ed69 100644
@@ -184,6 +184,8 @@ config ROCKCHIP_RK3399
  	imply TPL_CLK
  	imply TPL_TINY_MEMSET
  	imply TPL_ROCKCHIP_COMMON_BOARD
+	imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
+	imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
  	help
  	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
  	  and quad-core Cortex-A53.

arch/arm/mach-rockchip/rk3399/Kconfig +10 -0

index 6660d05349..68ac913bcb 100644
@@ -91,6 +91,16 @@ config TPL_STACK
  config TPL_TEXT_BASE
          default 0xff8c2000
 
+if BOOTCOUNT_LIMIT
+
+config BOOTCOUNT_BOOTLIMIT
+	default 3
+
+config SYS_BOOTCOUNT_ADDR
+	default 0xff3100f0	# PMU_SYS_REG0
+
+endif # BOOTCOUNT_LIMIT
+
  source "board/rockchip/evb_rk3399/Kconfig"
  source "board/theobroma-systems/puma_rk3399/Kconfig"
  source "board/vamrs/rock960_rk3399/Kconfig"

include/configs/rk3399_common.h +0 -0

index 67b48e03ba..ace82928d1 100644
@@ -70,7 +70,10 @@
  	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \

include/configs/rk3399_common.h line 79

Quoted 10 lines

include/configs/rk3399_common.h +4 -1

  	"partitions=" PARTS_DEFAULT \
  	ROCKCHIP_DEVICE_SETTINGS \
-	BOOTENV
+	BOOTENV \
+	"altbootcmd=" \
+		"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
+		"run distro_bootcmd\0"
 
  #endif

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Kever Yang

2019-08-13 01:02 UTC #39 lore raw

Re: [PATCH 14/15] rockchip: rk3399: Add bootcount support【请注意，邮件由[email protected]代发】

Quoted 9 lines · Kever Yang

Hi Jagan,
Quoted 3 lines · Jagan Teki
Add bootcount support for Rockchip rk3399.
The bootcount value is preserved in PMU_SYS_REG0 register,
PMU_SYS_REG0 has been used by other case in Rockchip, we don't

Please ignore this mail, I mixing the registers in PMU and PMUGRF,

the PMU_SYS_REG0 is not used yet and you can use it.

Thanks,

- Kever

Quoted 65 lines

recommend to use it, the PMUGRF_OS_REG3 is still reserved now, could you use it instead?
Thanks,
- Kever
Quoted 59 lines
this would help to support redundent boot.
Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required.
Signed-off-by Jagan Teki <[email protected]>
---
arch/arm/mach-rockchip/Kconfig | 2 ++ arch/arm/mach-rockchip/rk3399/Kconfig | 10 ++++++++++ include/configs/rk3399_common.h | 5 ++++-
  3 files changed, 16 insertions(+), 1 deletion(-)
arch/arm/mach-rockchip/Kconfig +0 -0
index 17f31e89f3..dd5055ed69 100644
@@ -184,6 +184,8 @@ config ROCKCHIP_RK3399
      imply TPL_CLK
      imply TPL_TINY_MEMSET
      imply TPL_ROCKCHIP_COMMON_BOARD
+    imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
+    imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
      help
        The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53.
arch/arm/mach-rockchip/rk3399/Kconfig +0 -0
index 6660d05349..68ac913bcb 100644
@@ -91,6 +91,16 @@ config TPL_STACK
config TPL_TEXT_BASE
default 0xff8c2000
+if BOOTCOUNT_LIMIT
arch/arm/mach-rockchip/rk3399/Kconfig +9 -0
+
+config BOOTCOUNT_BOOTLIMIT
+    default 3
+
+config SYS_BOOTCOUNT_ADDR
+    default 0xff3100f0    # PMU_SYS_REG0
+
+endif # BOOTCOUNT_LIMIT
+
source "board/rockchip/evb_rk3399/Kconfig" source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig"
include/configs/rk3399_common.h +3 -1
index 67b48e03ba..ace82928d1 100644
@@ -70,7 +70,10 @@
       "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
       "partitions=" PARTS_DEFAULT \
       ROCKCHIP_DEVICE_SETTINGS \
-    BOOTENV
+    BOOTENV \
+    "altbootcmd=" \
+        "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \

Quoted 8 lines

include/configs/rk3399_common.h line 78
Quoted 2 lines
include/configs/rk3399_common.h +1 -0
+        "run distro_bootcmd\0"
     #endif
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Jagan Teki

2019-07-29 07:47 UTC #40 lore raw

PATCH 15/15 rk3399: rockpro64: Enable bootcount

In reply to a message not in the archive

Enable bootcount support for Rockpro64 boards, this would help to use it for redundent boot.

Signed-off-by Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

---
 configs/rockpro64-rk3399_defconfig | 1 +
 1 file changed, 1 insertion(+)

configs/rockpro64-rk3399_defconfig +1 -0

index f604ccc1ec..3f1cf21ca0 100644
@@ -57,3 +57,4 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_WDT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_BOOTCOUNT_LIMIT=y

Signature · 1 line

2.18.0.321.gffc6fa0e3

Kever Yang

2019-08-05 12:18 UTC #41 lore raw

In reply to Jagan Teki

Hi Jagan,

Quoted 6 lines · Jagan Teki

Boot redundancy is one of the key criteria for switch recovery or golden partition based on the bootcount value, which indeed very much needed in production systems on the fields.
This patchset support redundant boot on Rockchip rk3399.

Thanks for your patches, you will need to update your patches upon

latest mainline U-Boot.

Thanks,

- Kever

Quoted 96 lines

To make full functional redundancy below features would require from U-Boot level.
- bootcount, for counting number reboots
- altboot
- watchdog support, if SPL or U-Boot reset because of WDT
- add CPUINFO for more understanding about how SoC and reset reason.
patch 0001 - 0005: cpu info, reset reason
patch 0006 - 0009: designware watchdog driver, dm-conversion
patch 0010: Add watchdog property available to SPL
patch 0011: Add Kconfig option for dw_wdt.c
patch 0012: Disable watchdog for TPL
patch 0013: enable watchdog on rockpro64, overlay
patch 0014: bootcount support
patch 0015: enable bootcount on rockpro64, overlay
I would like, not to merge watchdog and bootcount on Mainline devboards since these features will mostly required on production devices but any comments, please share.
Any inputs?
Jagan.
Jagan Teki (15):
arm: rockchip: Add common cru.h
rockchip: Add cpu-info
rockchip: rk3288: Print reset reason
rockchip: Add common reset reason
rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO
wdt: designware: Simplify is_enabled function
wdt: designware: Simplify enable function
wdt: dw: Add driver-model support
wdt: dw: Rename to dw_wdt.c
rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog
wdt: Kconfig: Add WDT_DW entry
include: rk3399: Disable watchdog in TPL
[DO NOT MERGE] rk3399: rockpro64: Enable watchdog
rockchip: rk3399: Add bootcount support
[DO NOT MERGE] rk3399: rockpro64: Enable bootcount
  arch/arm/dts/rk3399-u-boot.dtsi               |   6 +
  arch/arm/include/asm/arch-rockchip/cru.h      |  28 +++
  .../include/asm/arch-rockchip/cru_rk3288.h    |  14 +-
  arch/arm/mach-rockchip/Kconfig                |   2 +
  arch/arm/mach-rockchip/Makefile               |   1 +
  arch/arm/mach-rockchip/cpu-info.c             |  65 +++++++
  arch/arm/mach-rockchip/rk3288-board.c         |  39 ----
  arch/arm/mach-rockchip/rk3288/clk_rk3288.c    |   2 +-
  arch/arm/mach-rockchip/rk3399-board-spl.c     |   2 +-
  arch/arm/mach-rockchip/rk3399/Kconfig         |  10 +
  arch/arm/mach-rockchip/rk3399/clk_rk3399.c    |   2 +-
  common/board_f.c                              |   2 +-
  configs/evb-rk3288_defconfig                  |   1 -
  configs/evb-rk3399_defconfig                  |   1 -
  configs/fennec-rk3288_defconfig               |   1 -
  configs/ficus-rk3399_defconfig                |   1 -
  configs/firefly-rk3288_defconfig              |   1 -
  configs/firefly-rk3399_defconfig              |   1 -
  configs/miqi-rk3288_defconfig                 |   1 -
  configs/nanopc-t4-rk3399_defconfig            |   1 -
  configs/nanopi-m4-rk3399_defconfig            |   1 -
  configs/nanopi-neo4-rk3399_defconfig          |   1 -
  configs/orangepi-rk3399_defconfig             |   1 -
  configs/phycore-rk3288_defconfig              |   1 -
  configs/popmetal-rk3288_defconfig             |   1 -
  configs/puma-rk3399_defconfig                 |   1 -
  configs/rock-pi-4-rk3399_defconfig            |   1 -
  configs/rock960-rk3399_defconfig              |   1 -
  configs/rockpro64-rk3399_defconfig            |   4 +-
  configs/tinker-rk3288_defconfig               |   1 -
  configs/vyasa-rk3288_defconfig                |   1 -
  drivers/clk/rockchip/clk_rk3288.c             |   2 +-
  drivers/clk/rockchip/clk_rk3399.c             |   2 +-
  drivers/ram/rockchip/sdram_rk3288.c           |   2 +-
  drivers/ram/rockchip/sdram_rk3399.c           |   2 +-
  drivers/video/rockchip/rk3288_mipi.c          |   2 +-
  drivers/video/rockchip/rk3399_mipi.c          |   2 +-
  drivers/video/rockchip/rk_mipi.c              |   2 +-
  drivers/watchdog/Kconfig                      |   9 +
  drivers/watchdog/Makefile                     |   2 +-
  drivers/watchdog/designware_wdt.c             |  73 -------
  drivers/watchdog/dw_wdt.c                     | 184 ++++++++++++++++++
  include/configs/rk3399_common.h               |  10 +-
  include/configs/socfpga_common.h              |   2 +-
  include/configs/socfpga_stratix10_socdk.h     |   2 +-
  scripts/config_whitelist.txt                  |   1 -
  46 files changed, 332 insertions(+), 160 deletions(-)

Quoted 5 lines

create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h create mode 100644 arch/arm/mach-rockchip/cpu-info.c delete mode 100644 drivers/watchdog/designware_wdt.c create mode 100644 drivers/watchdog/dw_wdt.c

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