clk fixes for v5.3-rc5

The following changes since commit e1f1ae8002e4b06addc52443fcd975bbf554ae92:

clk: renesas: cpg-mssr: Fix reset control race condition (2019-07-22 15:04:54 -0700)

are available in the Git repository at:

https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git tags/clk-fixes-for-linus

for you to fetch changes up to 24876f09a7dfe36a82f53d304d8c1bceb3257a0f:

clk: Fix potential NULL dereference in clk_fetch_parent_index() (2019-08-16 10:30:21 -0700)

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A couple fixes to the core framework logic that finds clk parents, a handful of samsung clk driver fixes for audio and display clks, and a small fix for the Stratix10 SoC driver that was checking the wrong register for validity.

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Dinh Nguyen (1):
clk: socfpga: stratix10: fix rate caclulationg for cnt_clks

Marek Szyprowski (1):
clk: samsung: exynos542x: Move MSCL subsystem clocks to its sub-CMU

Martin Blumenstingl (1):
clk: Fix potential NULL dereference in clk_fetch_parent_index()

Stephen Boyd (1):
clk: Fix falling back to legacy parent string matching

Sylwester Nawrocki (2):
clk: samsung: Change signature of exynos5_subcmus_init() function
clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMU

 drivers/clk/clk.c                        |  49 +++++++---
 drivers/clk/samsung/clk-exynos5-subcmu.c |  16 +--
 drivers/clk/samsung/clk-exynos5-subcmu.h |   2 +-
 drivers/clk/samsung/clk-exynos5250.c     |   7 +-
 drivers/clk/samsung/clk-exynos5420.c     | 162 +++++++++++++++++++++----------
 drivers/clk/socfpga/clk-periph-s10.c     |   2 +-
 6 files changed, 163 insertions(+), 75 deletions(-)

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