a few fixes for sprd's sd host controller
Subsystems (3)
Chunyan Zhang
reviewerv2 cover a few fixes for sprd's sd host controller
With this patch-set, both sd card and mmc can be setup. This patch-set was verified on Unisoc's Whale2 and another mobile phone platform SC9863A.
Changes from v1:
- Added Reviewed-by and Tested-by of Baolin;
- Added fixes tag for all patches in this series.
Chunyan Zhang (5):
mmc: sdhci-sprd: fixed incorrect clock divider
mmc: sdhci-sprd: add get_ro hook function
mmc: sdhci-sprd: add SDHCI_QUIRK2_PRESET_VALUE_BROKEN
mms: sdhci-sprd: add SDHCI_QUIRK_BROKEN_CARD_DETECTION
mmc: sdhci-sprd: clear the UHS-I modes read from registers
drivers/mmc/host/sdhci-sprd.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-)
Signature · 1 line
2.20.1
Chunyan Zhang
reviewerPATCH v2 1/5 mmc: sdhci-sprd: fixed incorrect clock divider
From: Chunyan Zhang <[email protected]>
The register SDHCI_CLOCK_CONTROL should be cleared before config clock divider, otherwise the frequency configured maybe lower than we expected.
controller")
--- drivers/mmc/host/sdhci-sprd.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
drivers/mmc/host/sdhci-sprd.c +4 -3
@@ -217,10 +217,11 @@ static inline void _sdhci_sprd_set_clock(struct sdhci_host *host,struct sdhci_sprd_host *sprd_host =TO_SPRD_HOST (host);u32 div, val, mask; - div =sdhci_sprd_calc_div (sprd_host->base_rate, clk); +sdhci_writew (host,0 ,SDHCI_CLOCK_CONTROL ); - clk |= ((div &0x300 ) >>2 ) | ((div &0xFF ) <<8 ); -sdhci_enable_clk (host, clk); + div =sdhci_sprd_calc_div (sprd_host->base_rate, clk); + div = ((div &0x300 ) >>2 ) | ((div &0xFF ) <<8 ); +sdhci_enable_clk (host, div);/* enable auto gate sdhc_enable_auto_gate */ val =sdhci_readl (host,SDHCI_SPRD_REG_32_BUSY_POSI );
Signature · 1 line
2.20.1
Chunyan Zhang
reviewerPATCH v2 2/5 mmc: sdhci-sprd: add get_ro hook function
In reply to Chunyan ZhangFrom: Chunyan Zhang <[email protected]>
sprd's sd host controller doesn't support write protect to sd card.
controller")
--- drivers/mmc/host/sdhci-sprd.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/mmc/host/sdhci-sprd.c +6 -0
@@ -374,6 +374,11 @@ static unsigned int sdhci_sprd_get_max_timeout_count(struct sdhci_host *host)return 1 <<31 ; } +static unsigned int sdhci_sprd_get_ro (struct sdhci_host *host) +{ +return 0 ; +} +static struct sdhci_ops sdhci_sprd_ops = { .read_l = sdhci_sprd_readl, .write_l = sdhci_sprd_writel,
@@ -386,6 +391,7 @@ static struct sdhci_ops sdhci_sprd_ops = { .set_uhs_signaling = sdhci_sprd_set_uhs_signaling, .hw_reset = sdhci_sprd_hw_reset, .get_max_timeout_count = sdhci_sprd_get_max_timeout_count, + .get_ro = sdhci_sprd_get_ro, };static void sdhci_sprd_request (struct mmc_host *mmc,struct mmc_request *mrq)
Signature · 1 line
2.20.1
Chunyan Zhang
reviewerPATCH v2 3/5 mmc: sdhci-sprd: add SDHCI_QUIRK2_PRESET_VALUE_BROKEN
In reply to Chunyan ZhangFrom: Chunyan Zhang <[email protected]>
The bit of PRESET_VAL_ENABLE in HOST_CONTROL2 register is reserved on sprd's sd host controller, set quirk2 to disable configuring this.
controller")
--- drivers/mmc/host/sdhci-sprd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci-sprd.c +2 -1
@@ -510,7 +510,8 @@ static void sdhci_sprd_phy_param_parse(struct sdhci_sprd_host *sprd_host,static const struct sdhci_pltfm_data sdhci_sprd_pdata = { .quirks =SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK , .quirks2 =SDHCI_QUIRK2_BROKEN_HS200 | -SDHCI_QUIRK2_USE_32BIT_BLK_CNT , +SDHCI_QUIRK2_USE_32BIT_BLK_CNT | +SDHCI_QUIRK2_PRESET_VALUE_BROKEN , .ops = &sdhci_sprd_ops, };
Signature · 1 line
2.20.1
Chunyan Zhang
reviewerPATCH v2 4/5 mms: sdhci-sprd: add SDHCI_QUIRK_BROKEN_CARD_DETECTION
In reply to Chunyan ZhangFrom: Chunyan Zhang <[email protected]>
sprd's sd host controller doesn't support detection to card insert or remove.
controller")
--- drivers/mmc/host/sdhci-sprd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci-sprd.c +2 -1
@@ -508,7 +508,8 @@ static void sdhci_sprd_phy_param_parse(struct sdhci_sprd_host *sprd_host, }static const struct sdhci_pltfm_data sdhci_sprd_pdata = { - .quirks =SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK , + .quirks =SDHCI_QUIRK_BROKEN_CARD_DETECTION | +SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK , .quirks2 =SDHCI_QUIRK2_BROKEN_HS200 |SDHCI_QUIRK2_USE_32BIT_BLK_CNT |SDHCI_QUIRK2_PRESET_VALUE_BROKEN ,
Signature · 1 line
2.20.1
Chunyan Zhang
reviewerPATCH v2 5/5 mmc: sdhci-sprd: clear the UHS-I modes read from registers
In reply to Chunyan ZhangFrom: Chunyan Zhang <[email protected]>
sprd's sd host controller supports SDR50/SDR104/DDR50 though, the UHS-I mode used by the specific card can be selected via devicetree only.
controller")
--- drivers/mmc/host/sdhci-sprd.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci-sprd.c +12 -1
@@ -509,7 +509,8 @@ static void sdhci_sprd_phy_param_parse(struct sdhci_sprd_host *sprd_host,static const struct sdhci_pltfm_data sdhci_sprd_pdata = { .quirks =SDHCI_QUIRK_BROKEN_CARD_DETECTION | -SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK , +SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | +SDHCI_QUIRK_MISSING_CAPS , .quirks2 =SDHCI_QUIRK2_BROKEN_HS200 |SDHCI_QUIRK2_USE_32BIT_BLK_CNT |SDHCI_QUIRK2_PRESET_VALUE_BROKEN ,
@@ -614,6 +615,16 @@ static int sdhci_sprd_probe(struct platform_device *pdev)sdhci_enable_v4_mode (host); +/* +* Supply the existing CAPS, but clear the UHS-I modes. This +* will allow these modes to be specified only by device +* tree properties through mmc_of_parse(). +*/ + host->caps =sdhci_readl (host,SDHCI_CAPABILITIES ); + host->caps1 =sdhci_readl (host,SDHCI_CAPABILITIES_1 ); + host->caps1 &= ~(SDHCI_SUPPORT_SDR50 |SDHCI_SUPPORT_SDR104 | +SDHCI_SUPPORT_DDR50 ); + ret =sdhci_setup_host (host);if (ret) goto pm_runtime_disable;
Signature · 1 line
2.20.1