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OpenRISC ethoc device tree fixes

PATCH New Stafford Horne 2 participants 4 messages Aug 31, 2019 – Sep 2, 2019

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Stafford Horne

author maintainer
#0 lore raw

cover OpenRISC ethoc device tree fixes

These patches fix up and add ethoc device support to the OpenRISC device tree definitions. These have been confirmed to work with qemu and can be tested as described on the qemu wiki:

https://wiki.qemu.org/Documentation/Platforms/OpenRISC

I plan to submit during the 5.4 merge window.

Stafford Horne (2):
or1k: dts: Fix ethoc network configuration in or1ksim devicetree
or1k: dts: Add ethoc device to SMP devicetree

 arch/openrisc/boot/dts/or1ksim.dts    | 5 +++--
 arch/openrisc/boot/dts/simple_smp.dts | 6 ++++++
 2 files changed, 9 insertions(+), 2 deletions(-)
Signature · 1 line
2.21.0
author maintainer
#1 lore raw

PATCH 1/2 or1k: dts: Fix ethoc network configuration in or1ksim devicetree

This fixes several issues with the ethoc network device config.

Fisrt off, the compatible property used an obsolete compatibility string; this caused the initialization to be skipped. Next, the register map was not given enough space to allocate ring descriptors, this caused module initialization to abort. Finally, we need to mark this device as big-endian as needed by openrisc.

This was tested by me in qemu, the setup is documented on the qemu wiki:

https://wiki.qemu.org/Documentation/Platforms/OpenRISC

---
 arch/openrisc/boot/dts/or1ksim.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
arch/openrisc/boot/dts/or1ksim.dts +3 -2
index d8aa8309c9d3..c0cb74e52f95 100644
@@ -49,8 +49,9 @@
 	};
 
 	enet0: ethoc@92000000 {
-		compatible = "opencores,ethmac-rtlsvn338";
-		reg = <0x92000000 0x100>;
+		compatible = "opencores,ethoc";
+		reg = <0x92000000 0x800>;
 		interrupts = <4>;
+		big-endian;
 	};
 };
Signature · 1 line
2.21.0
author maintainer
#2 lore raw

PATCH 2/2 or1k: dts: Add ethoc device to SMP devicetree

In reply to Stafford Horne

This patch adds the ethoc device configuration to the OpenRISC basic SMP device tree config. This was tested with qemu.

---
 arch/openrisc/boot/dts/simple_smp.dts | 6 ++++++
 1 file changed, 6 insertions(+)
arch/openrisc/boot/dts/simple_smp.dts +6 -0
index defbb92714ec..71af0e117bfe 100644
@@ -60,4 +60,10 @@
 		clock-frequency = <20000000>;
 	};
 
+	enet0: ethoc@92000000 {
+		compatible = "opencores,ethoc";
+		reg = <0x92000000 0x800>;
+		interrupts = <4>;
+		big-endian;
+	};
 };
Signature · 1 line
2.21.0
#3 lore raw

PATCH 2/2 or1k: dts: Add ethoc device to SMP devicetree

Hello All.
I've ported these ethernet description for my Atlys-based SoC. Prior to it Linux were not able even to detect Marvell's PHY. With the modifications Marvell's PHY is detected correctly. However, I still can not use ethernet connection. For example, If I try to execute "ping {ip-of-my-pc}" it reports "net eth0: TX: carrier sense lost". Perhaps, I have to configure correctly MDIO bus and PHY itself. Have anybody got an recommendation?

WBR
Andrey

-----Исходное сообщение-----
From: Stafford Horne
Sent: Saturday, August 31, 2019 6:03 AM
To: LKML
Cc: Mark Rutland ; Jonas Bonn ; devicetree at vger.kernel.org ; Rob Herring ; openrisc at lists.librecores.org
Subject: [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree

This patch adds the ethoc device configuration to the OpenRISC basic SMP device tree config. This was tested with qemu.

---
arch/openrisc/boot/dts/simple_smp.dts | 6 ++++++

1 file changed, 6 insertions(+)
(quoted diff) +0 -0

b/arch/openrisc/boot/dts/simple_smp.dts
index defbb92714ec..71af0e117bfe 100644

arch/openrisc/boot/dts/simple_smp.dts +6 -0
@@ -60,4 +60,10 @@
  clock-frequency = <20000000>;
  };
 
+ enet0: ethoc at 92000000 {
+ compatible = "opencores,ethoc";
+ reg = <0x92000000 0x800>;
+ interrupts = <4>;
+ big-endian;
+ };

};

Signature · 6 lines
2.21.0

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