hw/i386/pc: Split PIIX3 southbridge from i440FX northbridge

These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12.
Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code.

Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler.

Suggested-by Peter Maydell <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
  hw/acpi/piix4.c         | 40 ---------------------------------
  hw/intc/apic_common.c   | 49 -----------------------------------------
  hw/pci-host/piix.c      | 25 ---------------------
  hw/timer/i8254_common.c | 40 ---------------------------------
  4 files changed, 154 deletions(-)

hw/acpi/piix4.c +0 -40

index 5742c3df87..1d29d438c7 100644
@@ -42,7 +42,6 @@
  #include "hw/acpi/memory_hotplug.h"
  #include "hw/acpi/acpi_dev_interface.h"
  #include "hw/xen/xen.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
  #include "hw/core/cpu.h"
  #include "trace.h"

@@ -205,43 +204,6 @@ static const VMStateDescription vmstate_pci_status = {
      }
  };
 
-static int acpi_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    PIIX4PMState *s = opaque;
-    int ret, i;
-    uint16_t temp;
-
-    ret = pci_device_load(PCI_DEVICE(s), f);
-    if (ret < 0) {
-        return ret;
-    }
-    qemu_get_be16s(f, &s->ar.pm1.evt.sts);
-    qemu_get_be16s(f, &s->ar.pm1.evt.en);
-    qemu_get_be16s(f, &s->ar.pm1.cnt.cnt);
-
-    ret = vmstate_load_state(f, &vmstate_apm, &s->apm, 1);
-    if (ret) {
-        return ret;
-    }
-
-    timer_get(f, s->ar.tmr.timer);
-    qemu_get_sbe64s(f, &s->ar.tmr.overflow_time);
-
-    qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts);
-    for (i = 0; i < 3; i++) {
-        qemu_get_be16s(f, &temp);
-    }
-
-    qemu_get_be16s(f, (uint16_t *)s->ar.gpe.en);
-    for (i = 0; i < 3; i++) {
-        qemu_get_be16s(f, &temp);
-    }
-
-    ret = vmstate_load_state(f, &vmstate_pci_status,
-        &s->acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], 1);
-    return ret;
-}
-
  static bool vmstate_test_use_acpi_pci_hotplug(void *opaque, int version_id)
  {
      PIIX4PMState *s = opaque;

@@ -313,8 +275,6 @@ static const VMStateDescription vmstate_acpi = {
      .name = "piix4_pm",
      .version_id = 3,
      .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = acpi_load_old,
      .post_load = vmstate_acpi_post_load,
      .fields = (VMStateField[]) {
          VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState),

hw/intc/apic_common.c +0 -49

index aafd8e0e33..375cb6abe9 100644
@@ -31,7 +31,6 @@
  #include "sysemu/kvm.h"
  #include "hw/qdev-properties.h"
  #include "hw/sysbus.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
 
  static int apic_irq_delivered;

@@ -262,52 +261,6 @@ static void apic_reset_common(DeviceState *dev)
      apic_init_reset(dev);
  }
 
-/* This function is only used for old state version 1 and 2 */
-static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    APICCommonState *s = opaque;
-    APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
-    int i;
-
-    if (version_id > 2) {
-        return -EINVAL;
-    }
-
-    /* XXX: what if the base changes? (registered memory regions) */
-    qemu_get_be32s(f, &s->apicbase);
-    qemu_get_8s(f, &s->id);
-    qemu_get_8s(f, &s->arb_id);
-    qemu_get_8s(f, &s->tpr);
-    qemu_get_be32s(f, &s->spurious_vec);
-    qemu_get_8s(f, &s->log_dest);
-    qemu_get_8s(f, &s->dest_mode);
-    for (i = 0; i < 8; i++) {
-        qemu_get_be32s(f, &s->isr[i]);
-        qemu_get_be32s(f, &s->tmr[i]);
-        qemu_get_be32s(f, &s->irr[i]);
-    }
-    for (i = 0; i < APIC_LVT_NB; i++) {
-        qemu_get_be32s(f, &s->lvt[i]);
-    }
-    qemu_get_be32s(f, &s->esr);
-    qemu_get_be32s(f, &s->icr[0]);
-    qemu_get_be32s(f, &s->icr[1]);
-    qemu_get_be32s(f, &s->divide_conf);
-    s->count_shift = qemu_get_be32(f);
-    qemu_get_be32s(f, &s->initial_count);
-    s->initial_count_load_time = qemu_get_be64(f);
-    s->next_time = qemu_get_be64(f);
-
-    if (version_id >= 2) {
-        s->timer_expiry = qemu_get_be64(f);
-    }
-
-    if (info->post_load) {
-        info->post_load(s);
-    }
-    return 0;
-}
-
  static const VMStateDescription vmstate_apic_common;
 
  static void apic_common_realize(DeviceState *dev, Error **errp)

@@ -408,8 +361,6 @@ static const VMStateDescription vmstate_apic_common = {
      .name = "apic",
      .version_id = 3,
      .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = apic_load_old,
      .pre_load = apic_pre_load,
      .pre_save = apic_dispatch_pre_save,
      .post_load = apic_dispatch_post_load,

hw/pci-host/piix.c +0 -25

index 135c645535..2f4cbcbfe9 100644
@@ -33,7 +33,6 @@
  #include "qapi/error.h"
  #include "qemu/range.h"
  #include "hw/xen/xen.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
  #include "hw/pci-host/pam.h"
  #include "sysemu/reset.h"

@@ -174,28 +173,6 @@ static void i440fx_write_config(PCIDevice *dev,
      }
  }
 
-static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id)
-{
-    PCII440FXState *d = opaque;
-    PCIDevice *pd = PCI_DEVICE(d);
-    int ret, i;
-    uint8_t smm_enabled;
-
-    ret = pci_device_load(pd, f);
-    if (ret < 0)
-        return ret;
-    i440fx_update_memory_mappings(d);
-    qemu_get_8s(f, &smm_enabled);
-
-    if (version_id == 2) {
-        for (i = 0; i < PIIX_NUM_PIRQS; i++) {
-            qemu_get_be32(f); /* dummy load for compatibility */
-        }
-    }
-
-    return 0;
-}
-
  static int i440fx_post_load(void *opaque, int version_id)
  {
      PCII440FXState *d = opaque;

@@ -208,8 +185,6 @@ static const VMStateDescription vmstate_i440fx = {
      .name = "I440FX",
      .version_id = 3,
      .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = i440fx_load_old,
      .post_load = i440fx_post_load,
      .fields = (VMStateField[]) {
          VMSTATE_PCI_DEVICE(parent_obj, PCII440FXState),

hw/timer/i8254_common.c +0 -40

index 57bf10cc94..050875b497 100644
@@ -29,7 +29,6 @@
  #include "qemu/timer.h"
  #include "hw/timer/i8254.h"
  #include "hw/timer/i8254_internal.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
 
  /* val must be 0 or 1 */

@@ -202,43 +201,6 @@ static const VMStateDescription vmstate_pit_channel = {
      }
  };
 
-static int pit_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    PITCommonState *pit = opaque;
-    PITCommonClass *c = PIT_COMMON_GET_CLASS(pit);
-    PITChannelState *s;
-    int i;
-
-    if (version_id != 1) {
-        return -EINVAL;
-    }
-
-    for (i = 0; i < 3; i++) {
-        s = &pit->channels[i];
-        s->count = qemu_get_be32(f);
-        qemu_get_be16s(f, &s->latched_count);
-        qemu_get_8s(f, &s->count_latched);
-        qemu_get_8s(f, &s->status_latched);
-        qemu_get_8s(f, &s->status);
-        qemu_get_8s(f, &s->read_state);
-        qemu_get_8s(f, &s->write_state);
-        qemu_get_8s(f, &s->write_latch);
-        qemu_get_8s(f, &s->rw_mode);
-        qemu_get_8s(f, &s->mode);
-        qemu_get_8s(f, &s->bcd);
-        qemu_get_8s(f, &s->gate);
-        s->count_load_time = qemu_get_be64(f);
-        s->irq_disabled = 0;
-        if (i == 0) {
-            s->next_transition_time = qemu_get_be64(f);
-        }
-    }
-    if (c->post_load) {
-        c->post_load(pit);
-    }
-    return 0;
-}
-
  static int pit_dispatch_pre_save(void *opaque)
  {
      PITCommonState *s = opaque;

@@ -266,8 +228,6 @@ static const VMStateDescription vmstate_pit_common = {
      .name = "i8254",
      .version_id = 3,
      .minimum_version_id = 2,
-    .minimum_version_id_old = 1,
-    .load_state_old = pit_load_old,
      .pre_save = pit_dispatch_pre_save,
      .post_load = pit_dispatch_post_load,
      .fields = (VMStateField[]) {

I forgot to Cc David and Daniel for this one.

Quoted 71 lines · Philippe Mathieu-Daudé

These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12.
Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code.

Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler.

Suggested-by Peter Maydell <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
  hw/acpi/piix4.c         | 40 ---------------------------------
  hw/intc/apic_common.c   | 49 -----------------------------------------
  hw/pci-host/piix.c      | 25 ---------------------
  hw/timer/i8254_common.c | 40 ---------------------------------
  4 files changed, 154 deletions(-)

hw/acpi/piix4.c +0 -38

index 5742c3df87..1d29d438c7 100644
@@ -42,7 +42,6 @@
  #include "hw/acpi/memory_hotplug.h"
  #include "hw/acpi/acpi_dev_interface.h"
  #include "hw/xen/xen.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
  #include "hw/core/cpu.h"
  #include "trace.h"

@@ -205,43 +204,6 @@ static const VMStateDescription vmstate_pci_status = {
      }
  };
-static int acpi_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    PIIX4PMState *s = opaque;
-    int ret, i;
-    uint16_t temp;
-
-    ret = pci_device_load(PCI_DEVICE(s), f);
-    if (ret < 0) {
-        return ret;
-    }
-    qemu_get_be16s(f, &s->ar.pm1.evt.sts);
-    qemu_get_be16s(f, &s->ar.pm1.evt.en);
-    qemu_get_be16s(f, &s->ar.pm1.cnt.cnt);
-
-    ret = vmstate_load_state(f, &vmstate_apm, &s->apm, 1);
-    if (ret) {
-        return ret;
-    }
-
-    timer_get(f, s->ar.tmr.timer);
-    qemu_get_sbe64s(f, &s->ar.tmr.overflow_time);
-
-    qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts);
-    for (i = 0; i < 3; i++) {
-        qemu_get_be16s(f, &temp);
-    }
-
-    qemu_get_be16s(f, (uint16_t *)s->ar.gpe.en);
-    for (i = 0; i < 3; i++) {
-        qemu_get_be16s(f, &temp);
-    }
-
-    ret = vmstate_load_state(f, &vmstate_pci_status,
-        &s->acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], 1);
-    return ret;
-}
-
  static bool vmstate_test_use_acpi_pci_hotplug(void *opaque, int version_id)

hw/acpi/piix4.c static const VMStateDescription vmstate_acpi = { · line 317

Quoted 8 lines

hw/acpi/piix4.c +0 -2

  {
      PIIX4PMState *s = opaque;

@@ -313,8 +275,6 @@ static const VMStateDescription vmstate_acpi = {
      .name = "piix4_pm",
      .version_id = 3,
      .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = acpi_load_old,

Quoted 63 lines

hw/acpi/piix4.c +0 -0

      .post_load = vmstate_acpi_post_load,
      .fields = (VMStateField[]) {
          VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState),

hw/intc/apic_common.c +0 -47

index aafd8e0e33..375cb6abe9 100644
@@ -31,7 +31,6 @@
  #include "sysemu/kvm.h"
  #include "hw/qdev-properties.h"
  #include "hw/sysbus.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
  static int apic_irq_delivered;

@@ -262,52 +261,6 @@ static void apic_reset_common(DeviceState *dev)
      apic_init_reset(dev);
  }
-/* This function is only used for old state version 1 and 2 */
-static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    APICCommonState *s = opaque;
-    APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
-    int i;
-
-    if (version_id > 2) {
-        return -EINVAL;
-    }
-
-    /* XXX: what if the base changes? (registered memory regions) */
-    qemu_get_be32s(f, &s->apicbase);
-    qemu_get_8s(f, &s->id);
-    qemu_get_8s(f, &s->arb_id);
-    qemu_get_8s(f, &s->tpr);
-    qemu_get_be32s(f, &s->spurious_vec);
-    qemu_get_8s(f, &s->log_dest);
-    qemu_get_8s(f, &s->dest_mode);
-    for (i = 0; i < 8; i++) {
-        qemu_get_be32s(f, &s->isr[i]);
-        qemu_get_be32s(f, &s->tmr[i]);
-        qemu_get_be32s(f, &s->irr[i]);
-    }
-    for (i = 0; i < APIC_LVT_NB; i++) {
-        qemu_get_be32s(f, &s->lvt[i]);
-    }
-    qemu_get_be32s(f, &s->esr);
-    qemu_get_be32s(f, &s->icr[0]);
-    qemu_get_be32s(f, &s->icr[1]);
-    qemu_get_be32s(f, &s->divide_conf);
-    s->count_shift = qemu_get_be32(f);
-    qemu_get_be32s(f, &s->initial_count);
-    s->initial_count_load_time = qemu_get_be64(f);
-    s->next_time = qemu_get_be64(f);
-
-    if (version_id >= 2) {
-        s->timer_expiry = qemu_get_be64(f);
-    }
-
-    if (info->post_load) {
-        info->post_load(s);
-    }
-    return 0;
-}
-

hw/intc/apic_common.c static const VMStateDescription vmstate_apic_common = { · line 412

Quoted 8 lines

hw/intc/apic_common.c +0 -2

  static const VMStateDescription vmstate_apic_common;
  static void apic_common_realize(DeviceState *dev, Error **errp)

@@ -408,8 +361,6 @@ static const VMStateDescription vmstate_apic_common = {
      .name = "apic",
      .version_id = 3,
      .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = apic_load_old,

Quoted 41 lines

hw/intc/apic_common.c +0 -0

      .pre_load = apic_pre_load,
      .pre_save = apic_dispatch_pre_save,
      .post_load = apic_dispatch_post_load,

hw/pci-host/piix.c +0 -23

index 135c645535..2f4cbcbfe9 100644
@@ -33,7 +33,6 @@
  #include "qapi/error.h"
  #include "qemu/range.h"
  #include "hw/xen/xen.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
  #include "hw/pci-host/pam.h"
  #include "sysemu/reset.h"

@@ -174,28 +173,6 @@ static void i440fx_write_config(PCIDevice *dev,
      }
  }
-static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id)
-{
-    PCII440FXState *d = opaque;
-    PCIDevice *pd = PCI_DEVICE(d);
-    int ret, i;
-    uint8_t smm_enabled;
-
-    ret = pci_device_load(pd, f);
-    if (ret < 0)
-        return ret;
-    i440fx_update_memory_mappings(d);
-    qemu_get_8s(f, &smm_enabled);
-
-    if (version_id == 2) {
-        for (i = 0; i < PIIX_NUM_PIRQS; i++) {
-            qemu_get_be32(f); /* dummy load for compatibility */
-        }
-    }
-
-    return 0;
-}
-
  static int i440fx_post_load(void *opaque, int version_id)

hw/pci-host/piix.c static const VMStateDescription vmstate_i440fx = { · line 212

Quoted 8 lines

hw/pci-host/piix.c +0 -2

  {
      PCII440FXState *d = opaque;

@@ -208,8 +185,6 @@ static const VMStateDescription vmstate_i440fx = {
      .name = "I440FX",
      .version_id = 3,
      .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = i440fx_load_old,

Quoted 55 lines

hw/pci-host/piix.c +0 -0

      .post_load = i440fx_post_load,
      .fields = (VMStateField[]) {
          VMSTATE_PCI_DEVICE(parent_obj, PCII440FXState),

hw/timer/i8254_common.c +0 -38

index 57bf10cc94..050875b497 100644
@@ -29,7 +29,6 @@
  #include "qemu/timer.h"
  #include "hw/timer/i8254.h"
  #include "hw/timer/i8254_internal.h"
-#include "migration/qemu-file-types.h"
  #include "migration/vmstate.h"
  /* val must be 0 or 1 */

@@ -202,43 +201,6 @@ static const VMStateDescription vmstate_pit_channel = {
      }
  };
-static int pit_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    PITCommonState *pit = opaque;
-    PITCommonClass *c = PIT_COMMON_GET_CLASS(pit);
-    PITChannelState *s;
-    int i;
-
-    if (version_id != 1) {
-        return -EINVAL;
-    }
-
-    for (i = 0; i < 3; i++) {
-        s = &pit->channels[i];
-        s->count = qemu_get_be32(f);
-        qemu_get_be16s(f, &s->latched_count);
-        qemu_get_8s(f, &s->count_latched);
-        qemu_get_8s(f, &s->status_latched);
-        qemu_get_8s(f, &s->status);
-        qemu_get_8s(f, &s->read_state);
-        qemu_get_8s(f, &s->write_state);
-        qemu_get_8s(f, &s->write_latch);
-        qemu_get_8s(f, &s->rw_mode);
-        qemu_get_8s(f, &s->mode);
-        qemu_get_8s(f, &s->bcd);
-        qemu_get_8s(f, &s->gate);
-        s->count_load_time = qemu_get_be64(f);
-        s->irq_disabled = 0;
-        if (i == 0) {
-            s->next_transition_time = qemu_get_be64(f);
-        }
-    }
-    if (c->post_load) {
-        c->post_load(pit);
-    }
-    return 0;
-}
-
  static int pit_dispatch_pre_save(void *opaque)

hw/timer/i8254_common.c static const VMStateDescription vmstate_pit_common = { · line 270

Quoted 8 lines

hw/timer/i8254_common.c +0 -2

  {
      PITCommonState *s = opaque;

@@ -266,8 +228,6 @@ static const VMStateDescription vmstate_pit_common = {
      .name = "i8254",
      .version_id = 3,
      .minimum_version_id = 2,
-    .minimum_version_id_old = 1,
-    .load_state_old = pit_load_old,

hw/timer/i8254_common.c static const VMStateDescription vmstate_pit_common = { · line 233

Quoted 4 lines

hw/timer/i8254_common.c +0 -0

      .pre_save = pit_dispatch_pre_save,
      .post_load = pit_dispatch_post_load,
      .fields = (VMStateField[]) {

These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12.
Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code.

Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler.

Suggested-by Peter Maydell <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/acpi/piix4.c         | 40 ---------------------------------
 hw/intc/apic_common.c   | 49 -----------------------------------------
 hw/pci-host/piix.c      | 25 ---------------------
 hw/timer/i8254_common.c | 40 ---------------------------------
 4 files changed, 154 deletions(-)

hw/acpi/piix4.c +0 -38

index 5742c3df87..1d29d438c7 100644
@@ -42,7 +42,6 @@
 #include "hw/acpi/memory_hotplug.h"
 #include "hw/acpi/acpi_dev_interface.h"
 #include "hw/xen/xen.h"
-#include "migration/qemu-file-types.h"
 #include "migration/vmstate.h"
 #include "hw/core/cpu.h"
 #include "trace.h"

@@ -205,43 +204,6 @@ static const VMStateDescription vmstate_pci_status = {
     }
 };
 
-static int acpi_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    PIIX4PMState *s = opaque;
-    int ret, i;
-    uint16_t temp;
-
-    ret = pci_device_load(PCI_DEVICE(s), f);
-    if (ret < 0) {
-        return ret;
-    }
-    qemu_get_be16s(f, &s->ar.pm1.evt.sts);
-    qemu_get_be16s(f, &s->ar.pm1.evt.en);
-    qemu_get_be16s(f, &s->ar.pm1.cnt.cnt);
-
-    ret = vmstate_load_state(f, &vmstate_apm, &s->apm, 1);
-    if (ret) {
-        return ret;
-    }
-
-    timer_get(f, s->ar.tmr.timer);
-    qemu_get_sbe64s(f, &s->ar.tmr.overflow_time);
-
-    qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts);
-    for (i = 0; i < 3; i++) {
-        qemu_get_be16s(f, &temp);
-    }
-
-    qemu_get_be16s(f, (uint16_t *)s->ar.gpe.en);
-    for (i = 0; i < 3; i++) {
-        qemu_get_be16s(f, &temp);
-    }
-
-    ret = vmstate_load_state(f, &vmstate_pci_status,
-        &s->acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT],
 1);
-    return ret;
-}
-
 static bool vmstate_test_use_acpi_pci_hotplug(void *opaque, int
 version_id)

 {
     PIIX4PMState *s = opaque;

hw/acpi/piix4.c +0 -2

@@ -313,8 +275,6 @@ static const VMStateDescription vmstate_acpi = {
     .name = "piix4_pm",
     .version_id = 3,
     .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = acpi_load_old,
     .post_load = vmstate_acpi_post_load,
     .fields = (VMStateField[]) {
         VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState),

hw/intc/apic_common.c +0 -49

index aafd8e0e33..375cb6abe9 100644
@@ -31,7 +31,6 @@
 #include "sysemu/kvm.h"
 #include "hw/qdev-properties.h"
 #include "hw/sysbus.h"
-#include "migration/qemu-file-types.h"
 #include "migration/vmstate.h"
 
 static int apic_irq_delivered;

@@ -262,52 +261,6 @@ static void apic_reset_common(DeviceState *dev)
     apic_init_reset(dev);
 }
 
-/* This function is only used for old state version 1 and 2 */
-static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    APICCommonState *s = opaque;
-    APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
-    int i;
-
-    if (version_id > 2) {
-        return -EINVAL;
-    }
-
-    /* XXX: what if the base changes? (registered memory regions) */
-    qemu_get_be32s(f, &s->apicbase);
-    qemu_get_8s(f, &s->id);
-    qemu_get_8s(f, &s->arb_id);
-    qemu_get_8s(f, &s->tpr);
-    qemu_get_be32s(f, &s->spurious_vec);
-    qemu_get_8s(f, &s->log_dest);
-    qemu_get_8s(f, &s->dest_mode);
-    for (i = 0; i < 8; i++) {
-        qemu_get_be32s(f, &s->isr[i]);
-        qemu_get_be32s(f, &s->tmr[i]);
-        qemu_get_be32s(f, &s->irr[i]);
-    }
-    for (i = 0; i < APIC_LVT_NB; i++) {
-        qemu_get_be32s(f, &s->lvt[i]);
-    }
-    qemu_get_be32s(f, &s->esr);
-    qemu_get_be32s(f, &s->icr[0]);
-    qemu_get_be32s(f, &s->icr[1]);
-    qemu_get_be32s(f, &s->divide_conf);
-    s->count_shift = qemu_get_be32(f);
-    qemu_get_be32s(f, &s->initial_count);
-    s->initial_count_load_time = qemu_get_be64(f);
-    s->next_time = qemu_get_be64(f);
-
-    if (version_id >= 2) {
-        s->timer_expiry = qemu_get_be64(f);
-    }
-
-    if (info->post_load) {
-        info->post_load(s);
-    }
-    return 0;
-}
-
 static const VMStateDescription vmstate_apic_common;
 
 static void apic_common_realize(DeviceState *dev, Error **errp)

@@ -408,8 +361,6 @@ static const VMStateDescription vmstate_apic_common = {
     .name = "apic",
     .version_id = 3,
     .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = apic_load_old,
     .pre_load = apic_pre_load,
     .pre_save = apic_dispatch_pre_save,
     .post_load = apic_dispatch_post_load,

hw/pci-host/piix.c +0 -25

index 135c645535..2f4cbcbfe9 100644
@@ -33,7 +33,6 @@
 #include "qapi/error.h"
 #include "qemu/range.h"
 #include "hw/xen/xen.h"
-#include "migration/qemu-file-types.h"
 #include "migration/vmstate.h"
 #include "hw/pci-host/pam.h"
 #include "sysemu/reset.h"

@@ -174,28 +173,6 @@ static void i440fx_write_config(PCIDevice *dev,
     }
 }
 
-static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id)
-{
-    PCII440FXState *d = opaque;
-    PCIDevice *pd = PCI_DEVICE(d);
-    int ret, i;
-    uint8_t smm_enabled;
-
-    ret = pci_device_load(pd, f);
-    if (ret < 0)
-        return ret;
-    i440fx_update_memory_mappings(d);
-    qemu_get_8s(f, &smm_enabled);
-
-    if (version_id == 2) {
-        for (i = 0; i < PIIX_NUM_PIRQS; i++) {
-            qemu_get_be32(f); /* dummy load for compatibility */
-        }
-    }
-
-    return 0;
-}
-
 static int i440fx_post_load(void *opaque, int version_id)
 {
     PCII440FXState *d = opaque;

@@ -208,8 +185,6 @@ static const VMStateDescription vmstate_i440fx = {
     .name = "I440FX",
     .version_id = 3,
     .minimum_version_id = 3,
-    .minimum_version_id_old = 1,
-    .load_state_old = i440fx_load_old,
     .post_load = i440fx_post_load,
     .fields = (VMStateField[]) {
         VMSTATE_PCI_DEVICE(parent_obj, PCII440FXState),

hw/timer/i8254_common.c +0 -38

index 57bf10cc94..050875b497 100644
@@ -29,7 +29,6 @@
 #include "qemu/timer.h"
 #include "hw/timer/i8254.h"
 #include "hw/timer/i8254_internal.h"
-#include "migration/qemu-file-types.h"
 #include "migration/vmstate.h"
 
 /* val must be 0 or 1 */

@@ -202,43 +201,6 @@ static const VMStateDescription vmstate_pit_channel =
 {
     }
 };
 
-static int pit_load_old(QEMUFile *f, void *opaque, int version_id)
-{
-    PITCommonState *pit = opaque;
-    PITCommonClass *c = PIT_COMMON_GET_CLASS(pit);
-    PITChannelState *s;
-    int i;
-
-    if (version_id != 1) {
-        return -EINVAL;
-    }
-
-    for (i = 0; i < 3; i++) {
-        s = &pit->channels[i];
-        s->count = qemu_get_be32(f);
-        qemu_get_be16s(f, &s->latched_count);
-        qemu_get_8s(f, &s->count_latched);
-        qemu_get_8s(f, &s->status_latched);
-        qemu_get_8s(f, &s->status);
-        qemu_get_8s(f, &s->read_state);
-        qemu_get_8s(f, &s->write_state);
-        qemu_get_8s(f, &s->write_latch);
-        qemu_get_8s(f, &s->rw_mode);
-        qemu_get_8s(f, &s->mode);
-        qemu_get_8s(f, &s->bcd);
-        qemu_get_8s(f, &s->gate);
-        s->count_load_time = qemu_get_be64(f);
-        s->irq_disabled = 0;
-        if (i == 0) {
-            s->next_transition_time = qemu_get_be64(f);
-        }
-    }
-    if (c->post_load) {
-        c->post_load(pit);
-    }
-    return 0;
-}
-
 static int pit_dispatch_pre_save(void *opaque)
 {

     PITCommonState *s = opaque;

hw/timer/i8254_common.c +0 -3

@@ -266,8 +228,6 @@ static const VMStateDescription vmstate_pit_common = {
     .name = "i8254",
     .version_id = 3,
     .minimum_version_id = 2,
-    .minimum_version_id_old = 1,
-    .load_state_old = pit_load_old,
     .pre_save = pit_dispatch_pre_save,
     .post_load = pit_dispatch_post_load,
     .fields = (VMStateField[]) {
--

2.21.0

Move the KVM-related call to "sysemu/kvm.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 include/hw/i386/pc.h | 1 -
 include/sysemu/kvm.h | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

include/hw/i386/pc.h +0 -1

index 6df4f4b6fb..09e74e7764 100644
@@ -158,7 +158,6 @@ typedef struct PCMachineClass {
 
 extern DeviceState *isa_pic;
 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
-qemu_irq *kvm_i8259_init(ISABus *bus);
 int pic_read_irq(DeviceState *d);
 int pic_get_output(DeviceState *d);
 

include/sysemu/kvm.h +1 -0

index 9d143282bc..da8aa9f5a8 100644
@@ -513,6 +513,7 @@ void kvm_irqchip_set_qemuirq_gsi(KVMState *s,
 qemu_irq irq, int gsi);
 void kvm_pc_gsi_handler(void *opaque, int n, int level);
 void kvm_pc_setup_irq_routing(bool pci_enabled);
 void kvm_init_irq_routing(KVMState *s);
+qemu_irq *kvm_i8259_init(ISABus *bus);
 
 /**

* kvm_arch_irqchip_create:
--
2.21.0

On Tuesday, October 15, 2019, Philippe Mathieu-Daudé <[email protected] <mailto:[email protected]>> wrote:

Move the KVM-related call to "sysemu/kvm.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]

<mailto:[email protected]>>
---
 include/hw/i386/pc.h | 1 - include/sysemu/kvm.h | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

Is there any other similar case in our code base?

A.

    diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
    index 6df4f4b6fb..09e74e7764 100644
    --- a/include/hw/i386/pc.h
    +++ b/include/hw/i386/pc.h
    @@ -158,7 +158,6 @@ typedef struct PCMachineClass {

      extern DeviceState *isa_pic;
      qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
    -qemu_irq *kvm_i8259_init(ISABus *bus);
      int pic_read_irq(DeviceState *d);
      int pic_get_output(DeviceState *d);

    diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
    index 9d143282bc..da8aa9f5a8 100644
    --- a/include/sysemu/kvm.h
    +++ b/include/sysemu/kvm.h
    @@ -513,6 +513,7 @@ void kvm_irqchip_set_qemuirq_gsi(KVMState *s,
    qemu_irq irq, int gsi);
      void kvm_pc_gsi_handler(void *opaque, int n, int level);
      void kvm_pc_setup_irq_routing(bool pci_enabled);
      void kvm_init_irq_routing(KVMState *s);
    +qemu_irq *kvm_i8259_init(ISABus *bus);

      /**
       * kvm_arch_irqchip_create:
    -- 
    2.21.0

Move the KVM-related call to "sysemu/kvm.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 include/hw/i386/pc.h | 1 -
 include/sysemu/kvm.h | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

include/hw/i386/pc.h +0 -1

index 6df4f4b6fb..09e74e7764 100644
@@ -158,7 +158,6 @@ typedef struct PCMachineClass {
 
 extern DeviceState *isa_pic;
 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
-qemu_irq *kvm_i8259_init(ISABus *bus);
 int pic_read_irq(DeviceState *d);
 int pic_get_output(DeviceState *d);
 

include/sysemu/kvm.h +0 -0

index 9d143282bc..da8aa9f5a8 100644

Quoted 20 lines · Philippe Mathieu-Daudé

Move the KVM-related call to "sysemu/kvm.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
  include/hw/i386/pc.h | 1 -
  include/sysemu/kvm.h | 1 +
  2 files changed, 1 insertion(+), 1 deletion(-)

include/hw/i386/pc.h +0 -1

index 6df4f4b6fb..09e74e7764 100644
@@ -158,7 +158,6 @@ typedef struct PCMachineClass {
 
  extern DeviceState *isa_pic;
  qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
-qemu_irq *kvm_i8259_init(ISABus *bus);
  int pic_read_irq(DeviceState *d);
  int pic_get_output(DeviceState *d);
 

include/sysemu/kvm.h void kvm_irqchip_set_qemuirq_gsi(KVMState *s, qemu_irq irq, int gsi); · line 516

Quoted 9 lines

include/sysemu/kvm.h +1 -0

index 9d143282bc..da8aa9f5a8 100644
@@ -513,6 +513,7 @@ void kvm_irqchip_set_qemuirq_gsi(KVMState *s, qemu_irq irq, int gsi);
  void kvm_pc_gsi_handler(void *opaque, int n, int level);
  void kvm_pc_setup_irq_routing(bool pci_enabled);
  void kvm_init_irq_routing(KVMState *s);
+qemu_irq *kvm_i8259_init(ISABus *bus);

Why? The function is defined in hw/i386/kvm/ - so moving its prototype to a generic header sounds wrong to me.

Quoted 24 lines · Thomas Huth

Quoted 23 lines · Philippe Mathieu-Daudé

Move the KVM-related call to "sysemu/kvm.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
  include/hw/i386/pc.h | 1 -
  include/sysemu/kvm.h | 1 +

  2 files changed, 1 insertion(+), 1 deletion(-)

include/hw/i386/pc.h +0 -1

index 6df4f4b6fb..09e74e7764 100644
@@ -158,7 +158,6 @@ typedef struct PCMachineClass {
     extern DeviceState *isa_pic;
   qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
-qemu_irq *kvm_i8259_init(ISABus *bus);
   int pic_read_irq(DeviceState *d);
   int pic_get_output(DeviceState *d);

  diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 9d143282bc..da8aa9f5a8 100644

include/sysemu/kvm.h +0 -0

@@ -513,6 +513,7 @@ void kvm_irqchip_set_qemuirq_gsi(KVMState *s,

Quoted 8 lines

include/sysemu/kvm.h void kvm_irqchip_set_qemuirq_gsi(KVMState *s, qemu_irq irq, int gsi); · line 516

Quoted 5 lines

include/sysemu/kvm.h +1 -0

 qemu_irq irq, int gsi);
   void kvm_pc_gsi_handler(void *opaque, int n, int level);
   void kvm_pc_setup_irq_routing(bool pci_enabled);
   void kvm_init_irq_routing(KVMState *s);
+qemu_irq *kvm_i8259_init(ISABus *bus);

Why? The function is defined in hw/i386/kvm/ - so moving its prototype to a generic header sounds wrong to me.

This function is declared when compiling without KVM, and is available on the Alpha/HPPA/MIPS which don't have it.

You'd rather move the kvm_pc_* declarations to hw/i386/kvm/?

From: Hervé Poussineau <[email protected]>

We are now able to embed a timer in another object.

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/timer/mc146818rtc.c         | 30 ------------------------------
 include/hw/timer/mc146818rtc.h | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+), 30 deletions(-)

hw/timer/mc146818rtc.c +0 -30

index 6cb378751b..e40b54e743 100644
@@ -71,36 +71,6 @@
 #define RTC_CLOCK_RATE            32768
 #define UIP_HOLD_LENGTH           (8 * NANOSECONDS_PER_SECOND / 32768)
 
-#define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC)
-
-typedef struct RTCState {
-    ISADevice parent_obj;
-
-    MemoryRegion io;
-    MemoryRegion coalesced_io;
-    uint8_t cmos_data[128];
-    uint8_t cmos_index;
-    int32_t base_year;
-    uint64_t base_rtc;
-    uint64_t last_update;
-    int64_t offset;
-    qemu_irq irq;
-    int it_shift;
-    /* periodic timer */
-    QEMUTimer *periodic_timer;
-    int64_t next_periodic_time;
-    /* update-ended timer */
-    QEMUTimer *update_timer;
-    uint64_t next_alarm_time;
-    uint16_t irq_reinject_on_ack_count;
-    uint32_t irq_coalesced;
-    uint32_t period;
-    QEMUTimer *coalesced_timer;
-    LostTickPolicy lost_tick_policy;
-    Notifier suspend_notifier;
-    QLIST_ENTRY(RTCState) link;
-} RTCState;
-
 static void rtc_set_time(RTCState *s);
 static void rtc_update_time(RTCState *s);
 static void rtc_set_cmos(RTCState *s, const struct tm *tm);

include/hw/timer/ renamed from include/hw/timer/mc146818rtc.h +0 -0

mc146818rtc.h
index fe6ed63f71..0f1c886e5b 100644

include/hw/timer/mc146818rtc.h +33 -1

@@ -1,10 +1,43 @@
 #ifndef MC146818RTC_H
 #define MC146818RTC_H
 
+#include "qapi/qapi-types-misc.h"
+#include "qemu/queue.h"
+#include "qemu/timer.h"
 #include "hw/isa/isa.h"
 #include "hw/timer/mc146818rtc_regs.h"
 
 #define TYPE_MC146818_RTC "mc146818rtc"
+#define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC)
+
+typedef struct RTCState {
+    ISADevice parent_obj;
+
+    MemoryRegion io;
+    MemoryRegion coalesced_io;
+    uint8_t cmos_data[128];
+    uint8_t cmos_index;
+    int32_t base_year;
+    uint64_t base_rtc;
+    uint64_t last_update;
+    int64_t offset;
+    qemu_irq irq;
+    int it_shift;
+    /* periodic timer */
+    QEMUTimer *periodic_timer;
+    int64_t next_periodic_time;
+    /* update-ended timer */
+    QEMUTimer *update_timer;
+    uint64_t next_alarm_time;
+    uint16_t irq_reinject_on_ack_count;
+    uint32_t irq_coalesced;
+    uint32_t period;
+    QEMUTimer *coalesced_timer;
+    Notifier clock_reset_notifier;
+    LostTickPolicy lost_tick_policy;
+    Notifier suspend_notifier;
+    QLIST_ENTRY(RTCState) link;
+} RTCState;
 
 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
                              qemu_irq intercept_irq);
--

2.21.0

From: Philippe Mathieu-Daudé <[email protected]>

The ISA default number for the RTC devices is not related to its registers neither. Move this definition to "hw/timer/mc146818rtc.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 include/hw/timer/mc146818rtc.h      | 2 ++
 include/hw/timer/mc146818rtc_regs.h | 2 --
 tests/rtc-test.c                    | 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)

include/hw/timer/ renamed from include/hw/timer/mc146818rtc.h +0 -0

mc146818rtc.h
index 0f1c886e5b..17761cf6d9 100644

include/hw/timer/mc146818rtc.h +2 -0

@@ -39,6 +39,8 @@ typedef struct RTCState {
     QLIST_ENTRY(RTCState) link;
 } RTCState;
 
+#define RTC_ISA_IRQ 8
+
 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
                              qemu_irq intercept_irq);
 void rtc_set_memory(ISADevice *dev, int addr, int val);

include/hw/timer/ renamed from include/hw/timer/mc146818rtc_regs.h +0 -0

mc146818rtc_regs.h
index bfbb57e570..631f71cfd9 100644

include/hw/timer/mc146818rtc_regs.h +0 -2

@@ -27,8 +27,6 @@
 
 #include "qemu/timer.h"
 
-#define RTC_ISA_IRQ 8
-
 #define RTC_SECONDS             0
 #define RTC_SECONDS_ALARM       1
 #define RTC_MINUTES             2

tests/rtc-test.c +1 -1

index 6309b0ef6c..18f895690f 100644
@@ -15,6 +15,7 @@
 
 #include "libqtest-single.h"
 #include "qemu/timer.h"
+#include "hw/timer/mc146818rtc.h"
 #include "hw/timer/mc146818rtc_regs.h"
 
 #define UIP_HOLD_LENGTH           (8 * NANOSECONDS_PER_SECOND / 32768)
--

2.21.0

On Tuesday, October 15, 2019, Philippe Mathieu-Daudé <[email protected] <mailto:[email protected]>> wrote:

From: Philippe Mathieu-Daudé <[email protected] <mailto:[email protected]>>

The ISA default number for the RTC devices is not related to its registers neither. Move this definition to "hw/timer/mc146818rtc.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]

<mailto:[email protected]>>
---
 include/hw/timer/mc146818rtc.h      | 2 ++ include/hw/timer/mc146818rtc_regs.h | 2 -- tests/rtc-test.c                    | 1 + 3 files changed, 3 insertions(+), 2 deletions(-)

Philippe, do this and related patches clash with your recent reorganization of timers/rtcs?

A.

    diff --git a/include/hw/timer/mc146818rtc.h
    b/include/hw/timer/mc146818rtc.h
    index 0f1c886e5b..17761cf6d9 100644
    --- a/include/hw/timer/mc146818rtc.h
    +++ b/include/hw/timer/mc146818rtc.h
    @@ -39,6 +39,8 @@ typedef struct RTCState {
          QLIST_ENTRY(RTCState) link;
      } RTCState;

    +#define RTC_ISA_IRQ 8
    +
      ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
                                   qemu_irq intercept_irq);
      void rtc_set_memory(ISADevice *dev, int addr, int val);
    diff --git a/include/hw/timer/mc146818rtc_regs.h
    b/include/hw/timer/mc146818rtc_regs.h
    index bfbb57e570..631f71cfd9 100644
    --- a/include/hw/timer/mc146818rtc_regs.h
    +++ b/include/hw/timer/mc146818rtc_regs.h
    @@ -27,8 +27,6 @@

      #include "qemu/timer.h"

    -#define RTC_ISA_IRQ 8
    -
      #define RTC_SECONDS             0
      #define RTC_SECONDS_ALARM       1
      #define RTC_MINUTES             2
    diff --git a/tests/rtc-test.c b/tests/rtc-test.c
    index 6309b0ef6c..18f895690f 100644
    --- a/tests/rtc-test.c
    +++ b/tests/rtc-test.c
    @@ -15,6 +15,7 @@

      #include "libqtest-single.h"
      #include "qemu/timer.h"
    +#include "hw/timer/mc146818rtc.h"
      #include "hw/timer/mc146818rtc_regs.h"

      #define UIP_HOLD_LENGTH           (8 * NANOSECONDS_PER_SECOND / 32768)
    -- 
    2.21.0

From: Philippe Mathieu-Daudé <[email protected]>

The ISA default number for the RTC devices is not related to its registers neither. Move this definition to "hw/timer/mc146818rtc.h".

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 include/hw/timer/mc146818rtc.h      | 2 ++
 include/hw/timer/mc146818rtc_regs.h | 2 --
 tests/rtc-test.c                    | 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)

include/hw/timer/ renamed from include/hw/timer/mc146818rtc.h +0 -0

mc146818rtc.h
index 0f1c886e5b..17761cf6d9 100644

include/hw/timer/mc146818rtc.h +2 -0

@@ -39,6 +39,8 @@ typedef struct RTCState {
     QLIST_ENTRY(RTCState) link;
 } RTCState;
 
+#define RTC_ISA_IRQ 8
+
 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
                              qemu_irq intercept_irq);
 void rtc_set_memory(ISADevice *dev, int addr, int val);

include/hw/timer/ renamed from include/hw/timer/mc146818rtc_regs.h +0 -0

mc146818rtc_regs.h
index bfbb57e570..631f71cfd9 100644

include/hw/timer/mc146818rtc_regs.h +0 -2

@@ -27,8 +27,6 @@
 
 #include "qemu/timer.h"
 
-#define RTC_ISA_IRQ 8
-
 #define RTC_SECONDS             0
 #define RTC_SECONDS_ALARM       1
 #define RTC_MINUTES             2

tests/rtc-test.c +1 -1

index 6309b0ef6c..18f895690f 100644
@@ -15,6 +15,7 @@
 
 #include "libqtest-single.h"
 #include "qemu/timer.h"
+#include "hw/timer/mc146818rtc.h"
 #include "hw/timer/mc146818rtc_regs.h"
 
 #define UIP_HOLD_LENGTH           (8 * NANOSECONDS_PER_SECOND / 32768)
--

2.21.0

From: Philippe Mathieu-Daudé <[email protected]>

The PIIX4 Southbridge is not used by the PC machine, but by the Malta board (MIPS). Add a new section to keep it covered.

Suggested-by Michael S. Tsirkin <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 MAINTAINERS | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

MAINTAINERS +6 -2

index fe4dc51b08..c9f625fc2e 100644
@@ -1230,7 +1230,6 @@ F: hw/pci-host/q35.c
 F: hw/pci-host/pam.c
 F: include/hw/pci-host/q35.h
 F: include/hw/pci-host/pam.h
-F: hw/isa/piix4.c
 F: hw/isa/lpc_ich9.c
 F: hw/i2c/smbus_ich9.c
 F: hw/acpi/piix4.c

@@ -1716,6 +1715,12 @@ F: hw/display/edid*
 F: include/hw/display/edid.h
 F: qemu-edid.c
 
+PIIX4 South Bridge (i82371AB)
+M: Hervé Poussineau <[email protected]>
+M: Philippe Mathieu-Daudé <[email protected]>
+S: Maintained
+F: hw/isa/piix4.c
+
 Firmware configuration (fw_cfg)
 M: Philippe Mathieu-Daudé <[email protected]>
 R: Laszlo Ersek <[email protected]>
--

2.21.0

From: Hervé Poussineau <[email protected]>

PIIX4 structure is now 's'
PCI device is now 'pci_dev'
DeviceState is now 'dev'

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

hw/isa/piix4.c +7 -7

index 3294056cd5..4202243e41 100644
@@ -88,16 +88,17 @@ static const VMStateDescription vmstate_piix4 = {
     }
 };
 
-static void piix4_realize(PCIDevice *dev, Error **errp)
+static void piix4_realize(PCIDevice *pci_dev, Error **errp)
 {
-    PIIX4State *d = PIIX4_PCI_DEVICE(dev);
+    DeviceState *dev = DEVICE(pci_dev);
+    PIIX4State *s = DO_UPCAST(PIIX4State, dev, pci_dev);
 
-    if (!isa_bus_new(DEVICE(d), pci_address_space(dev),
-                     pci_address_space_io(dev), errp)) {
+    if (!isa_bus_new(dev, pci_address_space(pci_dev),
+                     pci_address_space_io(pci_dev), errp)) {
         return;
     }
-    piix4_dev = &d->dev;
-    qemu_register_reset(piix4_reset, d);
+    piix4_dev = pci_dev;
+    qemu_register_reset(piix4_reset, s);
 }
 
 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
--

2.21.0

From: Hervé Poussineau <[email protected]>

PIIX4 structure is now 's'
PCI device is now 'pci_dev'
DeviceState is now 'dev'

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

hw/isa/piix4.c +7 -7

index 3294056cd5..4202243e41 100644
@@ -88,16 +88,17 @@ static const VMStateDescription vmstate_piix4 = {
     }
 };
 
-static void piix4_realize(PCIDevice *dev, Error **errp)
+static void piix4_realize(PCIDevice *pci_dev, Error **errp)
 {
-    PIIX4State *d = PIIX4_PCI_DEVICE(dev);
+    DeviceState *dev = DEVICE(pci_dev);
+    PIIX4State *s = DO_UPCAST(PIIX4State, dev, pci_dev);
 
-    if (!isa_bus_new(DEVICE(d), pci_address_space(dev),
-                     pci_address_space_io(dev), errp)) {
+    if (!isa_bus_new(dev, pci_address_space(pci_dev),
+                     pci_address_space_io(pci_dev), errp)) {
         return;
     }
-    piix4_dev = &d->dev;
-    qemu_register_reset(piix4_reset, d);
+    piix4_dev = pci_dev;
+    qemu_register_reset(piix4_reset, s);
 }
 
 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
--

2.21.0

From: Hervé Poussineau <[email protected]>

PIIX4 structure is now 's'
PCI device is now 'pci_dev'
DeviceState is now 'dev'

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

hw/isa/piix4.c +0 -0

index 3294056cd5..4202243e41 100644

From: Hervé Poussineau <[email protected]>

The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset.

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

[PMD: rebased, updated includes]

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

hw/isa/piix4.c +1 -0

index 4202243e41..6e2d9b9774 100644
@@ -2,6 +2,7 @@
  * QEMU PIIX4 PCI Bridge Emulation
  *
  * Copyright (c) 2006 Fabrice Bellard
+ * Copyright (c) 2018 Hervé Poussineau
  *
  * Permission is hereby granted, free of charge, to any person obtaining

a copy
* of this software and associated documentation files (the "Software"),
to deal

hw/isa/piix4.c +33 -0

@@ -29,11 +30,16 @@
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
 #include "sysemu/reset.h"
+#include "sysemu/runstate.h"
 
 PCIDevice *piix4_dev;
 
 typedef struct PIIX4State {
     PCIDevice dev;
+
+    /* Reset Control Register */
+    MemoryRegion rcr_mem;
+    uint8_t rcr;
 } PIIX4State;
 
 #define TYPE_PIIX4_PCI_DEVICE "PIIX4"

@@ -88,6 +94,34 @@ static const VMStateDescription vmstate_piix4 = {
     }
 };
 
+static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
+                            unsigned int len)
+{
+    PIIX4State *s = opaque;
+
+    if (val & 4) {
+        qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+        return;
+    }
+    s->rcr = val & 2; /* keep System Reset type only */
+}
+
+static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int
 len)
+{
+    PIIX4State *s = opaque;
+    return s->rcr;
+}
+
+static const MemoryRegionOps piix4_rcr_ops = {
+    .read = piix4_rcr_read,
+    .write = piix4_rcr_write,
+    .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl = {
+        .min_access_size = 1,
+        .max_access_size = 1,
+    },
+};
+
 static void piix4_realize(PCIDevice *pci_dev, Error **errp)
 {

     DeviceState *dev = DEVICE(pci_dev);

hw/isa/piix4.c +6 -0

@@ -97,6 +131,12 @@ static void piix4_realize(PCIDevice *pci_dev, Error
 **errp)
                      pci_address_space_io(pci_dev), errp)) {
         return;
     }
+
+    memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
+                          "reset-control", 1);
+    memory_region_add_subregion_overlap(pci_address_space_io(pci_dev),
 0xcf9,
+                                        &s->rcr_mem, 1);
+
     piix4_dev = pci_dev;

     qemu_register_reset(piix4_reset, s);

}
--
2.21.0

From: Hervé Poussineau <[email protected]>

Add ISA irqs as piix4 gpio in, and CPU interrupt request as piix4 gpio out. Remove i8259 instanciated in malta board, to not have it twice.

We can also remove the now unused piix4_init() function.

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

[PMD: rebased, updated includes, use ISA_NUM_IRQS in for loop]

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c       | 41 ++++++++++++++++++++++++++++++-----------
 hw/mips/mips_malta.c | 32 +++++++++++++-------------------
 include/hw/i386/pc.h |  1 -
 3 files changed, 43 insertions(+), 31 deletions(-)

hw/isa/piix4.c +30 -11

index 6e2d9b9774..1cfc51335a 100644
@@ -24,6 +24,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "hw/irq.h"
 #include "hw/i386/pc.h"
 #include "hw/pci/pci.h"
 #include "hw/isa/isa.h"

@@ -36,6 +37,8 @@ PCIDevice *piix4_dev;
 
 typedef struct PIIX4State {
     PCIDevice dev;
+    qemu_irq cpu_intr;
+    qemu_irq *isa;
 
     /* Reset Control Register */
     MemoryRegion rcr_mem;

@@ -94,6 +97,18 @@ static const VMStateDescription vmstate_piix4 = {
     }
 };
 
+static void piix4_request_i8259_irq(void *opaque, int irq, int level)
+{
+    PIIX4State *s = opaque;
+    qemu_set_irq(s->cpu_intr, level);
+}
+
+static void piix4_set_i8259_irq(void *opaque, int irq, int level)
+{
+    PIIX4State *s = opaque;
+    qemu_set_irq(s->isa[irq], level);
+}
+
 static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
                             unsigned int len)
 {

@@ -126,30 +141,34 @@ static void piix4_realize(PCIDevice *pci_dev, Error
 **errp)
 {
     DeviceState *dev = DEVICE(pci_dev);
     PIIX4State *s = DO_UPCAST(PIIX4State, dev, pci_dev);
+    ISABus *isa_bus;
+    qemu_irq *i8259_out_irq;
 
-    if (!isa_bus_new(dev, pci_address_space(pci_dev),
-                     pci_address_space_io(pci_dev), errp)) {
+    isa_bus = isa_bus_new(dev, pci_address_space(pci_dev),
+                          pci_address_space_io(pci_dev), errp);
+    if (!isa_bus) {
         return;
     }
 
+    qdev_init_gpio_in_named(dev, piix4_set_i8259_irq, "isa",
 ISA_NUM_IRQS);
+    qdev_init_gpio_out_named(dev, &s->cpu_intr, "intr", 1);
+
     memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
                           "reset-control", 1);
     memory_region_add_subregion_overlap(pci_address_space_io(pci_dev),
 0xcf9,
                                         &s->rcr_mem, 1);
 
+    /* initialize i8259 pic */
+    i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
+    s->isa = i8259_init(isa_bus, *i8259_out_irq);
+
+    /* initialize ISA irqs */
+    isa_bus_irqs(isa_bus, s->isa);
+
     piix4_dev = pci_dev;
     qemu_register_reset(piix4_reset, s);
 }
 
-int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
-{
-    PCIDevice *d;
-
-    d = pci_create_simple_multifunction(bus, devfn, true, "PIIX4");
-    *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0"));
-    return d->devfn;
-}
-

static void piix4_class_init(ObjectClass *klass, void *data)

 {
     DeviceClass *dc = DEVICE_CLASS(klass);

hw/mips/mips_malta.c +2 -8

index 4d9c64b36a..7d25ab6c23 100644
@@ -97,7 +97,7 @@ typedef struct {
     SysBusDevice parent_obj;
 
     MIPSCPSState cps;
-    qemu_irq *i8259;
+    qemu_irq i8259[16];
 } MaltaState;
 
 static ISADevice *pit;

@@ -1235,8 +1235,8 @@ void mips_malta_init(MachineState *machine)
     int64_t kernel_entry, bootloader_run_addr;
     PCIBus *pci_bus;
     ISABus *isa_bus;
-    qemu_irq *isa_irq;
     qemu_irq cbus_irq, i8259_irq;
+    PCIDevice *pci;
     int piix4_devfn;
     I2CBus *smbus;
     DriveInfo *dinfo;

@@ -1407,30 +1407,24 @@ void mips_malta_init(MachineState *machine)
     /* Board ID = 0x420 (Malta Board with CoreLV) */
     stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
 
-    /*
-     * We have a circular dependency problem: pci_bus depends on isa_irq,
-     * isa_irq is provided by i8259, i8259 depends on ISA, ISA depends
-     * on piix4, and piix4 depends on pci_bus.  To stop the cycle we have
-     * qemu_irq_proxy() adds an extra bit of indirection, allowing us
-     * to resolve the isa_irq -> i8259 dependency after i8259 is

initialized.

hw/mips/mips_malta.c +11 -11

-     */
-    isa_irq = qemu_irq_proxy(&s->i8259, 16);
-
     /* Northbridge */
-    pci_bus = gt64120_register(isa_irq);
+    pci_bus = gt64120_register(s->i8259);
 
     /* Southbridge */
     ide_drive_get(hd, ARRAY_SIZE(hd));
 
-    piix4_devfn = piix4_init(pci_bus, &isa_bus, 80);
+    pci = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0),
+                                          true, "PIIX4");
+    dev = DEVICE(pci);
+    isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
+    piix4_devfn = pci->devfn;
 
-    /*
-     * Interrupt controller
-     * The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2
-     */
-    s->i8259 = i8259_init(isa_bus, i8259_irq);
+    /* Interrupt controller */
+    qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq);
+    for (int i = 0; i < ISA_NUM_IRQS; i++) {
+        s->i8259[i] = qdev_get_gpio_in_named(dev, "isa", i);
+    }
 
-    isa_bus_irqs(isa_bus, s->i8259);
     pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
     pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci");
     smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,

include/hw/i386/pc.h +0 -1

index 09e74e7764..a95eab0d8a 100644
@@ -282,7 +282,6 @@ PCIBus *i440fx_init(const char *host_type, const char
 *pci_type,
 PCIBus *find_i440fx(void);
 /* piix4.c */
 extern PCIDevice *piix4_dev;
-int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
 
 /* pc_sysfw.c */

void pc_system_flash_create(PCMachineState *pcms);
--
2.21.0

From: Philippe Mathieu-Daudé <[email protected]>

This function isn't used anymore.

This reverts commit 22ec3283efba9ba0792790da786d6776d83f2a92.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/core/irq.c    | 14 --------------
 include/hw/irq.h |  5 -----
 2 files changed, 19 deletions(-)

From: Hervé Poussineau <[email protected]>

Other piix4 parts are already named piix4-ide and piix4-usb-uhci.

Reviewed-by Philippe Mathieu-Daudé <[email protected]>

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

[PMD: rebased]

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c       | 1 -
 hw/mips/mips_malta.c | 2 +-
 include/hw/isa/isa.h | 2 ++
 3 files changed, 3 insertions(+), 2 deletions(-)

hw/isa/piix4.c +0 -1

index 1cfc51335a..c3a2bd0d70 100644
@@ -45,7 +45,6 @@ typedef struct PIIX4State {
     uint8_t rcr;
 } PIIX4State;
 
-#define TYPE_PIIX4_PCI_DEVICE "PIIX4"
 #define PIIX4_PCI_DEVICE(obj) \
     OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE)
 

hw/mips/mips_malta.c +1 -1

index 7d25ab6c23..e499b7a6bb 100644
@@ -1414,7 +1414,7 @@ void mips_malta_init(MachineState *machine)
     ide_drive_get(hd, ARRAY_SIZE(hd));
 
     pci = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0),
-                                          true, "PIIX4");
+                                          true, TYPE_PIIX4_PCI_DEVICE);
     dev = DEVICE(pci);
     isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
     piix4_devfn = pci->devfn;

include/hw/isa/isa.h +2 -1

index 018ada4f6f..79f703fd6c 100644
@@ -147,4 +147,6 @@ static inline ISABus *isa_bus_from_device(ISADevice *d)
     return ISA_BUS(qdev_get_parent_bus(DEVICE(d)));
 }
 
+#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
+
 #endif
--

2.21.0

From: Hervé Poussineau <[email protected]>

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

hw/isa/piix4.c +3 -4

index c3a2bd0d70..8998b0ca47 100644
@@ -48,10 +48,10 @@ typedef struct PIIX4State {
 #define PIIX4_PCI_DEVICE(obj) \
     OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE)
 
-static void piix4_reset(void *opaque)
+static void piix4_reset(DeviceState *dev)
 {
-    PIIX4State *d = opaque;
-    uint8_t *pci_conf = d->dev.config;
+    PIIX4State *s = PIIX4_PCI_DEVICE(dev);
+    uint8_t *pci_conf = s->dev.config;
 
     pci_conf[0x04] = 0x07; // master, memory and I/O
     pci_conf[0x05] = 0x00;

@@ -165,7 +165,6 @@ static void piix4_realize(PCIDevice *pci_dev, Error
 **errp)
     isa_bus_irqs(isa_bus, s->isa);
 
     piix4_dev = pci_dev;
-    qemu_register_reset(piix4_reset, s);
 }
 

static void piix4_class_init(ObjectClass *klass, void *data)

hw/isa/piix4.c +1 -0

@@ -177,6 +176,7 @@ static void piix4_class_init(ObjectClass *klass, void
 *data)
     k->vendor_id = PCI_VENDOR_ID_INTEL;
     k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
     k->class_id = PCI_CLASS_BRIDGE_ISA;
+    dc->reset = piix4_reset;
     dc->desc = "ISA bridge";
     dc->vmsd = &vmstate_piix4;

     /*

--
2.21.0

From: Hervé Poussineau <[email protected]>

Remove i8257 instanciated in malta board, to not have it twice.

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

[PMD: rebased]

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c       | 4 ++++
 hw/mips/mips_malta.c | 2 --
 2 files changed, 4 insertions(+), 2 deletions(-)

Reviewed-by Aleksandar Markovic <[email protected]>

hw/isa/piix4.c +4 -0

index 8998b0ca47..1bc91b590c 100644
@@ -29,6 +29,7 @@
 #include "hw/pci/pci.h"
 #include "hw/isa/isa.h"
 #include "hw/sysbus.h"
+#include "hw/dma/i8257.h"
 #include "migration/vmstate.h"
 #include "sysemu/reset.h"
 #include "sysemu/runstate.h"

@@ -164,6 +165,9 @@ static void piix4_realize(PCIDevice *pci_dev, Error
 **errp)
     /* initialize ISA irqs */
     isa_bus_irqs(isa_bus, s->isa);
 
+    /* DMA */
+    i8257_dma_init(isa_bus, 0);
+
     piix4_dev = pci_dev;
 }

hw/mips/mips_malta.c +0 -3

index e499b7a6bb..df247177ca 100644
@@ -28,7 +28,6 @@
 #include "cpu.h"
 #include "hw/i386/pc.h"
 #include "hw/isa/superio.h"
-#include "hw/dma/i8257.h"
 #include "hw/char/serial.h"
 #include "net/net.h"
 #include "hw/boards.h"

@@ -1430,7 +1429,6 @@ void mips_malta_init(MachineState *machine)
     smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
                           isa_get_irq(NULL, 9), NULL, 0, NULL);
     pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
-    i8257_dma_init(isa_bus, 0);
     mc146818_rtc_init(isa_bus, 2000, NULL);
 
     /* generate SPD EEPROM data */
--

2.21.0

Remove i8257 instanciated in malta board, to not have it twice.

From: Hervé Poussineau <[email protected]>

Remove i8254 instanciated in malta board, to not have it twice.

Acked-by Michael S. Tsirkin <[email protected]>

Acked-by Paolo Bonzini <[email protected]>

Signed-off-by Hervé Poussineau <[email protected]>

Message-Id: <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/isa/piix4.c       | 4 ++++
 hw/mips/mips_malta.c | 4 ----
 2 files changed, 4 insertions(+), 4 deletions(-)

hw/isa/piix4.c +4 -0

index 1bc91b590c..0b0a0ecab1 100644
@@ -30,6 +30,7 @@
 #include "hw/isa/isa.h"
 #include "hw/sysbus.h"
 #include "hw/dma/i8257.h"
+#include "hw/timer/i8254.h"
 #include "migration/vmstate.h"
 #include "sysemu/reset.h"
 #include "sysemu/runstate.h"

@@ -165,6 +166,9 @@ static void piix4_realize(PCIDevice *pci_dev, Error
 **errp)
     /* initialize ISA irqs */
     isa_bus_irqs(isa_bus, s->isa);
 
+    /* initialize pit */
+    i8254_pit_init(isa_bus, 0x40, 0, NULL);
+
     /* DMA */
     i8257_dma_init(isa_bus, 0);

hw/mips/mips_malta.c +0 -5

index df247177ca..16d7a0e785 100644
@@ -45,7 +45,6 @@
 #include "hw/loader.h"
 #include "elf.h"
 #include "hw/timer/mc146818rtc.h"
-#include "hw/timer/i8254.h"
 #include "exec/address-spaces.h"
 #include "hw/sysbus.h"             /* SysBusDevice */
 #include "qemu/host-utils.h"

@@ -99,8 +98,6 @@ typedef struct {
     qemu_irq i8259[16];
 } MaltaState;
 
-static ISADevice *pit;
-
 static struct _loaderparams {
     int ram_size, ram_low_size;
     const char *kernel_filename;

@@ -1428,7 +1425,6 @@ void mips_malta_init(MachineState *machine)
     pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci");
     smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
                           isa_get_irq(NULL, 9), NULL, 0, NULL);
-    pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
     mc146818_rtc_init(isa_bus, 2000, NULL);
 
     /* generate SPD EEPROM data */
--

2.21.0