kvm/x86: Reduce counter period change overhead and delay the effective time

PATCH Superseded Like Xu 2 participants 8 messages Mar 17, 2020 – Apr 16, 2020

Subsystems (3)

x86 KVM KVM x86

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Like Xu

author

2020-03-17 07:55 UTC #0 lore raw

PATCH 1/1 kvm/x86: Reduce counter period change overhead and delay the effective time

The cost of perf_event_period() is unstable, and when the guest samples multiple events, the overhead increases dramatically (5378 ns on E5-2699).

For a non-running counter, the effective time of the new period is when its corresponding enable bit is enabled. Calling perf_event_period() in advance is superfluous. For a running counter, it's safe to delay the effective time until the KVM_REQ_PMU event is handled. If there are multiple perf_event_period() calls before handling KVM_REQ_PMU, it helps to reduce the total cost.

Signed-off-by Like Xu <[email protected]>

---
 arch/x86/kvm/pmu.c           | 11 -----------
 arch/x86/kvm/pmu.h           | 11 +++++++++++
 arch/x86/kvm/vmx/pmu_intel.c | 10 ++++------
 3 files changed, 15 insertions(+), 17 deletions(-)

arch/x86/kvm/pmu.c +0 ~~-11~~

index d1f8ca57d354..527a8bb85080 100644
@@ -437,17 +437,6 @@ void kvm_pmu_init(struct kvm_vcpu *vcpu)
 	kvm_pmu_refresh(vcpu);
 }
 
-static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
-{
-	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
-
-	if (pmc_is_fixed(pmc))
-		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
-			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
-
-	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
-}
-
 /* Release perf_events for vPMCs that have been unused for a full time slice.  */
 void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
 {

arch/x86/kvm/pmu.h +11 -0

index d7da2b9e0755..cd112e825d2c 100644
@@ -138,6 +138,17 @@ static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value)
 	return sample_period;
 }
 
+static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
+{
+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
+
+	if (pmc_is_fixed(pmc))
+		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
+
+	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
+}
+
 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
 void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

arch/x86/kvm/vmx/pmu_intel.c +4 -6

index 7c857737b438..4e689273eb05 100644
@@ -263,15 +263,13 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 			if (!msr_info->host_initiated)
 				data = (s64)(s32)data;
 			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc)) {
+				kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
 			return 0;
 		} else if ((pmc = get_fixed_pmc(pmu, msr))) {
 			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc)) {
+				kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
 			return 0;
 		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {
 			if (data == pmc->eventsel)

Signature · 1 line

2.21.1

Like Xu

author

2020-03-17 08:00 UTC #1 lore raw

Quoted 67 lines · Like Xu

The cost of perf_event_period() is unstable, and when the guest samples multiple events, the overhead increases dramatically (5378 ns on E5-2699).

Signed-off-by Like Xu <[email protected]>

---
  arch/x86/kvm/pmu.c           | 11 -----------
  arch/x86/kvm/pmu.h           | 11 +++++++++++
  arch/x86/kvm/vmx/pmu_intel.c | 10 ++++------
  3 files changed, 15 insertions(+), 17 deletions(-)

arch/x86/kvm/pmu.c +0 ~~-11~~

index d1f8ca57d354..527a8bb85080 100644
@@ -437,17 +437,6 @@ void kvm_pmu_init(struct kvm_vcpu *vcpu)
  	kvm_pmu_refresh(vcpu);
  }
 
-static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
-{
-	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
-
-	if (pmc_is_fixed(pmc))
-		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
-			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
-
-	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
-}
-
  /* Release perf_events for vPMCs that have been unused for a full time slice.  */
  void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
  {

arch/x86/kvm/pmu.h +11 -0

index d7da2b9e0755..cd112e825d2c 100644
@@ -138,6 +138,17 @@ static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value)
  	return sample_period;
  }
 
+static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
+{
+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
+
+	if (pmc_is_fixed(pmc))
+		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
+
+	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
+}
+
  void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
  void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
  void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

arch/x86/kvm/vmx/pmu_intel.c +0 -0

index 7c857737b438..4e689273eb05 100644

arch/x86/kvm/vmx/pmu_intel.c static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · line 266

Quoted 7 lines

arch/x86/kvm/vmx/pmu_intel.c +1 -3

@@ -263,15 +263,13 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
  			if (!msr_info->host_initiated)
  				data = (s64)(s32)data;
  			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc)) {

Oops, the "{" is a shameful mistake.

Quoted 14 lines

arch/x86/kvm/vmx/pmu_intel.c +3 -3

+				kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
  			return 0;
  		} else if ((pmc = get_fixed_pmc(pmu, msr))) {
  			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc)) {
 
+				kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
  			return 0;
  		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {

if (data == pmc->eventsel)

Like Xu

author

2020-03-17 08:17 UTC #2 lore raw

PATCH v2 1/1 KVM: x86/pmu: Reduce counter period change overhead and delay the effective time

In reply to Like Xu

The cost of perf_event_period() is unstable, and when the guest samples multiple events, the overhead increases dramatically (5378 ns on E5-2699).

Signed-off-by Like Xu <[email protected]>

---
 arch/x86/kvm/pmu.c           | 11 -----------
 arch/x86/kvm/pmu.h           | 11 +++++++++++
 arch/x86/kvm/vmx/pmu_intel.c | 10 ++++------
 3 files changed, 15 insertions(+), 17 deletions(-)

arch/x86/kvm/pmu.c +0 ~~-11~~

index d1f8ca57d354..527a8bb85080 100644
@@ -437,17 +437,6 @@ void kvm_pmu_init(struct kvm_vcpu *vcpu)
 	kvm_pmu_refresh(vcpu);
 }
 
-static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
-{
-	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
-
-	if (pmc_is_fixed(pmc))
-		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
-			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
-
-	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
-}
-
 /* Release perf_events for vPMCs that have been unused for a full time slice.  */
 void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
 {

arch/x86/kvm/pmu.h +11 -0

index d7da2b9e0755..cd112e825d2c 100644
@@ -138,6 +138,17 @@ static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value)
 	return sample_period;
 }
 
+static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
+{
+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
+
+	if (pmc_is_fixed(pmc))
+		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
+
+	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
+}
+
 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
 void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

arch/x86/kvm/vmx/pmu_intel.c +4 -6

index 7c857737b438..20f654a0c09b 100644
@@ -263,15 +263,13 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 			if (!msr_info->host_initiated)
 				data = (s64)(s32)data;
 			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc))
+				kvm_make_request(KVM_REQ_PMU, vcpu);
 			return 0;
 		} else if ((pmc = get_fixed_pmc(pmu, msr))) {
 			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc))
+				kvm_make_request(KVM_REQ_PMU, vcpu);
 			return 0;
 		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {
 			if (data == pmc->eventsel)

Signature · 1 line

2.21.1

Like Xu

author

2020-03-26 12:47 UTC #3 lore raw

Re: [PATCH v2] KVM: x86/pmu: Reduce counter period change overhead and delay the effective time

Anyone to help review this change?

Thanks,
Like Xu

Quoted 86 lines · Like Xu

The cost of perf_event_period() is unstable, and when the guest samples multiple events, the overhead increases dramatically (5378 ns on E5-2699).

Signed-off-by Like Xu <[email protected]>

---
  arch/x86/kvm/pmu.c           | 11 -----------
  arch/x86/kvm/pmu.h           | 11 +++++++++++
  arch/x86/kvm/vmx/pmu_intel.c | 10 ++++------
  3 files changed, 15 insertions(+), 17 deletions(-)

arch/x86/kvm/pmu.c +0 ~~-11~~

index d1f8ca57d354..527a8bb85080 100644
@@ -437,17 +437,6 @@ void kvm_pmu_init(struct kvm_vcpu *vcpu)
  	kvm_pmu_refresh(vcpu);
  }
 
-static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
-{
-	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
-
-	if (pmc_is_fixed(pmc))
-		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
-			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
-
-	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
-}
-
  /* Release perf_events for vPMCs that have been unused for a full time slice.  */
  void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
  {

arch/x86/kvm/pmu.h +11 -0

index d7da2b9e0755..cd112e825d2c 100644
@@ -138,6 +138,17 @@ static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value)
  	return sample_period;
  }
 
+static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
+{
+	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
+
+	if (pmc_is_fixed(pmc))
+		return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+			pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
+
+	return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
+}
+
  void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
  void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
  void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

arch/x86/kvm/vmx/pmu_intel.c +4 -6

index 7c857737b438..20f654a0c09b 100644
@@ -263,15 +263,13 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
  			if (!msr_info->host_initiated)
  				data = (s64)(s32)data;
  			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc))
+				kvm_make_request(KVM_REQ_PMU, vcpu);
  			return 0;
  		} else if ((pmc = get_fixed_pmc(pmu, msr))) {
  			pmc->counter += data - pmc_read_counter(pmc);
-			if (pmc->perf_event)
-				perf_event_period(pmc->perf_event,
-						  get_sample_period(pmc, data));
+			if (pmc_speculative_in_use(pmc))
+				kvm_make_request(KVM_REQ_PMU, vcpu);
  			return 0;
  		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {
  			if (data == pmc->eventsel)

Like Xu

author

2020-04-08 14:04 UTC #4 lore raw

Re: [PATCH v2] KVM: x86/pmu: Reduce counter period change overhead and delay the effective time

Hi Paolo,

Could you please take a look at this patch?
If there is anything needs to be improved, please let me know.

Thanks,
Like Xu

Quoted 93 lines · Like Xu

Anyone to help review this change?

Thanks,
Like Xu

Quoted 86 lines · Like Xu

The cost of perf_event_period() is unstable, and when the guest samples multiple events, the overhead increases dramatically (5378 ns on E5-2699).

Signed-off-by Like Xu <[email protected]>

---
arch/x86/kvm/pmu.c | 11 -----------
arch/x86/kvm/pmu.h | 11 +++++++++++
arch/x86/kvm/vmx/pmu_intel.c | 10 ++++------

  3 files changed, 15 insertions(+), 17 deletions(-)

arch/x86/kvm/pmu.c +0 ~~-11~~

index d1f8ca57d354..527a8bb85080 100644
@@ -437,17 +437,6 @@ void kvm_pmu_init(struct kvm_vcpu *vcpu)
       kvm_pmu_refresh(vcpu);
   }
-static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
-{
-    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
-
-    if (pmc_is_fixed(pmc))
-        return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
-            pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
-
-    return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
-}
-
   /* Release perf_events for vPMCs that have been unused for a full time slice.  */
   void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
   {

arch/x86/kvm/pmu.h +11 -0

index d7da2b9e0755..cd112e825d2c 100644
@@ -138,6 +138,17 @@ static inline u64 get_sample_period(struct kvm_pmc 
 *pmc, u64 counter_value)
       return sample_period;
   }
+static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
+{
+    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
+
+    if (pmc_is_fixed(pmc))
+        return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+            pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
+
+    return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
+}
+
   void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
   void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
   void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

arch/x86/kvm/vmx/pmu_intel.c +4 -6

index 7c857737b438..20f654a0c09b 100644
@@ -263,15 +263,13 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, 
 struct msr_data *msr_info)
               if (!msr_info->host_initiated)
                   data = (s64)(s32)data;
               pmc->counter += data - pmc_read_counter(pmc);
-            if (pmc->perf_event)
-                perf_event_period(pmc->perf_event,
-                          get_sample_period(pmc, data));
+            if (pmc_speculative_in_use(pmc))
+                kvm_make_request(KVM_REQ_PMU, vcpu);
               return 0;
           } else if ((pmc = get_fixed_pmc(pmu, msr))) {
               pmc->counter += data - pmc_read_counter(pmc);
-            if (pmc->perf_event)
-                perf_event_period(pmc->perf_event,
-                          get_sample_period(pmc, data));
+            if (pmc_speculative_in_use(pmc))
+                kvm_make_request(KVM_REQ_PMU, vcpu);
               return 0;
           } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {

if (data == pmc->eventsel)

Like Xu

author

2020-04-16 14:42 UTC #5 lore raw

Re: [PATCH v2] KVM: x86/pmu: Reduce counter period change overhead and delay the effective time

Ping.

Quoted 103 lines · Like Xu

Hi Paolo,

Could you please take a look at this patch?
If there is anything needs to be improved, please let me know.

Thanks,
Like Xu

Quoted 93 lines · Like Xu

Anyone to help review this change?

Thanks,
Like Xu

Quoted 86 lines · Like Xu

The cost of perf_event_period() is unstable, and when the guest samples multiple events, the overhead increases dramatically (5378 ns on E5-2699).

Signed-off-by Like Xu <[email protected]>

---
arch/x86/kvm/pmu.c | 11 -----------
arch/x86/kvm/pmu.h | 11 +++++++++++
arch/x86/kvm/vmx/pmu_intel.c | 10 ++++------

  3 files changed, 15 insertions(+), 17 deletions(-)

arch/x86/kvm/pmu.c +0 ~~-11~~

index d1f8ca57d354..527a8bb85080 100644
@@ -437,17 +437,6 @@ void kvm_pmu_init(struct kvm_vcpu *vcpu)
       kvm_pmu_refresh(vcpu);
   }
-static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
-{
-    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
-
-    if (pmc_is_fixed(pmc))
-        return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
-            pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
-
-    return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
-}
-
   /* Release perf_events for vPMCs that have been unused for a full time slice.  */
   void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
   {

arch/x86/kvm/pmu.h +11 -0

index d7da2b9e0755..cd112e825d2c 100644
@@ -138,6 +138,17 @@ static inline u64 get_sample_period(struct kvm_pmc 
 *pmc, u64 counter_value)
       return sample_period;
   }
+static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
+{
+    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
+
+    if (pmc_is_fixed(pmc))
+        return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+            pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
+
+    return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
+}
+
   void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
   void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
   void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

arch/x86/kvm/vmx/pmu_intel.c +4 -6

index 7c857737b438..20f654a0c09b 100644
@@ -263,15 +263,13 @@ static int intel_pmu_set_msr(struct kvm_vcpu 
 *vcpu, struct msr_data *msr_info)
               if (!msr_info->host_initiated)
                   data = (s64)(s32)data;
               pmc->counter += data - pmc_read_counter(pmc);
-            if (pmc->perf_event)
-                perf_event_period(pmc->perf_event,
-                          get_sample_period(pmc, data));
+            if (pmc_speculative_in_use(pmc))
+                kvm_make_request(KVM_REQ_PMU, vcpu);
               return 0;
           } else if ((pmc = get_fixed_pmc(pmu, msr))) {
               pmc->counter += data - pmc_read_counter(pmc);
-            if (pmc->perf_event)
-                perf_event_period(pmc->perf_event,
-                          get_sample_period(pmc, data));
+            if (pmc_speculative_in_use(pmc))
+                kvm_make_request(KVM_REQ_PMU, vcpu);
               return 0;
           } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {

if (data == pmc->eventsel)

kbuild test robot

build bot

2020-03-17 16:28 UTC #6 lore raw

In reply to Like Xu

Thank you for the patch! Yet something to improve:

Hi Like,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on kvm/linux-next]
[also build test ERROR on next-20200317]
[cannot apply to v5.6-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Like-Xu/kvm-x86-Reduce-counter-period-change-overhead-and-delay-the-effective-time/20200317-212521
base:   https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.5.0-5) 7.5.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386

If you fix the issue, kindly add following tag

Reported-by kbuild test robot <[email protected]>

All errors (new ones prefixed by >>):

arch/x86/kvm/vmx/pmu_intel.c: In function 'intel_pmu_set_msr':

>> arch/x86/kvm/vmx/pmu_intel.c:287:13: error: invalid storage class for function 'intel_pmu_refresh'
    static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
                ^~~~~~~~~~~~~~~~~
   arch/x86/kvm/vmx/pmu_intel.c:287:1: error: ISO C90 forbids mixed declarations and code [-Werror=declaration-after-statement]
    static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
    ^~~~~~
>> arch/x86/kvm/vmx/pmu_intel.c:354:13: error: invalid storage class for function 'intel_pmu_init'
    static void intel_pmu_init(struct kvm_vcpu *vcpu)
                ^~~~~~~~~~~~~~
>> arch/x86/kvm/vmx/pmu_intel.c:374:13: error: invalid storage class for function 'intel_pmu_reset'
    static void intel_pmu_reset(struct kvm_vcpu *vcpu)
                ^~~~~~~~~~~~~~~
>> arch/x86/kvm/vmx/pmu_intel.c:412:1: error: expected declaration or statement at end of input
    };
    ^
   arch/x86/kvm/vmx/pmu_intel.c:398:20: error: unused variable 'intel_pmu_ops' [-Werror=unused-variable]
    struct kvm_pmu_ops intel_pmu_ops = {
                       ^~~~~~~~~~~~~
>> arch/x86/kvm/vmx/pmu_intel.c:412:1: error: expected declaration or statement at end of input
    };
    ^

At top level:
arch/x86/kvm/vmx/pmu_intel.c:223:12: error: 'intel_pmu_set_msr' defined but not used [-Werror=unused-function]
static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
^~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

vim +/intel_pmu_refresh +287 arch/x86/kvm/vmx/pmu_intel.c

25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  286  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19 @287  static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  288  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  289  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  290  	struct x86_pmu_capability x86_pmu;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  291  	struct kvm_cpuid_entry2 *entry;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  292  	union cpuid10_eax eax;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  293  	union cpuid10_edx edx;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  294  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  295  	pmu->nr_arch_gp_counters = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  296  	pmu->nr_arch_fixed_counters = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  297  	pmu->counter_bitmask[KVM_PMC_GP] = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  298  	pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  299  	pmu->version = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  300  	pmu->reserved_bits = 0xffffffff00200000ull;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  301  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  302  	entry = kvm_find_cpuid_entry(vcpu, 0xa, 0);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  303  	if (!entry)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  304  		return;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  305  	eax.full = entry->eax;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  306  	edx.full = entry->edx;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  307  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  308  	pmu->version = eax.split.version_id;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  309  	if (!pmu->version)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  310  		return;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  311  
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  312  	perf_get_x86_pmu_capability(&x86_pmu);
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  313  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  314  	pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters,
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  315  					 x86_pmu.num_counters_gp);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  316  	pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  317  	pmu->available_event_types = ~entry->ebx &
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  318  					((1ull << eax.split.mask_length) - 1);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  319  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  320  	if (pmu->version == 1) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  321  		pmu->nr_arch_fixed_counters = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  322  	} else {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  323  		pmu->nr_arch_fixed_counters =
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  324  			min_t(int, edx.split.num_counters_fixed,
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  325  			      x86_pmu.num_counters_fixed);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  326  		pmu->counter_bitmask[KVM_PMC_FIXED] =
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  327  			((u64)1 << edx.split.bit_width_fixed) - 1;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  328  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  329  
34b0dadbdf698f arch/x86/kvm/pmu_intel.c     Radim Krčmář        2017-05-18  330  	pmu->global_ctrl = ((1ull << pmu->nr_arch_gp_counters) - 1) |
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  331  		(((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  332  	pmu->global_ctrl_mask = ~pmu->global_ctrl;
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  333  	pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  334  			& ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  335  			    MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
a1bead2abaa162 arch/x86/kvm/vmx/pmu_intel.c Sean Christopherson 2020-03-02  336  	if (vmx_pt_mode_is_host_guest())
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  337  		pmu->global_ovf_ctrl_mask &=
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  338  				~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  339  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  340  	entry = kvm_find_cpuid_entry(vcpu, 7, 0);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  341  	if (entry &&
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  342  	    (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &&
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  343  	    (entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  344  		pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  345  
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  346  	bitmap_set(pmu->all_valid_pmc_idx,
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  347  		0, pmu->nr_arch_gp_counters);
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  348  	bitmap_set(pmu->all_valid_pmc_idx,
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  349  		INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);
03a8871add9521 arch/x86/kvm/vmx/pmu_intel.c Oliver Upton        2019-11-13  350  
03a8871add9521 arch/x86/kvm/vmx/pmu_intel.c Oliver Upton        2019-11-13  351  	nested_vmx_pmu_entry_exit_ctls_update(vcpu);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  352  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  353  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19 @354  static void intel_pmu_init(struct kvm_vcpu *vcpu)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  355  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  356  	int i;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  357  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  358  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  359  	for (i = 0; i < INTEL_PMC_MAX_GENERIC; i++) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  360  		pmu->gp_counters[i].type = KVM_PMC_GP;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  361  		pmu->gp_counters[i].vcpu = vcpu;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  362  		pmu->gp_counters[i].idx = i;
a6da0d77e98e94 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  363  		pmu->gp_counters[i].current_config = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  364  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  365  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  366  	for (i = 0; i < INTEL_PMC_MAX_FIXED; i++) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  367  		pmu->fixed_counters[i].type = KVM_PMC_FIXED;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  368  		pmu->fixed_counters[i].vcpu = vcpu;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  369  		pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED;
a6da0d77e98e94 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  370  		pmu->fixed_counters[i].current_config = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  371  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  372  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  373  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19 @374  static void intel_pmu_reset(struct kvm_vcpu *vcpu)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  375  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  376  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  377  	struct kvm_pmc *pmc = NULL;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  378  	int i;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  379  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  380  	for (i = 0; i < INTEL_PMC_MAX_GENERIC; i++) {
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  381  		pmc = &pmu->gp_counters[i];
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  382  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  383  		pmc_stop_counter(pmc);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  384  		pmc->counter = pmc->eventsel = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  385  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  386  
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  387  	for (i = 0; i < INTEL_PMC_MAX_FIXED; i++) {
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  388  		pmc = &pmu->fixed_counters[i];
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  389  
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  390  		pmc_stop_counter(pmc);
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  391  		pmc->counter = 0;
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  392  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  393  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  394  	pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status =
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  395  		pmu->global_ovf_ctrl = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  396  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  397  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  398  struct kvm_pmu_ops intel_pmu_ops = {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  399  	.find_arch_event = intel_find_arch_event,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  400  	.find_fixed_event = intel_find_fixed_event,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  401  	.pmc_is_enabled = intel_pmc_is_enabled,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  402  	.pmc_idx_to_pmc = intel_pmc_idx_to_pmc,
98ff80f5b788c1 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  403  	.rdpmc_ecx_to_pmc = intel_rdpmc_ecx_to_pmc,
c900c156c51830 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  404  	.msr_idx_to_pmc = intel_msr_idx_to_pmc,
98ff80f5b788c1 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  405  	.is_valid_rdpmc_ecx = intel_is_valid_rdpmc_ecx,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  406  	.is_valid_msr = intel_is_valid_msr,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  407  	.get_msr = intel_pmu_get_msr,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  408  	.set_msr = intel_pmu_set_msr,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  409  	.refresh = intel_pmu_refresh,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  410  	.init = intel_pmu_init,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  411  	.reset = intel_pmu_reset,
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19 @412  };

:::::: The code at line 287 was first introduced by commit
:::::: 25462f7f5295e2d3e9c2b31761ac95f0b3c8562f KVM: x86/vPMU: Define kvm_pmu_ops to support vPMU function dispatch

:::::: TO: Wei Huang <[email protected]>
:::::: CC: Paolo Bonzini <[email protected]>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

kbuild test robot

build bot

2020-03-17 21:38 UTC #7 lore raw

In reply to Like Xu

Thank you for the patch! Yet something to improve:

Hi Like,

Thank you for the patch! Yet something to improve:

url:    https://github.com/0day-ci/linux/commits/Like-Xu/kvm-x86-Reduce-counter-period-change-overhead-and-delay-the-effective-time/20200317-212521
base:   https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next
config: x86_64-rhel (attached as .config)
compiler: gcc-7 (Debian 7.5.0-5) 7.5.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64

If you fix the issue, kindly add following tag

Reported-by kbuild test robot <[email protected]>

All errors (new ones prefixed by >>):

arch/x86/kvm/vmx/pmu_intel.c: In function 'intel_pmu_set_msr':
arch/x86/kvm/vmx/pmu_intel.c:287:13: error: invalid storage class for function 'intel_pmu_refresh'
static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
^~~~~~~~~~~~~~~~~

>> arch/x86/kvm/vmx/pmu_intel.c:287:1: error: ISO C90 forbids mixed declarations and code [-Werror=declaration-after-statement]
    static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
    ^~~~~~
   arch/x86/kvm/vmx/pmu_intel.c:354:13: error: invalid storage class for function 'intel_pmu_init'
    static void intel_pmu_init(struct kvm_vcpu *vcpu)
                ^~~~~~~~~~~~~~
   arch/x86/kvm/vmx/pmu_intel.c:374:13: error: invalid storage class for function 'intel_pmu_reset'
    static void intel_pmu_reset(struct kvm_vcpu *vcpu)
                ^~~~~~~~~~~~~~~
   arch/x86/kvm/vmx/pmu_intel.c:412:1: error: expected declaration or statement at end of input
    };
    ^
>> arch/x86/kvm/vmx/pmu_intel.c:398:20: error: unused variable 'intel_pmu_ops' [-Werror=unused-variable]
    struct kvm_pmu_ops intel_pmu_ops = {
                       ^~~~~~~~~~~~~
   arch/x86/kvm/vmx/pmu_intel.c:412:1: error: expected declaration or statement at end of input
    };
    ^
   At top level:
>> arch/x86/kvm/vmx/pmu_intel.c:223:12: error: 'intel_pmu_set_msr' defined but not used [-Werror=unused-function]

static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
^~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

vim +287 arch/x86/kvm/vmx/pmu_intel.c

25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  222  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19 @223  static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  224  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  225  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  226  	struct kvm_pmc *pmc;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  227  	u32 msr = msr_info->index;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  228  	u64 data = msr_info->data;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  229  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  230  	switch (msr) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  231  	case MSR_CORE_PERF_FIXED_CTR_CTRL:
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  232  		if (pmu->fixed_ctr_ctrl == data)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  233  			return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  234  		if (!(data & 0xfffffffffffff444ull)) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  235  			reprogram_fixed_counters(pmu, data);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  236  			return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  237  		}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  238  		break;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  239  	case MSR_CORE_PERF_GLOBAL_STATUS:
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  240  		if (msr_info->host_initiated) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  241  			pmu->global_status = data;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  242  			return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  243  		}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  244  		break; /* RO MSR */
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  245  	case MSR_CORE_PERF_GLOBAL_CTRL:
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  246  		if (pmu->global_ctrl == data)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  247  			return 0;
9477f4449b0b01 arch/x86/kvm/vmx/pmu_intel.c Oliver Upton        2019-11-13  248  		if (kvm_valid_perf_global_ctrl(pmu, data)) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  249  			global_ctrl_changed(pmu, data);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  250  			return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  251  		}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  252  		break;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  253  	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  254  		if (!(data & pmu->global_ovf_ctrl_mask)) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  255  			if (!msr_info->host_initiated)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  256  				pmu->global_status &= ~data;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  257  			pmu->global_ovf_ctrl = data;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  258  			return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  259  		}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  260  		break;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  261  	default:
2924b52117b281 arch/x86/kvm/vmx/pmu_intel.c Paolo Bonzini       2019-05-20  262  		if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) {
4400cf546b4bb6 arch/x86/kvm/vmx/pmu_intel.c Eric Hankland       2020-01-27  263  			if (!msr_info->host_initiated)
4400cf546b4bb6 arch/x86/kvm/vmx/pmu_intel.c Eric Hankland       2020-01-27  264  				data = (s64)(s32)data;
4400cf546b4bb6 arch/x86/kvm/vmx/pmu_intel.c Eric Hankland       2020-01-27  265  			pmc->counter += data - pmc_read_counter(pmc);
67c68f224f883f arch/x86/kvm/vmx/pmu_intel.c Like Xu             2020-03-17  266  			if (pmc_speculative_in_use(pmc)) {
67c68f224f883f arch/x86/kvm/vmx/pmu_intel.c Like Xu             2020-03-17  267  				kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
2924b52117b281 arch/x86/kvm/vmx/pmu_intel.c Paolo Bonzini       2019-05-20  268  			return 0;
2924b52117b281 arch/x86/kvm/vmx/pmu_intel.c Paolo Bonzini       2019-05-20  269  		} else if ((pmc = get_fixed_pmc(pmu, msr))) {
4400cf546b4bb6 arch/x86/kvm/vmx/pmu_intel.c Eric Hankland       2020-01-27  270  			pmc->counter += data - pmc_read_counter(pmc);
67c68f224f883f arch/x86/kvm/vmx/pmu_intel.c Like Xu             2020-03-17  271  			if (pmc_speculative_in_use(pmc)) {
67c68f224f883f arch/x86/kvm/vmx/pmu_intel.c Like Xu             2020-03-17  272  				kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  273  			return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  274  		} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  275  			if (data == pmc->eventsel)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  276  				return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  277  			if (!(data & pmu->reserved_bits)) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  278  				reprogram_gp_counter(pmc, data);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  279  				return 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  280  			}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  281  		}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  282  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  283  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  284  	return 1;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  285  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  286  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19 @287  static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  288  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  289  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  290  	struct x86_pmu_capability x86_pmu;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  291  	struct kvm_cpuid_entry2 *entry;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  292  	union cpuid10_eax eax;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  293  	union cpuid10_edx edx;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  294  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  295  	pmu->nr_arch_gp_counters = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  296  	pmu->nr_arch_fixed_counters = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  297  	pmu->counter_bitmask[KVM_PMC_GP] = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  298  	pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  299  	pmu->version = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  300  	pmu->reserved_bits = 0xffffffff00200000ull;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  301  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  302  	entry = kvm_find_cpuid_entry(vcpu, 0xa, 0);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  303  	if (!entry)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  304  		return;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  305  	eax.full = entry->eax;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  306  	edx.full = entry->edx;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  307  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  308  	pmu->version = eax.split.version_id;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  309  	if (!pmu->version)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  310  		return;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  311  
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  312  	perf_get_x86_pmu_capability(&x86_pmu);
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  313  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  314  	pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters,
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  315  					 x86_pmu.num_counters_gp);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  316  	pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  317  	pmu->available_event_types = ~entry->ebx &
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  318  					((1ull << eax.split.mask_length) - 1);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  319  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  320  	if (pmu->version == 1) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  321  		pmu->nr_arch_fixed_counters = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  322  	} else {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  323  		pmu->nr_arch_fixed_counters =
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  324  			min_t(int, edx.split.num_counters_fixed,
e1fba49cc1e965 arch/x86/kvm/vmx/pmu_intel.c Jim Mattson         2019-09-30  325  			      x86_pmu.num_counters_fixed);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  326  		pmu->counter_bitmask[KVM_PMC_FIXED] =
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  327  			((u64)1 << edx.split.bit_width_fixed) - 1;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  328  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  329  
34b0dadbdf698f arch/x86/kvm/pmu_intel.c     Radim Krčmář        2017-05-18  330  	pmu->global_ctrl = ((1ull << pmu->nr_arch_gp_counters) - 1) |
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  331  		(((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  332  	pmu->global_ctrl_mask = ~pmu->global_ctrl;
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  333  	pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  334  			& ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  335  			    MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
a1bead2abaa162 arch/x86/kvm/vmx/pmu_intel.c Sean Christopherson 2020-03-02  336  	if (vmx_pt_mode_is_host_guest())
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  337  		pmu->global_ovf_ctrl_mask &=
c715eb9fe9027e arch/x86/kvm/vmx/pmu_intel.c Luwei Kang          2019-02-18  338  				~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  339  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  340  	entry = kvm_find_cpuid_entry(vcpu, 7, 0);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  341  	if (entry &&
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  342  	    (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &&
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  343  	    (entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  344  		pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  345  
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  346  	bitmap_set(pmu->all_valid_pmc_idx,
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  347  		0, pmu->nr_arch_gp_counters);
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  348  	bitmap_set(pmu->all_valid_pmc_idx,
b35e5548b41131 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  349  		INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);
03a8871add9521 arch/x86/kvm/vmx/pmu_intel.c Oliver Upton        2019-11-13  350  
03a8871add9521 arch/x86/kvm/vmx/pmu_intel.c Oliver Upton        2019-11-13  351  	nested_vmx_pmu_entry_exit_ctls_update(vcpu);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  352  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  353  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  354  static void intel_pmu_init(struct kvm_vcpu *vcpu)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  355  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  356  	int i;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  357  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  358  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  359  	for (i = 0; i < INTEL_PMC_MAX_GENERIC; i++) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  360  		pmu->gp_counters[i].type = KVM_PMC_GP;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  361  		pmu->gp_counters[i].vcpu = vcpu;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  362  		pmu->gp_counters[i].idx = i;
a6da0d77e98e94 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  363  		pmu->gp_counters[i].current_config = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  364  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  365  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  366  	for (i = 0; i < INTEL_PMC_MAX_FIXED; i++) {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  367  		pmu->fixed_counters[i].type = KVM_PMC_FIXED;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  368  		pmu->fixed_counters[i].vcpu = vcpu;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  369  		pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED;
a6da0d77e98e94 arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-10-27  370  		pmu->fixed_counters[i].current_config = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  371  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  372  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  373  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  374  static void intel_pmu_reset(struct kvm_vcpu *vcpu)
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  375  {
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  376  	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  377  	struct kvm_pmc *pmc = NULL;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  378  	int i;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  379  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  380  	for (i = 0; i < INTEL_PMC_MAX_GENERIC; i++) {
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  381  		pmc = &pmu->gp_counters[i];
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  382  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  383  		pmc_stop_counter(pmc);
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  384  		pmc->counter = pmc->eventsel = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  385  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  386  
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  387  	for (i = 0; i < INTEL_PMC_MAX_FIXED; i++) {
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  388  		pmc = &pmu->fixed_counters[i];
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  389  
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  390  		pmc_stop_counter(pmc);
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  391  		pmc->counter = 0;
4d1a082da968ff arch/x86/kvm/vmx/pmu_intel.c Like Xu             2019-07-17  392  	}
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  393  
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  394  	pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status =
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  395  		pmu->global_ovf_ctrl = 0;
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  396  }
25462f7f5295e2 arch/x86/kvm/pmu_intel.c     Wei Huang           2015-06-19  397

25462f7f5295e2 arch/x86/kvm/pmu_intel.c Wei Huang 2015-06-19 @398 struct kvm_pmu_ops intel_pmu_ops = {

:::::: The code at line 287 was first introduced by commit
:::::: 25462f7f5295e2d3e9c2b31761ac95f0b3c8562f KVM: x86/vPMU: Define kvm_pmu_ops to support vPMU function dispatch

:::::: TO: Wei Huang <[email protected]>
:::::: CC: Paolo Bonzini <[email protected]>

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