soc: aspeed: Add XDMA engine driver
Subsystems (2)
v10 cover soc: aspeed: Add XDMA engine driver
This series adds a driver to control the Aspeed XDMA engine embedded in the AST2500 and AST2600. The XDMA engine performs automatic DMA operations over PCI-E between the Aspeed SOC (acting as a BMC) and a host processor.
Changes since v9:
- Remove the kernel command queue
- Use memcpy_toio instead to copy commands to the buffer
- Free the client's genalloc'd memory in the release method
- Switch the bindings documentation to yaml
- Add patches to fix SCU interrupt controller include
Changes since v8:
- Use DMA API to allocate memory from reserved region.
- Fix the driver for the AST2500 by keeping the command queue in kernel memory and copying the whole buffer to the reserved memory area before starting the operation.
- Add krefs to the client structure to prevent use-after-free.
- Switch reset-names binding to "device", "root-complex"
Eddie James (7):
dt-bindings: soc: Add Aspeed XDMA Engine
soc: aspeed: Add XDMA Engine Driver
soc: aspeed: xdma: Add user interface
soc: aspeed: xdma: Add reset ioctl
ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset
ARM: dts: Aspeed: AST2500: Add missing SCU interrupt controller
include
ARM: dts: Aspeed: AST2600: Add missing SCU interrupt controller
include
.../devicetree/bindings/soc/aspeed/xdma.yaml | 108 ++ MAINTAINERS | 8 + arch/arm/boot/dts/aspeed-g5.dtsi | 1 + arch/arm/boot/dts/aspeed-g6.dtsi | 4 +- drivers/soc/aspeed/Kconfig | 8 + drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-xdma.c | 1106 +++++++++++++++++ include/uapi/linux/aspeed-xdma.h | 42 + 8 files changed, 1277 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.yaml create mode 100644 drivers/soc/aspeed/aspeed-xdma.c create mode 100644 include/uapi/linux/aspeed-xdma.h
Signature · 1 line
2.24.0
PATCH v10 1/7 dt-bindings: soc: Add Aspeed XDMA Engine
Document the bindings for the Aspeed AST25XX and AST26XX XDMA engine.
--- .../devicetree/bindings/soc/aspeed/xdma.yaml | 108 ++++++++++++++++++ MAINTAINERS | 6 + 2 files changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.yaml
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +108 -0
@@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/aspeed/xdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed AST25XX and AST26XX XDMA Engine + +maintainers: + - Eddie James <[email protected]> + +description: | + This binding describes the XDMA Engine embedded in the AST2500 and AST2600 + SOCs. The XDMA engine can perform automatic DMA operations over PCI between + the SOC (acting as a BMC) and a host processor. + +properties: + compatible: + enum: + - aspeed,ast2500-xdma + - aspeed,ast2600-xdma + + reg: + items: + - description: engine register space + + clocks: + maxItems: 1 + + resets: + minItems: 1 + maxItems: 2 + + reset-names: + maxItems: 2 + items: + - const: device + - const: root-complex + + interrupts-extended: + maxItems: 2 + items: + - description: global interrupt for the XDMA engine + - description: PCI-E reset or PERST interrupt + + aspeed,scu: + description: a reference to the System Control Unit node of the Aspeed SOC. + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + + aspeed,pcie-device: + description: describes which PCI-E device the XDMA engine should use + allOf: + - $ref: /schemas/types.yaml#/definitions/string + - oneOf: + - items: + - const: bmc + - items: + - const: vga + +required: + - compatible + - reg + - clocks + - resets + - interrupts-extended + - aspeed,scu + - memory-region + +if: + properties: + compatible: + contains: + const: aspeed,ast2600-xdma +then: + required: + - reset-names + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> + syscon: syscon at 1e6e2000 { + reg = <0x1e6e2000 0x1000>; + ranges = <0 0x1e6e2000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + #clock-cells = <1>; + #reset-cells = <1>; + scu_ic0: interrupt-controller at 560 { + reg = <0x560 0x4>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + xdma at 1e6e7000 { + compatible = "aspeed,ast2600-xdma"; + reg = <0x1e6e7000 0x100>; + clocks = <&syscon ASPEED_CLK_GATE_BCLK>; + resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; + reset-names = "device", "root-complex"; + interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; + aspeed,scu = <&syscon>; + aspeed,pcie-device = "bmc"; + memory-region = <&vga_memory>; + };
MAINTAINERS +6 -0
@@ -2774,6 +2774,12 @@ S: Maintained F: Documentation/devicetree/bindings/media/aspeed-video.txt F: drivers/media/platform/aspeed-video.c +ASPEED XDMA ENGINE DRIVER +M: Eddie James <[email protected]> +L: linux-aspeed at lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/soc/aspeed/xdma.yaml + ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS M: Corentin Chary <[email protected]> L: acpi4asus-user at lists.sourceforge.net
Signature · 1 line
2.24.0
Rob Herring
maintainerRe: [PATCH v10 1/7] dt-bindings: soc: Add Aspeed XDMA Engine
Quoted 16 lines · Eddie James
Document the bindings for the Aspeed AST25XX and AST26XX XDMA engine.
Signed-off-by Eddie James <[email protected]>Reviewed-by Andrew Jeffery <[email protected]>--- .../devicetree/bindings/soc/aspeed/xdma.yaml | 108 ++++++++++++++++++ MAINTAINERS | 6 + 2 files changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.yamlDocumentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +0
-0
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml line 1
Quoted 1 line
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +1
-0@@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later)
Dual license new bindings please:
(GPL-2.0-only OR BSD-2-Clause)
Quoted 14 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +14
-0+%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/aspeed/xdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed AST25XX and AST26XX XDMA Engine + +maintainers: + - Eddie James <[email protected]> + +description: | + This binding describes the XDMA Engine embedded in the AST2500 and AST2600 + SOCs. The XDMA engine can perform automatic DMA operations over PCI between + the SOC (acting as a BMC) and a host processor.
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml line 25
Quoted 10 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +10
-0+ +properties: + compatible: + enum: + - aspeed,ast2500-xdma + - aspeed,ast2600-xdma + + reg: + items: + - description: engine register space
That's all 'reg' properties. You don't need a description for a single entry. Just:
reg:
maxItems: 1
Quoted 5 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +5
-0+ + clocks: + maxItems: 1 + + resets:
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml line 40
Quoted 10 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +10
-0+ minItems: 1 + maxItems: 2 + + reset-names: + maxItems: 2 + items: + - const: device + - const: root-complex + + interrupts-extended:
Just use 'interrupts'. The tools fix things up so both work.
Quoted 9 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +9
-0+ maxItems: 2 + items: + - description: global interrupt for the XDMA engine + - description: PCI-E reset or PERST interrupt + + aspeed,scu: + description: a reference to the System Control Unit node of the Aspeed SOC. + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml line 59
Quoted 10 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +10
-0+ + aspeed,pcie-device: + description: describes which PCI-E device the XDMA engine should use + allOf: + - $ref: /schemas/types.yaml#/definitions/string + - oneOf: + - items: + - const: bmc + - items: + - const: vga
The oneOf (inclusive) can be just:
enum: [ bmc, vga ]
Quoted 69 lines
Documentation/devicetree/bindings/soc/aspeed/xdma.yaml new file +49
-0+ +required: + - compatible + - reg + - clocks + - resets + - interrupts-extended + - aspeed,scu + - memory-region + +if: + properties: + compatible: + contains: + const: aspeed,ast2600-xdma +then: + required: + - reset-names + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> + syscon: syscon at 1e6e2000 { + reg = <0x1e6e2000 0x1000>; + ranges = <0 0x1e6e2000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + #clock-cells = <1>; + #reset-cells = <1>; + scu_ic0: interrupt-controller at 560 { + reg = <0x560 0x4>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + xdma at 1e6e7000 { + compatible = "aspeed,ast2600-xdma"; + reg = <0x1e6e7000 0x100>; + clocks = <&syscon ASPEED_CLK_GATE_BCLK>; + resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; + reset-names = "device", "root-complex"; + interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; + aspeed,scu = <&syscon>; + aspeed,pcie-device = "bmc"; + memory-region = <&vga_memory>; + };MAINTAINERS +6
-0@@ -2774,6 +2774,12 @@ S: Maintained F: Documentation/devicetree/bindings/media/aspeed-video.txt F: drivers/media/platform/aspeed-video.c +ASPEED XDMA ENGINE DRIVER +M: Eddie James <[email protected]> +L: linux-aspeed at lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/soc/aspeed/xdma.yaml + ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS M: Corentin Chary <[email protected]> L: acpi4asus-user at lists.sourceforge.netSignature · 1 line
2.24.0
PATCH v10 2/7 soc: aspeed: Add XDMA Engine Driver
In reply to Eddie JamesThe XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI DMA operations between the SOC (acting as a BMC) and a host processor in a server.
This commit adds a driver to control the XDMA engine and adds functions to initialize the hardware and memory and start DMA operations.
--- MAINTAINERS | 2 + drivers/soc/aspeed/Kconfig | 8 + drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-xdma.c | 878 +++++++++++++++++++++++++++++++ include/uapi/linux/aspeed-xdma.h | 38 ++ 5 files changed, 927 insertions(+) create mode 100644 drivers/soc/aspeed/aspeed-xdma.c create mode 100644 include/uapi/linux/aspeed-xdma.h
MAINTAINERS +2 -0
@@ -2779,6 +2779,8 @@ M: Eddie James <[email protected]> L: linux-aspeed at lists.ozlabs.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/soc/aspeed/xdma.yaml +F: drivers/soc/aspeed/aspeed-xdma.c +F: include/uapi/linux/aspeed-xdma.h ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS M: Corentin Chary <[email protected]>
drivers/soc/aspeed/Kconfig +8 -0
@@ -29,4 +29,12 @@ config ASPEED_P2A_CTRL ioctl()s, the driver also provides an interface for userspace mappings to a pre-defined region. +config ASPEED_XDMA + tristate "Aspeed XDMA Engine Driver" + depends on SOC_ASPEED && REGMAP && MFD_SYSCON && HAS_DMA + help + Enable support for the Aspeed XDMA Engine found on the Aspeed AST2XXX + SOCs. The XDMA engine can perform automatic PCI DMA operations + between the AST2XXX (acting as a BMC) and a host processor. + endmenu
drivers/soc/aspeed/Makefile +1 -0
@@ -2,3 +2,4 @@ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o +obj-$(CONFIG_ASPEED_XDMA) += aspeed-xdma.o
drivers/soc/aspeed/aspeed-xdma.c new file +878 -0
878 lines not on this page · raw message
include/uapi/linux/aspeed-xdma.h new file +38 -0
@@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* Copyright IBM Corp 2019 */ + +#ifndef _UAPI_LINUX_ASPEED_XDMA_H_ +#define _UAPI_LINUX_ASPEED_XDMA_H_ + +#include <linux/types.h> + +/* +* aspeed_xdma_direction +* +* ASPEED_XDMA_DIRECTION_DOWNSTREAM: transfers data from the host to the BMC +* +* ASPEED_XDMA_DIRECTION_UPSTREAM: transfers data from the BMC to the host +*/ +enum aspeed_xdma_direction { +ASPEED_XDMA_DIRECTION_DOWNSTREAM =0 , +ASPEED_XDMA_DIRECTION_UPSTREAM , +}; + +/* +* aspeed_xdma_op +* +* host_addr: the DMA address on the host side, typically configured by PCI +* subsystem +* +* len: the size of the transfer in bytes +* +* direction: an enumerator indicating the direction of the DMA operation; see +* enum aspeed_xdma_direction +*/ +struct aspeed_xdma_op { +__u64 host_addr; +__u32 len; +__u32 direction; +}; + +#endif /* _UAPI_LINUX_ASPEED_XDMA_H_ */
Signature · 1 line
2.24.0
PATCH v10 3/7 soc: aspeed: xdma: Add user interface
In reply to Eddie JamesThis commits adds a miscdevice to provide a user interface to the XDMA engine. The interface provides the write operation to start DMA operations. The DMA parameters are passed as the data to the write call. The actual data to transfer is NOT passed through write. Note that both directions of DMA operation are accomplished through the write command; BMC to host and host to BMC.
The XDMA driver reserves an area of physical memory for DMA operations, as the XDMA engine is restricted to accessing certain physical memory areas on some platforms. This memory forms a pool from which users can allocate pages for their usage with calls to mmap. The space allocated by a client will be the space used in the DMA operation. For an "upstream" (BMC to host) operation, the data in the client's area will be transferred to the host. For a "downstream" (host to BMC) operation, the host data will be placed in the client's memory area.
Poll is also provided in order to determine when the DMA operation is complete for non-blocking IO.
--- drivers/soc/aspeed/aspeed-xdma.c | 200 ++++++++++++++++++++++++++++++- 1 file changed, 198 insertions(+), 2 deletions(-)
drivers/soc/aspeed/aspeed-xdma.c +198 -2
@@ -13,6 +13,7 @@#include <linux/io.h> #include <linux/jiffies.h> #include <linux/mfd/syscon.h> +#include <linux/miscdevice.h> #include <linux/module.h> #include <linux/mutex.h> #include <linux/of_device.h>
@@ -229,6 +230,8 @@ struct aspeed_xdma {void *mem_virt;dma_addr_t cmdq_phys;struct gen_pool *pool; + +struct miscdevice misc; };struct aspeed_xdma_client {
@@ -563,6 +566,187 @@ static irqreturn_t aspeed_xdma_pcie_irq(int irq, void *arg)return IRQ_HANDLED ; } +static ssize_t aspeed_xdma_write (struct file *file,const char __user *buf, +size_t len,loff_t *offset) +{ +int rc; +unsigned int num_cmds; +struct aspeed_xdma_op op; +struct aspeed_xdma_cmd cmds[2 ]; +struct aspeed_xdma_client *client = file->private_data; +struct aspeed_xdma *ctx = client->ctx; + +if (len !=sizeof (op)) +return -EINVAL ; + + rc =copy_from_user (&op, buf, len); +if (rc) +return rc; + +if (!op.len || op.len > client->size || + op.direction >ASPEED_XDMA_DIRECTION_UPSTREAM ) +return -EINVAL ; + + num_cmds = ctx->chip->set_cmd (ctx, cmds, &op, client->phys); +do { + rc =aspeed_xdma_start (ctx, num_cmds, cmds, !!op.direction, + client); +if (!rc) +break ; + +if ((file->f_flags &O_NONBLOCK ) || rc != -EBUSY ) +return rc; + + rc =wait_event_interruptible (ctx->wait, + !(ctx->current_client || + ctx->in_reset)); + }while (!rc); + +if (rc) +return -EINTR ; + +if (!(file->f_flags &O_NONBLOCK )) { + rc =wait_event_interruptible (ctx->wait, !client->in_progress); +if (rc) +return -EINTR ; + +if (client->error) +return -EIO ; + } + +return len; +} + +static __poll_t aspeed_xdma_poll (struct file *file, +struct poll_table_struct *wait) +{ +__poll_t mask =0 ; +__poll_t req =poll_requested_events (wait); +struct aspeed_xdma_client *client = file->private_data; +struct aspeed_xdma *ctx = client->ctx; + +if (req & (EPOLLIN |EPOLLRDNORM )) { +if (READ_ONCE (client->in_progress)) +poll_wait (file, &ctx->wait, wait); + +if (!READ_ONCE (client->in_progress)) { +if (READ_ONCE (client->error)) + mask |=EPOLLERR ; +else + mask |=EPOLLIN |EPOLLRDNORM ; + } + } + +if (req & (EPOLLOUT |EPOLLWRNORM )) { +if (READ_ONCE (ctx->current_client)) +poll_wait (file, &ctx->wait, wait); + +if (!READ_ONCE (ctx->current_client)) + mask |=EPOLLOUT |EPOLLWRNORM ; + } + +return mask; +} + +static void aspeed_xdma_vma_close (struct vm_area_struct *vma) +{ +int rc; +struct aspeed_xdma_client *client = vma->vm_private_data; + + rc =wait_event_interruptible (client->ctx->wait, !client->in_progress); +if (rc) +return ; + +gen_pool_free (client->ctx->pool, (unsigned long )client->virt, + client->size); + + client->virt =NULL ; + client->phys =0 ; + client->size =0 ; +} + +static const struct vm_operations_struct aspeed_xdma_vm_ops = { + .close = aspeed_xdma_vma_close, +}; + +static int aspeed_xdma_mmap (struct file *file,struct vm_area_struct *vma) +{ +int rc; +struct aspeed_xdma_client *client = file->private_data; +struct aspeed_xdma *ctx = client->ctx; + +/* restrict file to one mapping */ +if (client->size) +return -EBUSY ; + + client->size = vma->vm_end - vma->vm_start; + client->virt =gen_pool_dma_alloc (ctx->pool, client->size, + &client->phys); +if (!client->virt) { + client->phys =0 ; + client->size =0 ; +return -ENOMEM ; + } + + vma->vm_pgoff = (client->phys - ctx->mem_phys) >>PAGE_SHIFT ; + vma->vm_ops = &aspeed_xdma_vm_ops; + vma->vm_private_data = client; + vma->vm_page_prot =pgprot_noncached (vma->vm_page_prot); + + rc =io_remap_pfn_range (vma, vma->vm_start, client->phys >>PAGE_SHIFT , + client->size, vma->vm_page_prot); +if (rc) { +dev_warn (ctx->dev,"mmap err: v[%08lx] to p[%08x], s[%08x]\n" , + vma->vm_start, (u32 )client->phys, client->size); + +gen_pool_free (ctx->pool, (unsigned long )client->virt, + client->size); + + client->virt =NULL ; + client->phys =0 ; + client->size =0 ; +return rc; + } + +dev_dbg (ctx->dev,"mmap: v[%08lx] to p[%08x], s[%08x]\n" , + vma->vm_start, (u32 )client->phys, client->size); + +return 0 ; +} + +static int aspeed_xdma_open (struct inode *inode,struct file *file) +{ +struct miscdevice *misc = file->private_data; + struct aspeed_xdma *ctx = container_of(misc, struct aspeed_xdma, misc); +struct aspeed_xdma_client *client =kzalloc (sizeof (*client), +GFP_KERNEL ); + +if (!client) +return -ENOMEM ; + +kref_init (&client->kref); + client->ctx = ctx; + file->private_data = client; +return 0 ; +} + +static int aspeed_xdma_release (struct inode *inode,struct file *file) +{ +struct aspeed_xdma_client *client = file->private_data; + +kref_put (&client->kref, aspeed_xdma_client_release); +return 0 ; +} + +static const struct file_operations aspeed_xdma_fops = { + .owner =THIS_MODULE , + .write = aspeed_xdma_write, + .poll = aspeed_xdma_poll, + .mmap = aspeed_xdma_mmap, + .open = aspeed_xdma_open, + .release = aspeed_xdma_release, +}; +static int aspeed_xdma_init_scu (struct aspeed_xdma *ctx,struct device *dev) { struct regmap *scu = syscon_regmap_lookup_by_phandle(dev->of_node,
@@ -762,6 +946,18 @@ static int aspeed_xdma_probe(struct platform_device *pdev)aspeed_xdma_init_eng (ctx); + ctx->misc.minor =MISC_DYNAMIC_MINOR ; + ctx->misc.fops = &aspeed_xdma_fops; + ctx->misc.name ="aspeed-xdma" ; + ctx->misc.parent = dev; + rc =misc_register (&ctx->misc); +if (rc) { +dev_err (dev,"Failed to register xdma miscdevice.\n" ); +gen_pool_free (ctx->pool, (unsigned long )ctx->cmdq, +XDMA_CMDQ_SIZE ); + goto err; + } +/* * This interrupt could fire immediately so only request it once the * engine and driver are initialized.
@@ -792,8 +988,8 @@ static int aspeed_xdma_remove(struct platform_device *pdev) {struct aspeed_xdma *ctx =platform_get_drvdata (pdev); -gen_pool_free (ctx->pool, (unsigned long )ctx->cmdq_virt, -XDMA_CMDQ_SIZE ); +misc_deregister (&ctx->misc); +gen_pool_free (ctx->pool, (unsigned long )ctx->cmdq,XDMA_CMDQ_SIZE );reset_control_assert (ctx->reset);if (ctx->reset_rc)
Signature · 1 line
2.24.0
PATCH v10 4/7 soc: aspeed: xdma: Add reset ioctl
In reply to Eddie JamesUsers of the XDMA engine need a way to reset it if something goes wrong. Problems on the host side, or user error, such as incorrect host address, may result in the DMA operation never completing and no way to determine what went wrong. Therefore, add an ioctl to reset the engine so that users can recover in this situation.
--- drivers/soc/aspeed/aspeed-xdma.c | 32 ++++++++++++++++++++++++++++++++ include/uapi/linux/aspeed-xdma.h | 4 ++++ 2 files changed, 36 insertions(+)
drivers/soc/aspeed/aspeed-xdma.c +32 -0
@@ -648,6 +648,37 @@ static __poll_t aspeed_xdma_poll(struct file *file,return mask; } +static long aspeed_xdma_ioctl (struct file *file,unsigned int cmd, +unsigned long param) +{ +unsigned long flags; +struct aspeed_xdma_client *client = file->private_data; +struct aspeed_xdma *ctx = client->ctx; + +switch (cmd) { +case ASPEED_XDMA_IOCTL_RESET : +spin_lock_irqsave (&ctx->engine_lock, flags); +if (ctx->in_reset) { +spin_unlock_irqrestore (&ctx->engine_lock, flags); +return 0 ; + } + + ctx->in_reset = true; +spin_unlock_irqrestore (&ctx->engine_lock, flags); + +if (READ_ONCE (ctx->current_client)) +dev_warn (ctx->dev, +"User reset with transfer in progress.\n" ); + +aspeed_xdma_reset (ctx); +break ; +default : +return -EINVAL ; + } + +return 0 ; +} +static void aspeed_xdma_vma_close (struct vm_area_struct *vma) {int rc;
@@ -742,6 +773,7 @@ static const struct file_operations aspeed_xdma_fops = { .owner = THIS_MODULE, .write = aspeed_xdma_write, .poll = aspeed_xdma_poll, + .unlocked_ioctl = aspeed_xdma_ioctl, .mmap = aspeed_xdma_mmap, .open = aspeed_xdma_open, .release = aspeed_xdma_release,
include/uapi/linux/aspeed-xdma.h +4 -0
@@ -4,8 +4,12 @@#ifndef _UAPI_LINUX_ASPEED_XDMA_H_#define _UAPI_LINUX_ASPEED_XDMA_H_ +#include <linux/ioctl.h> #include <linux/types.h> +#define __ASPEED_XDMA_IOCTL_MAGIC 0xb7 +#define ASPEED_XDMA_IOCTL_RESET _IO(__ASPEED_XDMA_IOCTL_MAGIC, 0) +/* * aspeed_xdma_direction *
Signature · 1 line
2.24.0
PATCH v10 5/7 ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset
In reply to Eddie JamesThe AST2600 XDMA engine requires the PCI-E root control reset be cleared as well, so add a phandle to that syscon reset.
--- arch/arm/boot/dts/aspeed-g6.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/boot/dts/aspeed-g6.dtsi +2 -1
@@ -342,7 +342,8 @@ xdma: xdma at 1e6e7000 { compatible = "aspeed,ast2600-xdma"; reg = <0x1e6e7000 0x100>; clocks = <&syscon ASPEED_CLK_GATE_BCLK>; - resets = <&syscon ASPEED_RESET_DEV_XDMA>; + resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; + reset-names = "device", "root-complex"; interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <&scu_ic0 2>; pcie-device = "bmc";
Signature · 1 line
2.24.0
PATCH v10 6/7 ARM: dts: Aspeed: AST2500: Add missing SCU interrupt controller include
In reply to Eddie JamesThe XDMA node references the SCU interrupt controller interrupts which should be included.
--- arch/arm/boot/dts/aspeed-g5.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/aspeed-g5.dtsi +1 -0
@@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include <dt-bindings/clock/aspeed-clock.h> +#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> / { model = "Aspeed BMC";
Signature · 1 line
2.24.0
PATCH v10 7/7 ARM: dts: Aspeed: AST2600: Add missing SCU interrupt controller include
In reply to Eddie JamesThe XDMA node references the SCU interrupt controller interrupts which should be included.
--- arch/arm/boot/dts/aspeed-g6.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/aspeed-g6.dtsi +1 -0
@@ -2,6 +2,7 @@ // Copyright 2019 IBM Corp. #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> #include <dt-bindings/clock/ast2600-clock.h> / {
Signature · 1 line
2.24.0