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arm64: docs: Mandate that the I-cache doesn't hold stale kernel text

PATCH In review Will Deacon 3 participants 3 messages Apr 23, 2020 Documentation

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PATCH 1/1 arm64: docs: Mandate that the I-cache doesn't hold stale kernel text

Although we require that the loaded kernel Image has been cleaned to the PoC, we neglect to spell out the state of the I-cache. Although this should be reasonably obvious, it doesn't hurt to be explicit.

Require that the I-cache doesn't hold any stale entries for the kernel Image at boot.

Cc Mark Rutland <[email protected]>
Cc Catalin Marinas <[email protected]>
---
 Documentation/arm64/booting.rst | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Documentation/arm64/booting.rst +2 -1
index a3f1a47b6f1c..d063c05d5fb0 100644
@@ -173,7 +173,8 @@ Before jumping into the kernel, the following conditions must be met:
 - Caches, MMUs
 
   The MMU must be off.
-  Instruction cache may be on or off.
+  The instruction cache may be on or off, and must not hold any stale
+  entries corresponding to the loaded kernel image.
   The address range corresponding to the loaded kernel image must be
   cleaned to the PoC. In the presence of a system cache or other
   coherent masters with caches enabled, this will typically require
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2.26.1.301.g55bc3eb7cb9-goog


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Acked-by on v1 1/1
#1 lore raw
Quoted 10 lines · Will Deacon

Although we require that the loaded kernel Image has been cleaned to the PoC, we neglect to spell out the state of the I-cache. Although this should be reasonably obvious, it doesn't hurt to be explicit.

Require that the I-cache doesn't hold any stale entries for the kernel Image at boot.

Cc Mark Rutland <[email protected]>
Cc Catalin Marinas <[email protected]>

This was certianly the intent, so:

Thanks,
Mark.

Quoted 21 lines
---
 Documentation/arm64/booting.rst | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Documentation/arm64/booting.rst +2 -1
index a3f1a47b6f1c..d063c05d5fb0 100644
@@ -173,7 +173,8 @@ Before jumping into the kernel, the following conditions must be met:
 - Caches, MMUs
 
   The MMU must be off.
-  Instruction cache may be on or off.
+  The instruction cache may be on or off, and must not hold any stale
+  entries corresponding to the loaded kernel image.
   The address range corresponding to the loaded kernel image must be
   cleaned to the PoC. In the presence of a system cache or other
   coherent masters with caches enabled, this will typically require
Signature · 1 line
2.26.1.301.g55bc3eb7cb9-goog

_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Acked-by on v1 1/1
#2 lore raw
In reply to Will Deacon
Quoted 10 lines · Will Deacon

Although we require that the loaded kernel Image has been cleaned to the PoC, we neglect to spell out the state of the I-cache. Although this should be reasonably obvious, it doesn't hurt to be explicit.

Require that the I-cache doesn't hold any stale entries for the kernel Image at boot.

Cc Mark Rutland <[email protected]>
Cc Catalin Marinas <[email protected]>

_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel