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clk: iproc: round clock rate to the closest

PATCH Applied Ray Jui 2 participants 3 messages Jun 12, 2020 – Jul 24, 2020

Subsystems (2)
Common clk Broadcom iproc Arm architecture
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Ray Jui

author
#0 lore raw

PATCH 1/1 clk: iproc: round clock rate to the closest

From: Lori Hikichi <[email protected]>

Change from 'DIV_ROUND_UP' to 'DIV_ROUND_CLOSEST' when calculating the clock divisor in the iProc ASIU clock driver to allow to get to the closest clock rate.

Fixes 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by Lori Hikichi <[email protected]>
Signed-off-by Ray Jui <[email protected]>
---
 drivers/clk/bcm/clk-iproc-asiu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/bcm/clk-iproc-asiu.c +2 -2
index 6fb8af506777..e062dd4992ea 100644
@@ -119,7 +119,7 @@ static long iproc_asiu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
 	if (rate == *parent_rate)
 		return *parent_rate;
 
-	div = DIV_ROUND_UP(*parent_rate, rate);
+	div = DIV_ROUND_CLOSEST(*parent_rate, rate);
 	if (div < 2)
 		return *parent_rate;
 

@@ -145,7 +145,7 @@ static int iproc_asiu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 		return 0;
 	}
 
-	div = DIV_ROUND_UP(parent_rate, rate);
+	div = DIV_ROUND_CLOSEST(parent_rate, rate);
 	if (div < 2)
 		return -EINVAL;
Signature · 1 line
2.17.1
author
#1 lore raw

Hi Stephen/Michael,

Could you please help to review this patch?

Thanks,

Ray

Quoted 36 lines · Ray Jui

From: Lori Hikichi <[email protected]>

Change from 'DIV_ROUND_UP' to 'DIV_ROUND_CLOSEST' when calculating the clock divisor in the iProc ASIU clock driver to allow to get to the closest clock rate.

Fixes 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by Lori Hikichi <[email protected]>
Signed-off-by Ray Jui <[email protected]>
---
 drivers/clk/bcm/clk-iproc-asiu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/bcm/clk-iproc-asiu.c +2 -2
index 6fb8af506777..e062dd4992ea 100644
@@ -119,7 +119,7 @@ static long iproc_asiu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
 	if (rate == *parent_rate)
 		return *parent_rate;
 
-	div = DIV_ROUND_UP(*parent_rate, rate);
+	div = DIV_ROUND_CLOSEST(*parent_rate, rate);
 	if (div < 2)
 		return *parent_rate;
 

@@ -145,7 +145,7 @@ static int iproc_asiu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 		return 0;
 	}
 
-	div = DIV_ROUND_UP(parent_rate, rate);
+	div = DIV_ROUND_CLOSEST(parent_rate, rate);
 	if (div < 2)
 		return -EINVAL;
maintainer Applied
#2 lore raw
In reply to Ray Jui

Quoting Ray Jui (2020-06-12 15:52:12)

Quoted 10 lines

From: Lori Hikichi <[email protected]>

Change from 'DIV_ROUND_UP' to 'DIV_ROUND_CLOSEST' when calculating the clock divisor in the iProc ASIU clock driver to allow to get to the closest clock rate.

Fixes 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by Lori Hikichi <[email protected]>
Signed-off-by Ray Jui <[email protected]>

---

Applied to clk-next