asm-generic/mmiowb: Allow mmiowb_set_pending() when preemptible()
Subsystems (2)
PATCH 1/1 asm-generic/mmiowb: Allow mmiowb_set_pending() when preemptible()
Although mmiowb() is concerned only with serialising MMIO writes occuring in contexts where a spinlock is held, the call to mmiowb_set_pending() from the MMIO write accessors can occur in preemptible contexts, such as during driver probe() functions where ordering between CPUs is not usually a concern, assuming that the task migration path provides the necessary ordering guarantees.
Unfortunately, the default implementation of mmiowb_set_pending() is not preempt-safe, as it makes use of a a per-cpu variable to track its internal state. This has been reported to generate the following splat on riscv:
| BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1 | caller is regmap_mmio_write32le+0x1c/0x46 | CPU: 3 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3-hfu+ #1 | Call Trace: | walk_stackframe+0x0/0x7a | dump_stack+0x6e/0x88 | regmap_mmio_write32le+0x18/0x46 | check_preemption_disabled+0xa4/0xaa | regmap_mmio_write32le+0x18/0x46 | regmap_mmio_write+0x26/0x44 | regmap_write+0x28/0x48 | sifive_gpio_probe+0xc0/0x1da
Although it's possible to fix the driver in this case, other splats have been seen from other drivers, including the infamous 8250 UART, and so it's better to address this problem in the mmiowb core itself.
Fix mmiowb_set_pending() by using the raw_cpu_ptr() to get at the mmiowb state and then only updating the 'mmiowb_pending' field if we are not preemptible (i.e. we have a non-zero nesting count).
---
I can queue this in the arm64 tree as a fix, as I already have some other fixes targetting -rc6.
include/asm-generic/mmiowb.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
include/asm-generic/mmiowb.h +4 -2
@@ -27,7 +27,7 @@#include <asm/smp.h> DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state); -#define __mmiowb_state () this_cpu_ptr(&__mmiowb_state) +#define __mmiowb_state () raw_cpu_ptr(&__mmiowb_state)#else #define __mmiowb_state () arch_mmiowb_state()#endif /* arch_mmiowb_state */
@@ -35,7 +35,9 @@ DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state);static inline void mmiowb_set_pending (void ) {struct mmiowb_state *ms =__mmiowb_state (); - ms->mmiowb_pending = ms->nesting_count; + +if (likely (ms->nesting_count)) + ms->mmiowb_pending = ms->nesting_count; }static inline void mmiowb_spin_lock (void )
Signature · 1 line
2.27.0.389.gc38d7665816-goog
Quoted 34 lines · Will Deacon
Although
mmiowb()is concerned only with serialising MMIO writes occuring in contexts where a spinlock is held, the call tommiowb_set_pending()from the MMIO write accessors can occur in preemptible contexts, such as during driverprobe()functions where ordering between CPUs is not usually a concern, assuming that the task migration path provides the necessary ordering guarantees.Unfortunately, the default implementation of
mmiowb_set_pending()is not preempt-safe, as it makes use of a a per-cpu variable to track its internal state. This has been reported to generate the following splat on riscv:| BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1 | caller is regmap_mmio_write32le+0x1c/0x46 | CPU: 3 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3-hfu+ #1 | Call Trace: | walk_stackframe+0x0/0x7a | dump_stack+0x6e/0x88 | regmap_mmio_write32le+0x18/0x46 | check_preemption_disabled+0xa4/0xaa | regmap_mmio_write32le+0x18/0x46 | regmap_mmio_write+0x26/0x44 | regmap_write+0x28/0x48 | sifive_gpio_probe+0xc0/0x1daAlthough it's possible to fix the driver in this case, other splats have been seen from other drivers, including the infamous 8250 UART, and so it's better to address this problem in the mmiowb core itself.
Fix
mmiowb_set_pending()by using theraw_cpu_ptr()to get at the mmiowb state and then only updating the 'mmiowb_pending' field if we are not preemptible (i.e. we have a non-zero nesting count).
Quoted 5 lines
Cc Arnd Bergmann <[email protected]>Cc Paul Walmsley <[email protected]>Cc Guo Ren <[email protected]>Cc Michael Ellerman <[email protected]>Reported-by Palmer Dabbelt <[email protected]>
Nice. This fixes the problems I saw both in Qemu and on the HiFive Unleashed.
Btw. I was the one who originally stumbled upon this problem and send the mail to linux-riscv that Palmer CC'ed you on, so I think this ought to be
In any case you can add
Quoted 41 lines
Signed-off-by Will Deacon <[email protected]>---
I can queue this in the arm64 tree as a fix, as I already have some other fixes targetting -rc6.
include/asm-generic/mmiowb.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)include/asm-generic/mmiowb.h +4
-3@@ -27,7 +27,7 @@#include <asm/smp.h> DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state); -#define __mmiowb_state () this_cpu_ptr(&__mmiowb_state) +#define __mmiowb_state () raw_cpu_ptr(&__mmiowb_state)#else #define __mmiowb_state () arch_mmiowb_state()#endif /* arch_mmiowb_state */ @@ -35,7 +35,9 @@ DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state);static inline void mmiowb_set_pending (void ) {struct mmiowb_state *ms =__mmiowb_state (); - ms->mmiowb_pending = ms->nesting_count; + +if (likely (ms->nesting_count)) + ms->mmiowb_pending = ms->nesting_count; }static inline void mmiowb_spin_lock (void ) --2.27.0.389.gc38d7665816-goog
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Quoted 61 lines · On Thu, 16 Jul 2020 04:28:16 PDT (-0700), [email protected] wrote:
Although
mmiowb()is concerned only with serialising MMIO writes occuring in contexts where a spinlock is held, the call tommiowb_set_pending()from the MMIO write accessors can occur in preemptible contexts, such as during driverprobe()functions where ordering between CPUs is not usually a concern, assuming that the task migration path provides the necessary ordering guarantees.Unfortunately, the default implementation of
mmiowb_set_pending()is not preempt-safe, as it makes use of a a per-cpu variable to track its internal state. This has been reported to generate the following splat on riscv:| BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1 | caller is regmap_mmio_write32le+0x1c/0x46 | CPU: 3 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3-hfu+ #1 | Call Trace: | walk_stackframe+0x0/0x7a | dump_stack+0x6e/0x88 | regmap_mmio_write32le+0x18/0x46 | check_preemption_disabled+0xa4/0xaa | regmap_mmio_write32le+0x18/0x46 | regmap_mmio_write+0x26/0x44 | regmap_write+0x28/0x48 | sifive_gpio_probe+0xc0/0x1daAlthough it's possible to fix the driver in this case, other splats have been seen from other drivers, including the infamous 8250 UART, and so it's better to address this problem in the mmiowb core itself.
Fix
mmiowb_set_pending()by using theraw_cpu_ptr()to get at the mmiowb state and then only updating the 'mmiowb_pending' field if we are not preemptible (i.e. we have a non-zero nesting count).Cc Arnd Bergmann <[email protected]>Cc Paul Walmsley <[email protected]>Cc Guo Ren <[email protected]>Cc Michael Ellerman <[email protected]>Reported-by Palmer Dabbelt <[email protected]>Signed-off-by Will Deacon <[email protected]>---
I can queue this in the arm64 tree as a fix, as I already have some other fixes targetting -rc6.
include/asm-generic/mmiowb.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)include/asm-generic/mmiowb.h +1
-1@@ -27,7 +27,7 @@#include <asm/smp.h> DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state); -#define __mmiowb_state () this_cpu_ptr(&__mmiowb_state) +#define __mmiowb_state () raw_cpu_ptr(&__mmiowb_state)#else #define __mmiowb_state () arch_mmiowb_state()#endif /* arch_mmiowb_state */
include/asm-generic/mmiowb.h DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state); · line 43
Quoted 10 lines
include/asm-generic/mmiowb.h +3
-1@@ -35,7 +35,9 @@ DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state);static inline void mmiowb_set_pending (void ) {struct mmiowb_state *ms =__mmiowb_state (); - ms->mmiowb_pending = ms->nesting_count; + +if (likely (ms->nesting_count)) + ms->mmiowb_pending = ms->nesting_count; }static inline void mmiowb_spin_lock (void )
The arm64 tree works for me.
Thanks!
Will Deacon
AppliedQuoted 8 lines · Will Deacon
Although
mmiowb()is concerned only with serialising MMIO writes occuring in contexts where a spinlock is held, the call tommiowb_set_pending()from the MMIO write accessors can occur in preemptible contexts, such as during driverprobe()functions where ordering between CPUs is not usually a concern, assuming that the task migration path provides the necessary ordering guarantees.[...]
Applied to arm64 (for-next/fixes), thanks!
[1/1] asm-generic/mmiowb: Allow mmiowb_set_pending() when preemptible()
https://git.kernel.org/arm64/c/bd024e82e4cd
Cheers,
Signature · 5 lines
Will https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev