loongson ls2k1000: PCIe serial card WCH CH382L not working, maybe ioports problem

Hi all,

I'm testing a PCIe card to two uarts (WCH CH382L compatible,

          https://item.jd.com/48547850173.html) on a loongson ls2k1000 board.

With the card inserted the kernel detects the two new uarts:

[    2.060884] pci 0000:00:04.1: EHCI: unrecognized capability ff
[    2.066721] pci 0000:00:04.1: EHCI: capability loop?
[    2.066745] pci 0000:00:04.1: quirk_usb_early_handoff+0x0/0xa60 took 358764 usecs
[    2.074542] pcieport 0000:00:09.0: PME: Signaling with IRQ 2
[    2.080651] pcieport 0000:00:0a.0: PME: Signaling with IRQ 3
[    2.086648] pcieport 0000:00:0b.0: PME: Signaling with IRQ 4
[    2.092616] pcieport 0000:00:0c.0: PME: Signaling with IRQ 5
[    2.098579] pcieport 0000:00:0d.0: PME: Signaling with IRQ 6
[    2.104557] pcieport 0000:00:0e.0: PME: Signaling with IRQ 7
[    2.113728] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    2.120891] serial 0000:06:00.0: limiting MRRS to 256
[    2.126314] 0000:06:00.0: ttyS0 at I/O 0xc0 (irq = 7, base_baud = 115200) is a XR16850
[    2.134618] 0000:06:00.0: ttyS1 at I/O 0xc8 (irq = 7, base_baud = 115200) is a XR16850
[    2.143130] 1fe00000.serial: ttyS2 at MMIO 0x1fe00000 (irq = 1, base_baud = 7812500) is a 16550A
[    2.151946] printk: console [ttyS2] enabled
[    2.160255] printk: bootconsole [early0] disabled
[    2.170112] [drm] radeon kernel modesetting enabled.

However a write to the serial fails:
/ # echo "hello" >/dev/ttyS0

[ 9369.631915] serial 0000:06:00.0: LSR safety check engaged!

sh: write error: Input/output error

read from the serial, too:
/ # cat /dev/ttyS0

[ 9531.127623] serial 0000:06:00.0: LSR safety check engaged!

cat: read error: Input/output error

A dump_stack() in front of the "LSR safety check engaged!" shows the following backtrace:

[   40.891789] [<ffffffff8020e7d4>] show_stack+0x9c/0x130
[   40.896949] [<ffffffff80685944>] dump_stack+0xb4/0xf0
[   40.902021] [<ffffffff80743d30>] serial8250_do_startup+0x480/0x888
[   40.908216] [<ffffffff8073e07c>] uart_startup.part.19+0x12c/0x2c0
[   40.914321] [<ffffffff8073e27c>] uart_port_activate+0x6c/0xa8
[   40.920085] [<ffffffff807221b8>] tty_port_open+0xa0/0x128
[   40.925493] [<ffffffff8073a2ec>] uart_open+0x1c/0x30
[   40.930467] [<ffffffff80719220>] tty_open+0x118/0x500
[   40.935530] [<ffffffff80391e0c>] chrdev_open+0xc4/0x1e0
[   40.940767] [<ffffffff803865e8>] do_dentry_open+0x210/0x480
[   40.946353] [<ffffffff8039e7e8>] path_openat+0xb38/0xe50
[   40.951675] [<ffffffff8039fe00>] do_filp_open+0xe8/0x130
[   40.956996] [<ffffffff80386d8c>] do_sys_openat2+0x1fc/0x338
[   40.962579] [<ffffffff803884ac>] do_sys_open+0x5c/0x88
[   40.967728] [<ffffffff80214470>] syscall_common+0x34/0x58

/ # cat /proc/ioports
000000c0-000000c7 : serial
000000c8-000000cf : serial

/ # lspci
00:03.1 Class 0200: 0014:7a03
00:08.0 Class 0106: 0014:7a08
00:0d.0 Class 0604: 0014:7a19
00:10.0 Class 0480: 0014:7a16
00:04.2 Class 0c03: 0014:7a24
00:04.0 Class 0c03: 0014:7a04
00:07.0 Class 0403: 0014:7a07
00:0c.0 Class 0604: 0014:7a09
00:0f.0 Class 0880: 0014:7a0f
06:00.0 Class 0700: 1c00:3253 <-- WCH CH382L
00:03.0 Class 0200: 0014:7a03
00:06.0 Class 0300: 0014:7a06
00:0b.0 Class 0604: 0014:7a09
00:04.1 Class 0c03: 0014:7a14
00:09.0 Class 0604: 0014:7a19
00:0e.0 Class 0604: 0014:7a09
00:11.0 Class 0480: 0014:7a26
00:02.0 Class 0880: 0014:7a02
00:05.0 Class 0302: 0014:7a05
00:0a.0 Class 0604: 0014:7a09

I'm using Yang Jiaxun's kernel and pmon:

kernel:
https://github.com/FlyGoat/linux
branch: loogson/next-testing-2k
bootloader:
https://github.com/FlyGoat/pmon-ls2k
branch: master

and a simple rootfs:
https://sourceforge.net/projects/loongsonpi2/files/source-extra/miniroot.tar.xz

For reference, the card work on a standard PC:

     [    0.701127] 0000:01:00.0: ttyS4 at I/O 0xe0c0 (irq = 16, base_baud = 115200) is a XR16850
     [    0.701295] 0000:01:00.0: ttyS5 at I/O 0xe0c8 (irq = 16, base_baud = 115200) is a XR16850

The relevant part of /proc/ioports:
0d00-ffff : PCI Bus 0000:00
e000-efff : PCI Bus 0000:01

     e000-e0ff : 0000:01:00.0
       e0c0-e0c7 : serial
       e0c8-e0cf : serial

Regards,
Du Huanpeng

Quoted 23 lines

I'm testing a PCIe card to two uarts (WCH CH382L compatible,

          https://item.jd.com/48547850173.html) on a loongson ls2k1000 board.

With the card inserted the kernel detects the two new uarts:

[    2.060884] pci 0000:00:04.1: EHCI: unrecognized capability ff
[    2.066721] pci 0000:00:04.1: EHCI: capability loop?
[    2.066745] pci 0000:00:04.1: quirk_usb_early_handoff+0x0/0xa60 took 358764 usecs
[    2.074542] pcieport 0000:00:09.0: PME: Signaling with IRQ 2
[    2.080651] pcieport 0000:00:0a.0: PME: Signaling with IRQ 3
[    2.086648] pcieport 0000:00:0b.0: PME: Signaling with IRQ 4
[    2.092616] pcieport 0000:00:0c.0: PME: Signaling with IRQ 5
[    2.098579] pcieport 0000:00:0d.0: PME: Signaling with IRQ 6
[    2.104557] pcieport 0000:00:0e.0: PME: Signaling with IRQ 7
[    2.113728] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    2.120891] serial 0000:06:00.0: limiting MRRS to 256
[    2.126314] 0000:06:00.0: ttyS0 at I/O 0xc0 (irq = 7, base_baud = 115200) is a XR16850
[    2.134618] 0000:06:00.0: ttyS1 at I/O 0xc8 (irq = 7, base_baud = 115200) is a XR16850
[    2.143130] 1fe00000.serial: ttyS2 at MMIO 0x1fe00000 (irq = 1, base_baud = 7812500) is a 16550A
[    2.151946] printk: console [ttyS2] enabled
[    2.160255] printk: bootconsole [early0] disabled
[    2.170112] [drm] radeon kernel modesetting enabled.

Quoted 4 lines

However a write to the serial fails:
/ # echo "hello" >/dev/ttyS0

[ 9369.631915] serial 0000:06:00.0: LSR safety check engaged!

sh: write error: Input/output error

I assume you're using my out-of-tree fork to support LS2K. I messed with Logic PIO in that fork.
I'll fix it in mainline, sorry for the issue...

Quoted 23 lines · Jiaxun Yang

Quoted 23 lines

I'm testing a PCIe card to two uarts (WCH CH382L compatible,

           https://item.jd.com/48547850173.html) on a loongson ls2k1000 board.

With the card inserted the kernel detects the two new uarts:

[    2.060884] pci 0000:00:04.1: EHCI: unrecognized capability ff
[    2.066721] pci 0000:00:04.1: EHCI: capability loop?
[    2.066745] pci 0000:00:04.1: quirk_usb_early_handoff+0x0/0xa60 took 358764 usecs
[    2.074542] pcieport 0000:00:09.0: PME: Signaling with IRQ 2
[    2.080651] pcieport 0000:00:0a.0: PME: Signaling with IRQ 3
[    2.086648] pcieport 0000:00:0b.0: PME: Signaling with IRQ 4
[    2.092616] pcieport 0000:00:0c.0: PME: Signaling with IRQ 5
[    2.098579] pcieport 0000:00:0d.0: PME: Signaling with IRQ 6
[    2.104557] pcieport 0000:00:0e.0: PME: Signaling with IRQ 7
[    2.113728] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    2.120891] serial 0000:06:00.0: limiting MRRS to 256
[    2.126314] 0000:06:00.0: ttyS0 at I/O 0xc0 (irq = 7, base_baud = 115200) is a XR16850
[    2.134618] 0000:06:00.0: ttyS1 at I/O 0xc8 (irq = 7, base_baud = 115200) is a XR16850
[    2.143130] 1fe00000.serial: ttyS2 at MMIO 0x1fe00000 (irq = 1, base_baud = 7812500) is a 16550A
[    2.151946] printk: console [ttyS2] enabled
[    2.160255] printk: bootconsole [early0] disabled
[    2.170112] [drm] radeon kernel modesetting enabled.

Quoted 7 lines

Quoted 4 lines

However a write to the serial fails:
/ # echo "hello" >/dev/ttyS0

[ 9369.631915] serial 0000:06:00.0: LSR safety check engaged!

sh: write error: Input/output error

I assume you're using my out-of-tree fork to support LS2K. I messed with Logic PIO in that fork.
I'll fix it in mainline, sorry for the issue...

Do you have a tree that we can test?

Marc

Quoted 8 lines

Quoted 7 lines

Quoted 4 lines

However a write to the serial fails:
/ # echo "hello" >/dev/ttyS0

[ 9369.631915] serial 0000:06:00.0: LSR safety check engaged!

sh: write error: Input/output error

I assume you're using my out-of-tree fork to support LS2K. I messed with Logic PIO in that fork.
I'll fix it in mainline, sorry for the issue...

Do you have a tree that we can test?

I'm trying to trim my patches to meet mainline requirement but I was really busy recent days.

I'll report when the tree is ready.

Quoted 7 lines

Quoted 2 lines

Quoted 1 line

I'll fix it in mainline, sorry for the issue...

Do you have a tree that we can test?

I'm trying to trim my patches to meet mainline requirement but I was really busy recent days.

I'll report when the tree is ready.